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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 22 occurrences of 14 keywords
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Results
Found 42 publication records. Showing 42 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
222 | Ke Cao, Jiang Hu, Mosong Cheng |
Wire Sizing and Spacing for Lithographic Printability and Timing Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 15(12), pp. 1332-1340, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
126 | Michel Côté, Philippe Hurat |
Standard Cell Printability Grading and Hot Spot Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 264-269, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
87 | Chung-Hui Chen, Chih-Jen Liu |
A Study of Screen Printability of UV Soy Ink on Plastics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSSE (6) ![In: International Conference on Computer Science and Software Engineering, CSSE 2008, Volume 6: Graphic Communication / Other Applications, December 12-14, 2008, Wuhan, China, pp. 411-413, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
87 | Charles C. Chiang, Jamil Kawa |
Three DFM Challenges: Random Defects, Thickness Variation, and Printability Variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 1099-1102, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
71 | Liang Deng, Martin D. F. Wong, Kai-Yuan Chao, Hua Xiang 0001 |
Coupling-aware Dummy Metal Insertion for Lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 13-18, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
coupling-aware dummy metal insertion, integrated circuits manufacturing technology, resolution enhancement techniques, off-axis illumination, forbidden pitches, printability improvement, invisible dummy metal segments, lithography cost minimization, optimal algorithm, chemical mechanical polish |
68 | Hiroki Sunagawa, Haruhiko Terada, Akira Tsuchiya, Kazutoshi Kobayashi, Hidetoshi Onodera |
Erect of regularity-enhanced layout on printability and circuit performance of standard cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 195-200, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
49 | Kevin Lucas, Chi-Min Yuan, Robert Boone, Karl Wimmer, Kirk Strozewski, Olivier Toublan |
Logic Design for Printability Using OPC Methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 23(1), pp. 30-37, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
optical proximity correction (OPC), reticle enhancement technology (RET), design for manufacturability (DFM) |
49 | Michel Côté, Philippe Hurat |
Layout Printability Optimization Using a Silicon Simulation Methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 5th International Symposium on Quality of Electronic Design (ISQED 2004), 22-24 March 2004, San Jose, CA, USA, pp. 159-164, 2004, IEEE Computer Society, 0-7695-2093-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
38 | Andrzej J. Strojwas, Tejas Jhaveri, Vyacheslav Rovner, Lawrence T. Pileggi |
Creating an affordable 22nm node using design-lithography co-optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 95-96, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
design technology co-optimization, templates, DFM, regular fabric |
38 | Puneet Gupta 0001, Andrew B. Kahng, Chul-Hong Park |
Detailed Placement for Enhanced Control of Resist and Etch CDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(12), pp. 2144-2157, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
38 | Peng Yu, Sean X. Shi, David Z. Pan |
Process variation aware OPC with variational lithography modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 785-790, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
lithography modeling, process variation, OPC |
38 | Manish Garg, Laurent Le Cam, Matthieu Gonzalez |
Lithography Driven Layout Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 439-444, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
33 | Lance Fortnow, Judy Goldsmith, Stephen R. Mahaney |
L-Printable Sets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCC ![In: Proceedings of the Eleveth Annual IEEE Conference on Computational Complexity, Philadelphia, Pennsylvania, USA, May 24-27, 1996, pp. 97-106, 1996, IEEE Computer Society, 0-8186-7386-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
printability, logspace, rankability, computational complexity |
29 | Wei-Chih Tseng, Chao-Yaug Liao, Luc Chassagne, Barthélemy Cagneau |
Assessment of a Flow-Measurement Technique for the Printability of Extrusion-Based Bioprinting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Robotics Autom. Lett. ![In: IEEE Robotics Autom. Lett. 9(2), pp. 1716-1723, February 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
29 | Marios-Nektarios Stamatopoulos, Avijit Banerjee, George Nikolakopoulos |
On Experimental Emulation of Printability and Fleet Aware Generic Mesh Decomposition for Enabling Aerial 3D Printing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2402.05853, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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29 | William Mycroft, Mordechai Katzman, Samuel Tammas-Williams, Everth Hernandez-Nava, George Panoutsos, Iain Todd, Visakan Kadirkamanathan |
A data-driven approach for predicting printability in metal additive manufacturing processes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Intell. Manuf. ![In: J. Intell. Manuf. 31(7), pp. 1769-1781, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
29 | Ioannis Fudos, Margarita Ntousia, Vasiliki Stamati, Paschalis Charalampous, Theodora Kontodina, Ioannis Kostavelis, Dimitrios Tzovaras, Leonardo Bilalis |
A Characterization of 3D Printability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2010.12930, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
29 | Bentian Jiang, Lixin Liu, Yuzhe Ma, Hang Zhang 0010, Bei Yu 0001, Evangeline F. Y. Young |
Neural-ILT: Migrating ILT to Neural Networks for Mask Printability and Complexity Co-optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: IEEE/ACM International Conference On Computer Aided Design, ICCAD 2020, San Diego, CA, USA, November 2-5, 2020, pp. 20:1-20:9, 2020, IEEE. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
29 | Kuan-Jung Chen, Shao-Yun Fang |
Printability Enhancement with Color Balancing for Multiple Patterning Lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Emerg. Top. Comput. ![In: IEEE Trans. Emerg. Top. Comput. 7(2), pp. 244-252, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
29 | Kristin N. Dew, Sophie Landwehr Sydow, Daniela K. Rosner, Alex Thayer, Martin Jonsson |
Producing Printability: Articulation Work and Alignment in 3D Printing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hum. Comput. Interact. ![In: Hum. Comput. Interact. 34(5-6), pp. 433-469, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
29 | Bentian Jiang, Hang Zhang 0010, Jinglei Yang, Evangeline F. Y. Young |
A fast machine learning-based mask printability predictor for OPC acceleration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 24th Asia and South Pacific Design Automation Conference, ASPDAC 2019, Tokyo, Japan, January 21-24, 2019, pp. 412-419, 2019, ACM, 978-1-4503-6007-4. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
29 | Tianxiang Lu |
Towards a fully automated 3D printability checker. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIT ![In: IEEE International Conference on Industrial Technology, ICIT 2016, Taipei, Taiwan, March 14-17, 2016, pp. 922-927, 2016, IEEE, 978-1-4673-8075-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
29 | Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Tsung-Yi Ho, Yu-Chuan Chen, Shun-Ren Siao, Shu-Hung Lin |
1-D Cell Generation With Printability Enhancement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(3), pp. 419-432, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
29 | Lucas Machado, Vinícius Dal Bem, Francesc Moll, Sergio Gómez, Renato P. Ribas, André Inácio Reis |
Logic synthesis for manufacturability considering regularity and lithography printability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2013, Natal, Brazil, August 5-7, 2013, pp. 230-235, 2013, IEEE Computer Socity, 978-1-4799-1331-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
29 | Alexandru C. Telea, Andrei C. Jalba |
Voxel-Based Assessment of Printability of 3D Shapes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMM ![In: Mathematical Morphology and Its Applications to Image and Signal Processing - 10th International Symposium, ISMM 2011, Verbania-Intra, Italy, July 6-8, 2011. Proceedings, pp. 393-404, 2011, Springer, 978-3-642-21568-1. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
29 | Krzysztof Kryszczuk, Paul Hurley, Robert Sayah |
Direct Printability Prediction in VLSI Using Features from Orthogonal Transforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPR ![In: 20th International Conference on Pattern Recognition, ICPR 2010, Istanbul, Turkey, 23-26 August 2010, pp. 2764-2767, 2010, IEEE Computer Society, 978-0-7695-4109-9. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
29 | Minsik Cho, Kun Yuan, Yongchan Ban, David Z. Pan |
ELIAD: Efficient Lithography Aware Detailed Routing Algorithm With Compact and Macro Post-OPC Printability Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(7), pp. 1006-1016, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
29 | Carinna Parraman, Yu Wang |
Printability beyond the limits: Alternative double printing method for inkjet. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Color Imaging: Displaying, Processing, Hardcopy, and Applications ![In: Color Imaging XIV: Displaying, Processing, Hardcopy, and Applications, San Jose, CA, USA, January 20-22, 2009, pp. 72411G, 2009, SPIE, 978-0-8194-7491-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
29 | Minsik Cho, Kun Yuan, Yongchan Ban, David Z. Pan |
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 504-509, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
routing, VLSI, manufacturability, OPC, lithography |
29 | Rui Martins, Heinrich Kirchauer |
Testing the Printability of VLSI Layouts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 14th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2001, Pirenopolis, Brazil, September 10-15, 2001, pp. 186-193, 2001, IEEE Computer Society, 0-7695-1333-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP BibTeX RDF |
|
29 | Roy S. Rubinstein |
Self-P-Printability and Polynomial Time Turing Equivalence to a Tally Set. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIAM J. Comput. ![In: SIAM J. Comput. 20(6), pp. 1021-1033, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
19 | David Z. Pan |
Lithography friendly routing: from construct-by-correction to correct-by-construction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008, pp. 6, 2008, ACM, 978-1-60558-231-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
routing |
19 | Yanming Jia, Yici Cai, Xianlong Hong |
Full-chip routing system for reducing Cu CMP & ECP variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008, pp. 10-15, 2008, ACM, 978-1-60558-231-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
electroplating, routing, chemical mechanical polishing |
19 | Yonggang Yang, Xiao-kun Qi |
Effect of Printing Conditions on Wet Picking and Wet Resistance of Paper. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSSE (6) ![In: International Conference on Computer Science and Software Engineering, CSSE 2008, Volume 6: Graphic Communication / Other Applications, December 12-14, 2008, Wuhan, China, pp. 421-424, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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19 | Min-Chun Tsai, Daniel Zhang, Zongwu Tang |
Modeling Litho-Constrained Design Layout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 354-357, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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19 | Puneet Gupta 0001, Andrew B. Kahng, Chul-Hong Park, Kambiz Samadi, Xu Xu 0001 |
Wafer Topography-Aware Optical Proximity Correction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12), pp. 2747-2756, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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19 | Raul Camposano |
Adding Manufacturability to the Quality of Results. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 511, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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19 | Praveen Parvathala |
Session Abstract. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 24th IEEE VLSI Test Symposium (VTS 2006), 30 April - 4 May 2006, Berkeley, California, USA, pp. 158-159, 2006, IEEE Computer Society, 0-7695-2514-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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19 | Puneet Gupta 0001, Andrew B. Kahng, Chul-Hong Park |
Detailed placement for improved depth of focus and CD control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 343-348, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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19 | Artur Balasinski |
DfM for SoC, invited. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 20-24 July 2004, Banff, Alberta, Canada, pp. 41-46, 2005, IEEE Computer Society, 0-7695-2403-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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19 | Luigi Capodieci, Puneet Gupta 0001, Andrew B. Kahng, Dennis Sylvester, Jie Yang 0010 |
Toward a methodology for manufacturability-driven design rule exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 311-316, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
VLSI manufacturability, process variation, yield, OPC, lithography, RET |
19 | Yoshito Abe |
Digital halftoning with optimized dither array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 517-520, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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