Search results for "self-biased"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
51	Leila Koushaeian, Stan Skafidas	A 65nm CMOS low-power, low-voltage bandgapreference with using self-biased composite cascode opamp.	ISLPED	2010	DBLP DOI BibTeX RDF	bandgap voltage reference, self-biased, self-cascode, temperature coefficient, voltage reference
48	John G. Maneatis, Jaeha Kim, Iain McClatchie, Jay Maxey, Manjusha Shankaradas	Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL.	DAC	2003	DBLP DOI BibTeX RDF	adaptive bandwidth, clock multiplication, frequency synthesis, self biased, analog circuits, PLL, phase-locked loop, clock generation
35	Linga Reddy Cenkeramaddi, Tajeshwar Singh, Trond Ytterdal	Self-biased charge sampling amplifier in 90nm CMOS for medical ultrasound imaging.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	CMUT-CMOS, analog front-end for CMUTs, charge sampling, sampling, CSA
32	Z. Q. Li, Xiaowei Sun, W. Fan, G. J. Qi	Bias-adaptive cross-coupled CMOS MAGFET pair for bipolar magnetic field detection.	ISCAS (4)	2003	DBLP DOI BibTeX RDF
27	Pradip Mandal, V. Visvanathan	A Self-Biased High Performance Folded Cascode CMOS Op-Amp.	VLSI Design	1997	DBLP DOI BibTeX RDF
25	Sandeep Patil, Michael Wieckowski, Martin Margala	A Self-Biased Charge-Transfer Sense Amplifier.	ISCAS	2007	DBLP DOI BibTeX RDF
25	Jennifer Blain Christen, Andreas G. Andreou	A Self-Biased Operational Transconductance Amplifier in 0.18 micron 3D SOI-CMOS.	ISCAS	2007	DBLP DOI BibTeX RDF
25	Francisco Serra-Graells, Josep Maria Margarit, Lluís Terés	A Self-Biased and FPN-Compensated Digital APS for Hybrid CMOS Imagers.	ISCAS	2007	DBLP DOI BibTeX RDF
25	Yat-Hei Lam, Suet-Chui Koon, Wing-Hung Ki, Chi-Ying Tsui	Integrated direct output current control switching converter using symmetrically-matched self-biased current sensors.	ASP-DAC	2006	DBLP DOI BibTeX RDF
25	Edgar Mauricio Camacho-Galeano, Carlos Galup-Montoro, Márcio C. Schneider	An ultra-low-power self-biased current reference.	SBCCI	2004	DBLP DOI BibTeX RDF	inversion level, self-cascode MOSFET, design methodology, low-voltage, ultra-low-power, current reference
19	Yiling Zhang, Valencia M. Joyner, Ruida Yun, Sameer R. Sonkusale	A 700Mbit/s CMOS capacitive feedback front-end amplifier with automatic gain control for broadband optical wireless links.	ISCAS	2008	DBLP DOI BibTeX RDF
19	Jiefeng Yan, Lei Xie, Xiaoyang Zeng, Tingao Tang	Adaptive bandwidth PLL with compact current mode filter.	ISCAS	2006	DBLP DOI BibTeX RDF
19	Kai Yu 0008, Jiyang Chen, Sizhen Li, Mo Huang	A 0.011%/V LS and -76-dB PSRR Self-Biased CMOS Voltage Reference With Quasi Self-Cascode Current Mirror.	IEEE Trans. Circuits Syst. II Express Briefs	2024	DBLP DOI BibTeX RDF
19	Yuxuan Huang, Feng Yan, Kangkang Sun, Jingjing Liu	A Self-Biased Subthreshold CMOS Voltage Reference with Temperature Compensation Circuit for IoT Self-Powered Sensor Applications.	APCCAS	2023	DBLP DOI BibTeX RDF
19	Hao Zhang 0087, Mengshu Huang, Yimeng Zhang, Tsutomu Yoshihara	Self-Cascode MOSFET with a Self-Biased Body Effect for Ultra-Low-Power Voltage Reference Generator.	IEICE Trans. Electron.	2013	DBLP DOI BibTeX RDF
17	R. M. Fox, M. Nagarajan	Multiple operating points in a CMOS log-domain filter.	ISCAS (2)	1999	DBLP DOI BibTeX RDF
15	Jun Liu 0070, Songren Cheng, Tian Chen, Xi Wu 0003, Huaguo Liang	A Self-Biased Current Reference Source-Based Pre-Bond TSV Test Solution.	IEEE Trans. Very Large Scale Integr. Syst.	2024	DBLP DOI BibTeX RDF
15	Kai Yu 0008, Shangru Yang, Sizhen Li, Mo Huang	A 521pW, 0.016%/V Line Sensitivity Self-Biased CMOS Voltage Reference With DIBL Effect Compensation Using Adaptive VGS Control.	IEEE Trans. Circuits Syst. II Express Briefs	2024	DBLP DOI BibTeX RDF
15	Chung Ming Leung, Haoran Zheng, Jing Yang, Tao Wang, Feifei Wang	Self-Biased Magneto-Electric Antenna for Very-Low-Frequency Communications: Exploiting Magnetization Grading and Asymmetric Structure-Induced Resonance.	Sensors	2024	DBLP DOI BibTeX RDF
15	Martin Lefebvre 0002, Denis Flandre, David Bol	A 1.1-/0.9-nA Temperature-Independent 213-/565-ppm/°C Self-Biased CMOS-Only Current Reference in 65-nm Bulk and 22-nm FDSOI.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
15	Kexu Chen, Di Li 0003, Dongdong Chen 0010, Changchun Chai	An Improved MOS Self-Biased Ring Amplifier and Modified Auto-Zeroing Scheme.	IEEE Trans. Very Large Scale Integr. Syst.	2023	DBLP DOI BibTeX RDF
15	Baijie Zhang, Jiawei Wang, Xu Cheng 0002, Jun Han 0003, Xiaoyang Zeng	Dominant-Node Theory and Monitoring-Rescue Method for Eliminating Undesired Operating Points in the Self-Biased Reference Generators.	IEEE Trans. Circuits Syst. I Regul. Pap.	2023	DBLP DOI BibTeX RDF
15	Martin Lefebvre 0002, Denis Flandre, David Bol	A 1.1- / 0.9-nA Temperature-Independent 213- / 565-ppm/$^\circ$C Self-Biased CMOS-Only Current Reference in 65-nm Bulk and 22-nm FDSOI.	CoRR	2023	DBLP DOI BibTeX RDF
15	João Cabacinho, João Casaleiro, Luís Oliveira	Design of a 28nm CMOS Self-Biased Ring Oscillator for Intrinsically Robust PVT TRNG.	PRIME	2023	DBLP DOI BibTeX RDF
15	Shun Nagata, Ewout Martens, Adam Cooman, Jan Craninckx	A 28GHz Low Jitter, Low Power Fully Differential Self-Biased Clock Buffer with Embedded Low Pass Filter Utilizing Enable Switch in 16nm FinFET.	MWSCAS	2023	DBLP DOI BibTeX RDF
15	Jürgen Oehm, Dominik Veit	A Constant - Vov/-gm Technique based on a Self-Biased Current Source for MOS Transistors.	ICECS	2023	DBLP DOI BibTeX RDF
15	Qidi Li, Youze Xin, Bing Zhang, Zirui Wang, Li Geng	A 12bit 160MS/s Pipelined SAR ADC with a MOS Self-Biased Cascoded Ring Amplifier.	ICTA	2023	DBLP DOI BibTeX RDF
15	Behnam Abdollahi, Horst Zimmermann	A Low-Power Current-Reuse Self-Biased Regulated-Cascode TIA in 130nm SiGe BiCMOS for Low-Noise and High Data Rate Applications.	NorCAS	2023	DBLP DOI BibTeX RDF
15	Jiayu Jing, Wei Li 0038, Ren Yuan, Hongtao Xu	A 12.1-16.5GHz Resistance Self-biased Inverse Class-F23 VCO Achieving 20-54kHz 1/f3 Corner Frequency.	ISCAS	2023	DBLP DOI BibTeX RDF
15	Minsu Park, Kang Yoon Lee	Low Phase Noise Voltage-Controlled Oscillator with Self-Biased Negative-Gm Cell for IoT Applications.	ISOCC	2023	DBLP DOI BibTeX RDF
15	Luigi Fassio, Hoang Hong Hanh, Massimo Alioto	A Resistor/Trimming-Less Self-Biased Current Reference Class with Area Down to $3,500\ \mu \mathrm{m}^{2}$, 42.8 pW Power and 10.4% Accuracy across Corner Wafers in 180 nm.	A-SSCC	2023	DBLP DOI BibTeX RDF
15	Ziyue Xu 0003, Adam Khalifa, Ankit Mittal, Mehdi Nasrollahpourmotlaghzanjani, Diptashree Das, Marvin Onabajo, Nian Xiang Sun, Sydney S. Cash, Aatmesh Shrivastava	A 30% Efficient High-Output Voltage Fully Integrated Self-Biased Gate RF Rectifier Topology for Neural Implants.	IEEE J. Solid State Circuits	2022	DBLP DOI BibTeX RDF
15	Youngwoo Ji, Jae-Yoon Sim	A 20.5-nW Resistor-Less Bandgap Voltage Reference With Self-Biased Compensation for Process Variations.	IEEE Trans. Very Large Scale Integr. Syst.	2022	DBLP DOI BibTeX RDF
15	Yeonggeun Song, Han-Gon Ko, Changhyun Kim, Deog-Kyoon Jeong	A 1.05-to-3.2 GHz All-Digital PLL for DDR5 Registering Clock Driver With a Self-Biased Supply-Noise-Compensating Ring DCO.	IEEE Trans. Circuits Syst. II Express Briefs	2022	DBLP DOI BibTeX RDF
15	Shenghui Yang	Analysis of high frequency behaviors of the self-biased TIA stage and implementation of an up-conversion mixer in millimeter-wave/terahertz band.	IEICE Electron. Express	2022	DBLP DOI BibTeX RDF
15	Martin Lefebvre 0002, Denis Flandre, David Bol	A 0.9-nA Temperature-Independent 565-ppm/°C Self-Biased Current Reference in 22-nm FDSOI.	ESSCIRC	2022	DBLP DOI BibTeX RDF
15	Baijie Zhang, Jue Wang, Xu Cheng 0002, Jun Han 0003, Xiaoyang Zeng	An Enhanced Start-up Circuit Eliminating All Trojan States in Self-biased Reference Generators.	ISCAS	2022	DBLP DOI BibTeX RDF
15	Tsung-Ying Chen, Ching-Yuan Yang, Dung-An Wang	A 80-MHz 91.2 ppm/°C Self-Biased Frequency-Locked-Loop Timer.	ISOCC	2022	DBLP DOI BibTeX RDF
15	Yixi Li, Xinyu Shen, Zhaoyu Zhang, Guike Li, Tao Yin, Nan Qi, Jian Liu 0021, Nanjian Wu, Liyuan Liu, Yong Chen 0005, Zhao Zhang 0004	A 0.004-mm2 O.7-V 31.654-μW BPSK Demodulator Incorporating Dual-Path Loop Self-Biased PLL.	APCCAS	2022	DBLP DOI BibTeX RDF
15	Cheng-Ze Shao, Shih-Che Kuo, Yu-Te Liao	A 1.8-nW, -73.5-dB PSRR, 0.2-ms Startup Time, CMOS Voltage Reference With Self-Biased Feedback and Capacitively Coupled Schemes.	IEEE J. Solid State Circuits	2021	DBLP DOI BibTeX RDF
15	Woojung Kim, Myunghee Lee	A 92-μW/Gbps Self-Biased SLVS Receiver for MIPI D-PHY Applications.	IEEE Trans. Circuits Syst. II Express Briefs	2021	DBLP DOI BibTeX RDF
15	Marino De Jesus Guzman, Nima Maghari	Slew Rate in Self-Biased Ring Amplifiers.	IEEE Trans. Circuits Syst. II Express Briefs	2021	DBLP DOI BibTeX RDF
15	Jinlong Hu, Ke Liang 0003, Jin Wang, Guofeng Li	A 1.8-nW sub-1-V self-biased sub-bandgap reference for low-power systems.	IEICE Electron. Express	2021	DBLP DOI BibTeX RDF
15	Ivan Skeledzija, Josip Mikulic, Adrijan Baric	200-MHz and 400-MHz Self-Biased Temperature-Compensated Ring Oscillators in 180-nm CMOS Technology.	MIPRO	2021	DBLP DOI BibTeX RDF
15	Binghui Wang, Haigang Yang, Yiping Jia	A 3-6GHz 5-to-512 Multiplier Adaptive Fast-Locking Self-Biased PLL in 28nm CMOS.	ISCAS	2021	DBLP DOI BibTeX RDF
15	Luchuan Zhang, Shichang Zhong, Yue Chen, Shijun Tang, Chunmei Sun	Design of a Novel S-band Broadband CW Self-biased GaN Power Amplifier for Communication.	ICCBN	2021	DBLP DOI BibTeX RDF
15	Zhao Zhang 0004, Guang Zhu, Can Wang 0009, Li Wang 0083, C. Patrick Yue	A 32-Gb/s 0.46-pJ/bit PAM4 CDR Using a Quarter-Rate Linear Phase Detector and a Self-Biased PLL-Based Multiphase Clock Generator.	IEEE J. Solid State Circuits	2020	DBLP DOI BibTeX RDF
15	Mirza I. Bichurin, Roman V. Petrov, Viktor S. Leontiev, Oleg V. Sokolov, Andrei V. Turutin, Victor V. Kuts, Ilya V. Kubasov, Aleksandr M. Kislyuk, Alexander A. Temirov, Mikhail D. Malinkovich, Yuriy N. Parkhomenko	Self-Biased Bidomain LiNbO3/Ni/Metglas Magnetoelectric Current Sensor.	Sensors	2020	DBLP DOI BibTeX RDF
15	Chulhyun Park, Tao Chen 0006, Kyoohyun Noh, Dadian Zhou, Suraj Prakash, Mohammadhossein Naderi Alizadeh, Aydin I. Karsilayan, Degang Chen 0001, Randall L. Geiger, José Silva-Martínez	A 12-Bit 125-MS/s 2.5-Bit/Cycle SAR-Based Pipeline ADC Employing a Self-Biased Gain Boosting Amplifier.	IEEE Trans. Circuits Syst.	2020	DBLP DOI BibTeX RDF
15	Yuwei Wang, Quan Sun, Hongrui Luo, Xiaofei Wang, Ruizhi Zhang 0002, Hong Zhang 0009	A 48 pW, 0.34 V, 0.019%/V Line Sensitivity Self-Biased Subthreshold Voltage Reference With DIBL Effect Compensation.	IEEE Trans. Circuits Syst. I Regul. Pap.	2020	DBLP DOI BibTeX RDF
15	Fabián Leonardo Cabrera	Exploring the Advantages of Single-Ended-Input CMOS Self-Biased Amplifiers.	IEEE Trans. Circuits Syst. II Express Briefs	2020	DBLP DOI BibTeX RDF
15	Bo Yi, Yi Feng Peng, Qing Zhao, MouFu Kong, Junji Cheng, Haimeng Huang	Simulation study of an ultra-low specific on-resistance high-voltage pLDMOS with self-biased accumulation layer.	IEICE Electron. Express	2020	DBLP DOI BibTeX RDF
15	Xiao Sha, Yuanfei Huang, Tutu Wan, Yasha Karimi, Samir R. Das, Petar M. Djuric, Milutin Stanacevic	A Self-Biased Low Modulation Index ASK Demodulator for Implantable Devices.	ISCAS	2020	DBLP DOI BibTeX RDF
15	Jongpal Kim, Hyoungho Ko	Self-Biased Ultralow Power Current-Reused Neural Amplifier With On-Chip Analog Spike Detections.	IEEE Access	2019	DBLP DOI BibTeX RDF
15	Ang Hu, Dongsheng Liu, Kefeng Zhang	A 0.03- to 3.6-GHz Frequency Synthesizer With Self-Biased VCO and Quadrature-Input Quadrature-Output Frequency Divider.	IEEE Trans. Circuits Syst. II Express Briefs	2019	DBLP DOI BibTeX RDF
15	Evandro Bolzan, Elias Bühler Storck, Márcio C. Schneider, Carlos Galup-Montoro	Design and testing of a CMOS Self-Biased Current Source.	ICECS	2019	DBLP DOI BibTeX RDF
15	Yongjie Cui, Yu Cao, Manyam Pilla, Edward Beam, Andy Xie, Cathy Lee, Andrew Ketterson, Michael Roach 0003, Anton Geiler, Michael Geiler, Lee Burns, Douglas Linkhart	Integration of Self-Biased Circulators on GaN/SiC for Ka-band RF application.	DRC	2019	DBLP DOI BibTeX RDF
15	Jaehong Jung, Ik-Hwan Kim, Seong-Jin Kim, Yoonmyung Lee, Jung-Hoon Chun	A 1.08-nW/kHz 13.2-ppm/°C Self-Biased Timer Using Temperature-Insensitive Resistive Current.	IEEE J. Solid State Circuits	2018	DBLP DOI BibTeX RDF
15	Minseon Park, Sung Min Park	A CMOS symmetric self-biased voltage reference.	Microelectron. J.	2018	DBLP DOI BibTeX RDF
15	Jongpal Kim, Hankyu Lee, Hyoungho Ko	0.6 V, 116 nW Neural Spike Acquisition IC with Self-Biased Instrumentation Amplifier and Analog Spike Extraction.	Sensors	2018	DBLP DOI BibTeX RDF
15	Giorgio Polli, Marco Vittori, Walter Ciccognani, Sergio Colangeli, Ferdinando Costanzo, Alessandro Salvucci, Ernesto Limiti	Ka-/V-band self-biased LNAs in 70 nm GaAs/InGaAs Technology.	PRIME	2018	DBLP DOI BibTeX RDF
15	Mohammed Al-Qadasi, Abdullah Alshehri 0003, Talal Al-Attar, Hossein Fariborzi	A Self-Biased Schmitt Trigger for Low Power Applications.	ICECS	2018	DBLP DOI BibTeX RDF
15	Wen Zhou, Joseph Um, Bethanie J. H. Stadler, Rhonda Franklin	Design of self-biased coplanar circulator with ferromagnetic nanowires.	RWS	2018	DBLP DOI BibTeX RDF
15	Masoud Seifaei, Daniel DeDorigo, David Ingvar Fleig, Matthias Kuhl, Ute Zschieschang, Hagen Klauk, Yiannos Manoli	Stable, Self-Biased and High-Gain Organic Amplifiers with Reduced Parameter Variation Effect.	A-SSCC	2018	DBLP DOI BibTeX RDF
15	Naizao Zhong, Runxi Zhang, Chunqi Shi, Jinghong Chen	A Bandwidth-Tracking Self-Biased 5-to-2800 MHz Low-Jitter Clock Generator in 55nm CMOS.	APCCAS	2018	DBLP DOI BibTeX RDF
15	Seungnam Choi, Yunjae Suh, Joohyun Lee, Jinkyu Kim, Byungsub Kim, Hong-June Park, Jae-Yoon Sim	A Self-Biased Current-Mode Amplifier With an Application to 10-bit Pipeline ADC.	IEEE Trans. Circuits Syst. I Regul. Pap.	2017	DBLP DOI BibTeX RDF
15	Mahmoud H. Ouda, Waleed Khalil, Khaled N. Salama	Self-Biased Differential Rectifier With Enhanced Dynamic Range for Wireless Powering.	IEEE Trans. Circuits Syst. II Express Briefs	2017	DBLP DOI BibTeX RDF
15	Arthur Campos de Oliveira, David Cordova, Hamilton Klimach, Sergio Bampi	Picowatt, 0.45-0.6 V Self-Biased Subthreshold CMOS Voltage Reference.	IEEE Trans. Circuits Syst. I Regul. Pap.	2017	DBLP DOI BibTeX RDF
15	Zhao Zhang 0004, Jincheng Yang, Liyuan Liu, Peng Feng 0001, Jian Liu 0021, Nanjian Wu	A 1.25-to-6.25 GHz -237.2-dB FOM wideband self-biased PLL for multi-rate serial link data transmitter.	IEICE Electron. Express	2017	DBLP DOI BibTeX RDF
15	Xiaoying Deng, Xin Lin, Mingcheng Zhu	A 0.23 mW self-biased current-reuse CMOS LC-VCO based on novel interposed network.	IEICE Electron. Express	2017	DBLP DOI BibTeX RDF
15	Arthur Liraneto Torres Costa, Hamilton Klimach, Sergio Bampi	A high IIP3 6.5 mW self-biased 0.3-3 GHz small area LNA.	LASCAS	2017	DBLP DOI BibTeX RDF
15	Mark Eric C. Andam, Charlene Mae P. Canja, Mycel A. Capilayan	A Design of Self-biased Cross Coupled Rectifier with Integrated Dual Threshold Voltage for RF Energy Harvesting Application.	ANT/SEIT	2017	DBLP DOI BibTeX RDF
15	Umais Tayyab, Hamza Shahid, Hussain Alzaher	A self-biased active precision rectifier for Energy harvesting systems.	SDD	2017	DBLP DOI BibTeX RDF
15	Tsugutomo Kudoh, Fumihiko Sugawara, Hirotaka Tsushima	A study of electrical properties when low-loss, self-biased channel diodes are used as bypass diodes for photovoltaic panels.	GCCE	2017	DBLP DOI BibTeX RDF
15	Nikhil Raj, Ashutosh Kumar Singh 0001, Anil Kumar Gupta	Low Voltage High Output Impedance Bulk-Driven Quasi-Floating Gate Self-Biased High-Swing Cascode Current Mirror.	Circuits Syst. Signal Process.	2016	DBLP DOI BibTeX RDF
15	Nikhil Raj, Ashutosh Kumar Singh 0001, Anil Kumar Gupta	Low voltage high performance bulk driven quasi-floating gate based self-biased cascode current mirror.	Microelectron. J.	2016	DBLP DOI BibTeX RDF
15	Bahman Kheradmand Boroujeni, Georg Cornelius Schmidt, Daniel Höft, Maxi Bellmann, Katherina Haase, Koichi Ishida, Reza Shabanpour, Tilo Meister, Corrado Carta, Pol Ghesquière, Arved C. Hübler, Frank Ellinger	A Fully-Printed Self-Biased Polymeric Audio Amplifier for Driving Fully-Printed Piezoelectric Loudspeakers.	IEEE Trans. Circuits Syst. I Regul. Pap.	2016	DBLP DOI BibTeX RDF
15	Leandro Liber Malavolta, Robson L. Moreno, Tales C. Pimenta	A self-biased operational amplifier of constant gm for 1.5 V rail-to-rail operation in 130nm CMOS.	ICM	2016	DBLP DOI BibTeX RDF
15	Reza Erfani, Fatemeh Marefat, Mehdi Ehsanian	Highly phase-linear self-biased CMOS IR-UWB LNA with Sub-ps group-delay variations.	ICM	2016	DBLP DOI BibTeX RDF
15	Arthur Liraneto Torres Costa, Hamilton Klimach, Sergio Bampi	A 450 mV supply self-biased wideband inductorless balun LNA for sub-GHz applications.	SBCCI	2016	DBLP DOI BibTeX RDF
15	Javier Alejandro Martínez Nieto, María Teresa Sanz-Pascual, Nicolás J. Medrano-Marqués, Belén Calvo López	Self-biased class AB CMOS current buffer.	LASCAS	2016	DBLP DOI BibTeX RDF
15	Tae-Kwang Jang, Myungjoon Choi, Seokhyeon Jeong, Suyoung Bang, Dennis Sylvester, David T. Blaauw	5.8 A 4.7nW 13.8ppm/°C self-biased wakeup timer using a switched-resistor scheme.	ISSCC	2016	DBLP DOI BibTeX RDF
15	Hengzhou Yuan, Yang Guo 0003, Yao Liu, Bin Liang, Qian-cheng Guo, Jia-wei Tan	A low-jitter self-biased phase-locked loop for SerDes.	ISOCC	2016	DBLP DOI BibTeX RDF
15	Toshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa	A 0.38-μW stand-by power, 50-nA-to-1-mA load current range DC-DC converter with self-biased linear regulator for ultra-low power battery management.	A-SSCC	2016	DBLP DOI BibTeX RDF
15	Chundong Wu, Wang Ling Goh, Wei Mao, Lei Wang 0070, Yat-Hei Lam, Alan Chang, Yong Lian 0001	A self biased full range current sensor for buck regulator.	APCCAS	2016	DBLP DOI BibTeX RDF
15	Yong Lim, Michael P. Flynn	A 100 MS/s, 10.5 Bit, 2.46 mW Comparator-Less Pipeline ADC Using Self-Biased Ring Amplifiers.	IEEE J. Solid State Circuits	2015	DBLP DOI BibTeX RDF
15	Seied Zaniar Hoseini, Johar Abdekhoda, Kye-Shin Lee	An Ultra Low Voltage Low Power Self Biased Latched Comparator with Wide Input Common Mode Range for Biomedical Applications.	J. Circuits Syst. Comput.	2015	DBLP DOI BibTeX RDF
15	Omar Abdelfattah, Gordon W. Roberts, Ishiang Shih, Yi-Chi Shih	An Ultra-Low-Voltage CMOS Process-Insensitive Self-Biased OTA With Rail-to-Rail Input Range.	IEEE Trans. Circuits Syst. I Regul. Pap.	2015	DBLP DOI BibTeX RDF
15	Xian Zhang, Hhua Liu, Lei Li	A low jitter phase-locked loop based on self-biased techniques.	IEICE Electron. Express	2015	DBLP DOI BibTeX RDF
15	Oscar E. Mattia, Hamilton Klimach, Sergio Bampi, Márcio C. Schneider	0.7 V supply self-biased nanoWatt MOS-only threshold voltage monitor.	ISCAS	2015	DBLP DOI BibTeX RDF
15	Omar Abdelfattah, Gordon W. Roberts, Ishiang Shih, Yi-Chi Shih	A 0.35-V bulk-driven self-biased OTA with rail-to-rail input range in 65 nm CMOS.	ISCAS	2015	DBLP DOI BibTeX RDF
15	Mudasir Bashir, Sreehari Rao Patri, K. S. R. Krishna Prasad	High speed self biased current sense amplifier for low power CMOS SRAM's.	VDAT	2015	DBLP DOI BibTeX RDF
15	Alfio Dario Grasso, Davide Marano, Fermin Esparza-Alfaro, Antonio J. López-Martín, Gaetano Palumbo, Salvatore Pennisi	Self-Biased Dual-Path Push-Pull Output Buffer Amplifier for LCD Column Drivers.	IEEE Trans. Circuits Syst. I Regul. Pap.	2014	DBLP DOI BibTeX RDF
15	Reza Erfani, Fatemeh Marefat, Mehdi Ehsanian	Self-biased resistive-feedback current-reused CMOS UWB LNA with 1.7dB nf for IR-UWB applications.	ICM	2014	DBLP DOI BibTeX RDF
15	Pedro Toledo, Hamilton Klimach, David Cordova, Sergio Bampi, Eric E. Fabris	Self-biased CMOS Current Reference based on the ZTC Operation Condition.	SBCCI	2014	DBLP DOI BibTeX RDF
15	Yong Lim, Michael P. Flynn	11.5 A 100MS/s 10.5b 2.46mW comparator-less pipeline ADC using self-biased ring amplifiers.	ISSCC	2014	DBLP DOI BibTeX RDF
15	Stefano Stanzione, Chris van Liempd, Rob van Schaijk, Yasuyuki Naito, Refet Firat Yazicioglu, Chris Van Hoof	A High Voltage Self-Biased Integrated DC-DC Buck Converter With Fully Analog MPPT Algorithm for Electrostatic Energy Harvesters.	IEEE J. Solid State Circuits	2013	DBLP DOI BibTeX RDF
15	Bhawna Aggarwal, Maneesha Gupta, Anil Kumar Gupta	Analysis of low voltage bulk-driven self-biased high swing cascode current mirror.	Microelectron. J.	2013	DBLP DOI BibTeX RDF
15	Kemal Ozanoglu, Selçuk Talay	Effects of the positive feedback loop in self biased bandgap reference circuits.	VLSI-SoC	2013	DBLP DOI BibTeX RDF
15	Vladimir M. Milovanovic, Horst Zimmermann	A 40 nm LP CMOS self-biased continuous-time comparator with sub-100ps delay at 1.1V & 1.2mW.	ESSCIRC	2013	DBLP DOI BibTeX RDF