Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
139 | Khurram Waheed, Robert Bogdan Staszewski, John L. Wallberg |
Injection Spurs due to Reference Frequency Retiming by a Channel Dependent Clock at the ADPLL RF Output and its Mitigation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 3291-3294, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
62 | Andrew T. K. Tang |
Bandpass spread spectrum clocking for reduced clock spurs in autozeroed amplifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 663-666, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
58 | Debapriya Sahu |
A Completely Integrated Low Jitter CMOS PLL for Analog Front Ends in Systems on Chip Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 360-365, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
48 | Frederick M. Bingham |
Subfootprint Variability of Sea Surface Salinity Observed during the SPURS-1 and SPURS-2 Field Campaigns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Remote. Sens. ![In: Remote. Sens. 11(22), pp. 2689, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
48 | Paul P. Sotiriadis |
Spurs-Free Single-Bit-Output All-Digital Frequency Synthesizers With Forward and Feedback Spurs and Noise Cancellation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(5), pp. 567-576, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
48 | Sumit A. Talwalkar |
Digital-to-Time Synthesizers: Separating Delay Line Error Spurs and Quantization Error Spurs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(10), pp. 2597-2605, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
38 | T.-L. Hung, J.-L. Huang |
A Low Cost Spectral Power Extraction Technique for RF Transceiver Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 25th IEEE VLSI Test Symposium (VTS 2007), 6-10 May 2007, Berkeley, California, USA, pp. 389-394, 2007, IEEE Computer Society, 0-7695-2812-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
38 | Paul V. Brennan, Dai Jiang, Jianxin Zhang |
Analyses of intermodulation effects in fractional-N frequency synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 2243-2246, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
38 | Volodymyr Kratyuk, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram |
A low spur fractional-N frequency synthesizer architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 2807-2810, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
38 | Jouko Vankka, Jonne Lindeberg, Kari Halonen |
Direct digital synthesizer with tunable phase and amplitude error feedback structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 785-788, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
38 | A. E. Hussein, Mohamed I. Elmasry |
Fractional-N frequency synthesizer for wireless communications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 513-516, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
38 | Woogeun Rhee, Akbar Ali |
An on-chip phase compensation technique in fractional-N frequency synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 363-366, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
36 | Himanshu Arora, Nikolaus Klemmer, Patrick D. Wolf |
A 900 MHz ISM band mash-12 fractional-n frequency synthesizer for 5-Mbps data transmission. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 381-386, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
RMS phase error, delta-sigma, fractional-N, gain mismatch, phase frequency detector, spurs, thermal noise, VCO, phase noise, frequency synthesizer, charge pump |
24 | Mahmoud A. Khalil, Mohamed Badr Younis, Ruhao Xia, Ahmed E. AbdelRahman, Tianyu Wang 0006, Kyu-Sang Park, Pavan Kumar Hanumolu |
7.8 A 69.3fs Ring-Based Sampling-PLL Achieving 6.8GHz-14GHz and -54.4dBc Spurs Under 50mV Supply Noise. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024, pp. 138-140, 2024, IEEE, 979-8-3503-0620-0. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
24 | Michael Peter Kennedy, Valerio Mazzaro, Stefano Tulisi, Micheál Scully, Niall McDermott, James Breslin |
10.4 A 45.5fs-Integrated-Random-Jitter and -75dBc-Integer-Boundary-Spur BiCMOS Fractional-N PLL with Suppression of Fractional, Horn, and Wandering Spurs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024, pp. 194-196, 2024, IEEE, 979-8-3503-0620-0. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
24 | Sumit Kumar, Gaurab Banerjee |
An Improved Charge-Pump Design to Increase Tuning Range and Reduce Spurs in FMCW Radar Synthesizers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSID ![In: 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, VLSID 2024, Kolkata, India, January 6-10, 2024, pp. 96-100, 2024, IEEE, 979-8-3503-8440-6. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
24 | Zhe Li 0014, Elizabeth J. Thompson, Haonan Chen 0001 |
The Uncertainty of IMERG Over the Western Edge of the Eastern Pacific Fresh Pool: An Error Model Based on SPURS-2 Field Campaign Observations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Geosci. Remote. Sens. ![In: IEEE Trans. Geosci. Remote. Sens. 61, pp. 1-14, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
24 | Ang Hu, Zirui Jin, Xiaoyu Shan, Mengming Zhang, Dongsheng Liu, Xuecheng Zou |
Fractional Spurs Reduction Technique Using Probability Density Shaping Sigma-Delta Modulator and Fractional Frequency Divider. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 70(2), pp. 456-460, February 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
24 | Shlomo Engelberg |
Education I&M: Seeing Phase Truncation Spurs in the Output of Direct Digital Synthesizers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Instrum. Meas. Mag. ![In: IEEE Instrum. Meas. Mag. 26(9), pp. 38-44, December 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
24 | Xu Wang, Michael Peter Kennedy |
Comparison of DTC-Related Spurs in Fractional-N Digital PLLs with MASH-and-ENOP-based Divider Controllers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 30th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2023, Istanbul, Turkey, December 4-7, 2023, pp. 1-5, 2023, IEEE, 979-8-3503-2649-9. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
24 | Dingxin Xu, Yuncheng Zhang, Hongye Huang, Zheng Sun, Bangan Liu, Ashbir Aviat Fadila, Junjun Qiu, Zezheng Liu, Wenqian Wang, Yuang Xiong, Waleed Madany, Atsushi Shirane, Kenichi Okada |
A 6.5-to-8GHz Cascaded Dual-Fractional-N Digital PLL Achieving -63.7dBc Fractional Spurs with 50MHz Reference. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: IEEE Custom Integrated Circuits Conference, CICC 2023, San Antonio, TX, USA, April 23-26, 2023, pp. 1-2, 2023, IEEE, 979-8-3503-9948-6. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
24 | Yumeng Yang, Wei Deng 0001, Angxiao Yan, Haikun Jia, Junlong Gong, Zhihua Wang 0001, Baoyong Chi |
A 10-to-300MHz Fractional Output Divider with -80dBc Worst-Case Fractional Spurs Using Auxiliary-PLL-Based Background 0th/1st/2nd-Order DTC INL Calibration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid- State Circuits Conference, ISSCC 2023, San Francisco, CA, USA, February 19-23, 2023, pp. 228-229, 2023, IEEE, 978-1-6654-9016-0. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
24 | Masaru Osada, Zule Xu, Ryoya Shibata, Tetsuya Iizuka |
Analysis of Offset Spurs in Phase-Locked-Loops Employing Harmonic-Mixer-Based Feedback With Sample-and-Hold Operation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 69(12), pp. 5072-5084, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
24 | Michael Peter Kennedy, Valerio Mazzaro, Dawei Mai |
Nonlinearity-Induced Spurs in Fractional-N Frequency Synthesizers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 69(6), pp. 2617-2622, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
24 | Xingbo Yin, Xiaohua Zong |
International student mobility spurs scientific research on foreign countries: Evidence from international students studying in China. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Informetrics ![In: J. Informetrics 16(1), pp. 101227, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
24 | Xin Lei, Junan Zhang, Jun Deng, Peng Yin 0004, Zhou Shu, Fang Tang |
An Automatic Clock-Induced-Spurs Detector Based on Energy Detection for Direct Digital Frequency Synthesizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 22(9), pp. 3396, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
24 | Dawei Mai, Michael Peter Kennedy |
Wandering Spurs in MASH-Based Fractional-N Frequency Synthesizers - How They Arise and How to Get Rid of Them ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2022 |
DOI RDF |
|
24 | Valerio Mazzaro, Michael Peter Kennedy |
Immunity of ENOP-based Fractional-N Frequency Synthesizer to Wandering and Horn Spurs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRIME ![In: 17th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2022, Villasimius, SU, Italy, June 12-15, 2022, pp. 1-4, 2022, IEEE, 978-1-6654-6700-1. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
24 | Zhong Gao, Jingchu He, Martin Fritz, Jiang Gong, Yiyu Shen, Zhirui Zong, Peng Chen 0022, Gerd Spalink, Ben Eitel, Ken Yamamoto, Robert Bogdan Staszewski, Morteza S. Alavi, Masoud Babaie |
A 2.6-to-4.1GHz Fractional-N Digital PLL Based on a Time-Mode Arithmetic Unit Achieving -249.4dB FoM and -59dBc Fractional Spurs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2022, San Francisco, CA, USA, February 20-26, 2022, pp. 380-382, 2022, IEEE, 978-1-6654-2800-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
24 | Dawei Mai, Michael Peter Kennedy |
MASH-Based Divider Controllers for Mitigation of Wandering Spurs in a Fractional-N Frequency Synthesizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 68(1), pp. 126-137, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
24 | Mark D. Hickle, Kevin Grout, Curtis Grens, Gregory M. Flewelling, Steven Eugene Turner |
A Single-Chip 25.3-28.0 GHz SiGe BiCMOS PLL with -134 dBc/Hz Phase Noise at 10 MHz Offset and -96 dBc Reference Spurs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BCICTS ![In: IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, BCICTS 2021, Monterey, CA, USA, December 5-8, 2021, pp. 1-4, 2021, IEEE, 978-1-6654-3990-9. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
24 | Frederick M. Bingham, Zhijin Li |
Spatial Scales of Sea Surface Salinity Subfootprint Variability in the SPURS Regions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Remote. Sens. ![In: Remote. Sens. 12(23), pp. 3996, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
24 | Lingbo Cheng, Mahdi Tavakoli |
COVID-19 Pandemic Spurs Medical Telerobotic Systems: A Survey of Applications Requiring Physiological Organ Motion Compensation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Frontiers Robotics AI ![In: Frontiers Robotics AI 7, pp. 594673, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
24 | Valerio Mazzaro, Michael Peter Kennedy |
Mitigation of "Horn Spurs" in a MASH-Based Fractional-N CP-PLL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 67-II(5), pp. 821-825, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
24 | Hossein Rahmanian Kooshkaki, Patrick P. Mercier |
A 0.55mW Fractional-N PLL with a DC-DC Powered Class-D VCO Achieving Better than -66dBc Fractional and Reference Spurs for NB-IoT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: 2020 IEEE Custom Integrated Circuits Conference, CICC 2020, Boston, MA, USA, March 22-25, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-6031-3. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
24 | Luigi Grimaldi, Dmytro Cherniak, Werner Grollitsch, Roberto Nonis |
Analysis of Spurs Impact in PLL-Based FMCW Radar Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-3320-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
24 | Yann Donnelly, Michael Peter Kennedy |
Prediction of Phase Noise and Spurs in a Nonlinear Fractional-N Frequency Synthesizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(11), pp. 4108-4121, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
24 | Yann Donnelly, Michael Peter Kennedy |
Wandering Spurs in MASH 1-1 Delta-Sigma Modulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(7), pp. 2426-2439, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
24 | Dawei Mai, Adil Dahlan, Michael Peter Kennedy |
MASH DDSM-Induced Spurs in a Fractional-N Frequency Synthesizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019, Genoa, Italy, November 27-29, 2019, pp. 13-16, 2019, IEEE, 978-1-7281-0996-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
24 | Valerio Mazzaro, Michael Peter Kennedy |
Observations concerning "Horn Spurs" in a MASH-based Fractional-N CP-PLL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019, Genoa, Italy, November 27-29, 2019, pp. 17-20, 2019, IEEE, 978-1-7281-0996-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
24 | Michael Peter Kennedy |
Nonlinearity-Induced Spurs in Fractional-N Frequency Synthesizers: State of the Art. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019, Genoa, Italy, November 27-29, 2019, pp. 823-826, 2019, IEEE, 978-1-7281-0996-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
24 | Dihang Yang, Asad A. Abidi, Hooman Darabi, Hao Xu 0005, David Murphy, Hao Wu 0026, Zhaowen Wang |
A Calibration-Free Triple-Loop Bang-Bang PLL Achieving 131fsrms Jitter and-70dBc Fractional Spurs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid- State Circuits Conference, ISSCC 2019, San Francisco, CA, USA, February 17-21, 2019, pp. 266-268, 2019, IEEE, 978-1-5386-8531-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
24 | Silvester Sadjina, Krzysztof Dufrene, Ram Sunil Kanumalli, Mario Huemer, Harald Pretl |
A Mixed-Signal Circuit Technique for Cancellation of Multiple Modulated Spurs in 4G/5G Carrier-Aggregation Transceivers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid- State Circuits Conference, ISSCC 2019, San Francisco, CA, USA, February 17-21, 2019, pp. 356-358, 2019, IEEE, 978-1-5386-8531-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
24 | Chen-Ting Ko, Ting-Kuei Kuan, Ruei-Pin Shen, Chih-Hsien Chang, Kenny Hsieh, Mark Chen 0001 |
A 387.6fs Integrated Jitter and -80dBc Reference Spurs Ring based PLL with Track- and-Hold Charge Pump and Automatic Loop Gain Control in 7nm FinFET CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, pp. 164-, 2019, IEEE, 978-4-86348-720-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
24 | Debdut Biswas, Tarun Kanti Bhattacharyya |
A Model of Spurs for Delta-Sigma Fractional PLLs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSID ![In: 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, VLSID 2019, Delhi, India, January 5-9, 2019, pp. 512-513, 2019, IEEE, 978-1-7281-0409-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
24 | Christopher Marquis, Yanhua Bird |
The Paradox of Responsive Authoritarianism: How Civic Activism Spurs Environmental Penalties in China. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Organ. Sci. ![In: Organ. Sci. 29(5), pp. 948-968, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
24 | Dawei Mai, Hongjia Mo, Michael Peter Kennedy |
Observations and Analysis of Wandering Spurs in MASH-Based Fractional-N Frequency Synthesizers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 65-II(5), pp. 662-666, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
24 | Feng-Wei Kuo, Masoud Babaie, Huan-Neng Ron Chen, Lan-Chou Cho, Chewnpu Jou, Mark Chen 0001, Robert Bogdan Staszewski |
An All-Digital PLL for Cellular Mobile Phones in 28-nm CMOS with -55 dBc Fractional and -91 dBc Reference Spurs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11), pp. 3756-3768, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
24 | Tingbing Ouyang, Kanglin Xiao, Xiaoqi Lin, Changpei Qiu, Bo Wang 0016 |
A multi-phase detecting method for spurs cancellation in all digital fractional-N phase-lock loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: IEEE 61st International Midwest Symposium on Circuits and Systems, MWSCAS 2018, Windsor, ON, Canada, August 5-8, 2018, pp. 647-650, 2018, IEEE, 978-1-5386-7392-8. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
24 | Gregory Darcheville, Cyril Voillequin, Jean-Baptiste Bégueret |
Direct Digital Frequency Synthesis design methodology for optimized spurs / jitter performances. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 25th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2018, Bordeaux, France, December 9-12, 2018, pp. 733-736, 2018, IEEE, 978-1-5386-9562-3. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
24 | Shravan S. Nagam, Peter R. Kinget |
A 0.008mm2 2.4GHz type-I sub-sampling ring-oscillator-based phase-locked loop with a -239.7dB FoM and -64dBc reference spurs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: 2018 IEEE Custom Integrated Circuits Conference, CICC 2018, San Diego, CA, USA, April 8-11, 2018, pp. 1-4, 2018, IEEE, 978-1-5386-2483-8. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
24 | Cheng-Ru Ho, Mike Shuo-Wei Chen |
A fractional-N digital PLL with background-dither-noise-cancellation loop achieving <-62.5dBc worst-case near-carrier fractional spurs in 65nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018, pp. 394-396, 2018, IEEE, 978-1-5090-4940-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
24 | Jahnavi Sharma, Harish Krishnaswamy |
A dividerless reference-sampling RF PLL with -253.5dB jitter FOM and <-67dBc Reference Spurs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018, pp. 258-260, 2018, IEEE, 978-1-5090-4940-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
24 | Ahmed I. Hussein, Sriharsha Vasadi, Jeyanandh Paramesh |
A 50-66-GHz Phase-Domain Digital Frequency Synthesizer With Low Phase Noise and Low Fractional Spurs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 52(12), pp. 3329-3347, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
24 | Amir Kiperwas, Daniel Rosenfeld, Yonina C. Eldar |
The SPURS Algorithm for Resampling an Irregularly Sampled Signal onto a Cartesian Grid. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Medical Imaging ![In: IEEE Trans. Medical Imaging 36(2), pp. 628-640, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
24 | Tom Verhoeff |
The spurs of D. H. Lehmer - Hamiltonian paths in neighbor-swap graphs of permutations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Des. Codes Cryptogr. ![In: Des. Codes Cryptogr. 84(1-2), pp. 295-310, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
24 | Federico Bizzarri, Angelo Brambilla, Alessandro Colombo, Sergio Callegari |
Constant-time discontinuity map for forward sensitivity analysis to initial conditions: Spurs detection in fractional-N PLL as a case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017, pp. 1-4, 2017, IEEE, 978-1-4673-6853-7. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
24 | Amir Kiperwas, Daniel Rosenfeld, Yonina C. Eldar |
The SPURS Algorithm for Resampling an Irregularly Sampled Signal onto a Cartesian Grid. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1603.04726, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP BibTeX RDF |
|
24 | Jianwu Dong, Tian Liu, Feng Chen 0007, Dong Zhou, Alexey Dimov, Ashish Raj, Qiang Cheng, Pascal Spincemaille, Yi Wang 0028 |
Simultaneous Phase Unwrapping and Removal of Chemical Shift (SPURS) Using Graph Cuts: Application in Quantitative Susceptibility Mapping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Medical Imaging ![In: IEEE Trans. Medical Imaging 34(2), pp. 531-540, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
24 | Jianyu Zhao, Xi Xi, Su Yi |
Resource allocation under a strategic alliance: How a cooperative network with knowledge flow spurs co-evolution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Knowl. Based Syst. ![In: Knowl. Based Syst. 89, pp. 497-508, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
24 | Pao-Lung Chen, Ting-Yao Chen |
Digitally controlled oscillator with storage based randomization for spurs reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCE-TW ![In: IEEE International Conference on Consumer Electronics - Taiwan, ICCE-TW 2015, Taipei, Taiwan, June 6-8, 2015, pp. 450-451, 2015, IEEE, 978-1-4799-8745-0. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
24 | Paul P. Sotiriadis |
Spurs-free single-bit-output frequency synthesizers for fully-digital RF transmitters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, May 24-27, 2015, pp. 2561-2564, 2015, IEEE, 978-1-4799-8391-9. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
24 | Ye Zhang 0003, Ralf Wunderlich, Stefan Heinen |
A low-complexity low-spurs digital architecture for wideband PLL applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 45(7), pp. 842-847, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
24 | Amin Ojani, Behzad Mesgarzadeh, Atila Alvandpour |
Modeling and Analysis of Harmonic Spurs in DLL-Based Frequency Synthesizers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(11), pp. 3075-3084, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
24 | Jorge F. Schmidt, Roberto López-Valcarce |
OFDM spectrum sculpting with active interference cancellation: Keeping spectral spurs at bay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP ![In: IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 2014, Florence, Italy, May 4-9, 2014, pp. 8053-8057, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
24 | Nicolas Le Dortz, Jean-Pierre Blanc, Thierry Simon, Sarah Verhaeren, Emmanuel Rouat, Pascal Urard, Stéphane Le Tual, Dimitri Goguet, Caroline Lelandais-Perrault, Philippe Bénabès |
22.5 A 1.62GS/s time-interleaved SAR ADC with digital background mismatch calibration achieving interleaving spurs below 70dBFS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2014 IEEE International Conference on Solid-State Circuits Conference, ISSCC 2014, Digest of Technical Papers, San Francisco, CA, USA, February 9-13, 2014, pp. 386-388, 2014, IEEE, 978-1-4799-0918-6. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
24 | Mohyee Mikhemar, David Murphy, Ahmad Mirzaei, Hooman Darabi |
A Cancellation Technique for Reciprocal-Mixing Caused by Phase Noise and Spurs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 48(12), pp. 3080-3089, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
24 | Vahideh Sadat Sadeghi, Hossein Miar Naimi, Michael Peter Kennedy |
The Role of Charge Pump Mismatch in the Generation of Integer Boundary Spurs in Fractional-N Frequency Synthesizers: Why Worse Can Be Better. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 60-II(12), pp. 862-866, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
24 | M. Reza Sadeghifar, J. Jacob Wikner |
Modeling and analysis of aliasing image spurs problem in digital-RF-converter-based IQ modulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013, pp. 578-581, 2013, IEEE, 978-1-4673-5760-9. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
24 | Tai-You Lu, Wei-Zen Chen |
A 3-10 GHz, 14 Bands CMOS Frequency Synthesizer With Spurs Reduction for MB-OFDM UWB System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 20(5), pp. 948-958, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
24 | Paul P. Sotiriadis, Kostas Galanopoulos |
Direct All-Digital Frequency Synthesis Techniques, Spurs Suppression, and Deterministic Jitter Correction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(5), pp. 958-968, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
24 | Chengwu Tao, Ayman A. Fayed |
A Buck Converter With Reduced Output Spurs Using Asynchronous Frequency Hopping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 58-II(11), pp. 709-713, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
24 | Liming Xiu, Ming Lin, Hong Jiang |
A Storage-Based Carry Randomization Technique for Spurs Reduction in Flying-Adder Frequency Synthesizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 58-II(6), pp. 326-330, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
24 | Paul-Peter Sotiriadis |
Spurs suppression and deterministic jitter correction in all-digital frequency synthesizers, current state and future directions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil, pp. 422-425, 2011, IEEE, 978-1-4244-9473-6. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
24 | Changhong Huan, Xiushan Wu, Dan Wang |
A charge-pump circuit to restrain reference spurs in the PLL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 2011 IEEE 9th International Conference on ASIC, ASICON 2011, Xiamen, China, October 25-28, 2011, pp. 1010-1013, 2011, IEEE, 978-1-61284-192-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
24 | Colin Weltin-Wu, Enrico Temporiti, Marco Cusmai, Daniele Baldi, Francesco Svelto |
Insights Into Wideband Fractional ADPLLs: Modeling and Calibration of Nonlinearity Induced Fractional Spurs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9), pp. 2259-2268, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
24 | Xiaozhou Yan, Xiaofei Kuang, Nanjian Wu |
An accurate and fast behavioral model for PLL Frequency Synthesizer phase noise/spurs prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: IEEE Custom Integrated Circuits Conference, CICC 2009, San Jose, California, USA, 13-16 September, 2009, Proceedings, pp. 223-226, 2009, IEEE, 978-1-4244-4071-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
24 | Zhuo Gao, D. Kesharwani, Patrick Chiang 0001, Weiwu Hu |
Measuring and Compensating for Process Mismatch-induced, Reference Spurs in Phase-locked Loops using a Sub-sampled DSP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2009), 24-17 May 2009, Taipei, Taiwan, pp. 1585-1588, 2009, IEEE, 978-1-4244-3827-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
24 | Chen-Wei Huang, Ping Gui, Liming Xiu |
A Wide-tuning-range and Reduced-fractional-spurs Synthesizer Combining Sigma-Delta Fractional-N and Integer Flying-Adder Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2009), 24-17 May 2009, Taipei, Taiwan, pp. 1377-1380, 2009, IEEE, 978-1-4244-3827-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
24 | Valentyn A. Solomko, Peter Weger |
Monolithically integrated SD frequency synthesiser with distributed reference spurs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Circuits Devices Syst. ![In: IET Circuits Devices Syst. 2(6), pp. 527-536, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Xiao Pu 0006, Axel Thomsen, Jacob A. Abraham |
Improving Bandwidth while Managing Phase Noise and Spurs in Fractional-N PLL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2008, 7-9 April 2008, Montpellier, France, pp. 168-172, 2008, IEEE Computer Society, 978-0-7695-3170-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Tai-You Lu, Wei-Zen Chen |
A 3-to-10GHz 14-Band CMOS Frequency Synthesizer with Spurs Reduction for MB-OFDM UWB System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008, pp. 126-127, 2008, IEEE, 978-1-4244-2010-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | |
Notice of Violation of IEEE Publication Principles: A low reference spurs 1-5 GHz 0.13 μm CMOS frequency synthesizer using a fully-sampled feed-forward loop filter architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 42(11), pp. 2503-2514, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Xiaopin Zhang |
A Fractional- N Frequency Synthesizer With No Fractional Spurs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 53-II(9), pp. 986-990, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Chirn Chye Boon, Manh Anh Do, Kiat Seng Yeo, Jianguo Ma |
Fully integrated CMOS fractional-N frequency divider for wide-band mobile applications with spurs reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(6), pp. 1042-1048, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
24 | Max-Elie Salomon, Abdelhakim Khouas, Yvon Savaria |
A complete spurs distribution model for direct digital period synthesizers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4859-4862, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
24 | Enrico Temporiti, Guido Albasini, Ivan Bietti, Rinaldo Castello, Matteo Colombo |
A 700-kHz bandwidth ΣΔ fractional synthesizer with spurs compensation and linearization techniques for WCDMA applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 39(9), pp. 1446-1454, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | Hui Pan 0002, Asad A. Abidi |
Spectral spurs due to quantization in Nyquist ADCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(8), pp. 1422-1439, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | Badre Izouggaghen, Abdelhakim Khouas, Yvon Savaria |
Spurs modeling in direct digital period synthesizers related to phase accumulator truncation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 389-392, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | Ivan Bietti, Enrico Temporiti, Guido Albasini, Rinaldo Castello |
An UMTS ΣΔ fractional synthesizer with 200 kHz bandwidth and -128 dBc/Hz @ 1 MHz using spurs compensation and linearization techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE Custom Integrated Circuits Conference, CICC 2003, San Jose, CA, USA, September 21 - 24, 2003, pp. 463-466, 2003, IEEE, 0-7803-7842-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
24 | Jun S. Huang, Wen J. Lee |
A New Thinning Algorithm for Removing Noise-Spurs and Retaining End-points. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Inf. Sci. Eng. ![In: J. Inf. Sci. Eng. 1(1), pp. 45-57, 1985. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP BibTeX RDF |
|
19 | Martin Knöll |
Diabetes City: How Urban Game Design Strategies Can Help Diabetics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
eHealth ![In: Electronic Healthcare, First International Conference, eHealth 2008, London, UK, September 8-9, 2008. Revised Selected Papers, pp. 200-204, 2008, Springer, 978-3-642-00412-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Ubiquitous & Pervasive Computing, Medical Documentation, Diabetes Care, Serious Games, Pervasive Healthcare, Urban Design |
19 | M. Ángeles Serrano, Ana Gabriela Maguitman, Marián Boguñá, Santo Fortunato, Alessandro Vespignani |
Decoding the structure of the WWW: A comparative analysis of Web crawls. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Web ![In: ACM Trans. Web 1(2), pp. 10, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Web graph structure, crawler biases, statistical analysis, Web measurement |
19 | Shuilong Huang, Huainan Ma, Zhihua Wang |
Modeling and simulation to the design of SigmaDelta fractional-N frequency synthesizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 291-296, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Benoit Catteau, Pieter Rombouts, Ludo Weyten |
A Digital Calibration Technique for the Correction of Glitches in High-Speed DAC's. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 1477-1480, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Paul-Peter Sotiriadis |
Diophantine Frequency Synthesis The Mathematical Principles. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 3107-3110, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Barry J. Kronenfeld |
Triangulation of Gradient Polygons: A Spatial Data Model for Categorical Fields. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COSIT ![In: Spatial Information Theory, 8th International Conference, COSIT 2007, Melbourne, Australia, September 19-23, 2007, Proceedings, pp. 421-437, 2007, Springer, 978-3-540-74786-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Pooya Torkzadeh, Armin Tajalli, Seyed Mojtaba Atarodi |
A fractional delay-locked loop for on chip clock generation applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 1300-1309, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Xinhua Chen, Qiuting Huang |
A 9.5mW 4GHz WCDMA frequency synthesizer in 0.13µm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 2005, pp. 66-71, 2005, ACM, 1-59593-137-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
low power, CMOS, WCDMA, phase-locked loop, frequency synthesizer |
19 | Shuenn-Yuh Lee, Chung-Han Cheng, Ming-Feng Huang, Shyh-Chyang Lee |
A 1-V 2.4-GHz low-power fractional-N frequency synthesizer with sigma-delta modulator controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 2811-2814, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|