|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 6 occurrences of 5 keywords
|
|
|
Results
Found 28 publication records. Showing 28 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
71 | Yajun Ran, Malgorzata Marek-Sadowska |
On designing via-configurable cell blocks for regular fabrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 198-203, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
via configurable, layout, regular fabric |
69 | Yajun Ran, Malgorzata Marek-Sadowska |
Designing via-configurable logic blocks for regular fabric. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(1), pp. 1-14, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
55 | Yu-Chen Chen, Hou-Yu Pang, Kuen-Wen Lin, Rung-Bin Lin, Hui-Hsiang Tung, Shih-Chieh Su |
Via configurable three-input lookup-tables for structured ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 49-54, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
via-configurable, layout, look-up-table, vlsi, structured ASIC |
38 | Yajun Ran, Malgorzata Marek-Sadowska |
An integrated design flow for a via-configurable gate array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 582-589, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Yajun Ran, Malgorzata Marek-Sadowska |
Via-Configurable Routing Architectures and Fast Design Mappability Estimation for Regular Fabrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(9), pp. 998-1009, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Yajun Ran, Malgorzata Marek-Sadowska |
The Magic of a Via-Configurable Regular Fabric. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings, pp. 338-343, 2004, IEEE Computer Society, 0-7695-2231-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Riccardo Poiani, Ciprian Stirbu, Alberto Maria Metelli, Marcello Restelli |
Optimizing Empty Container Repositioning and Fleet Deployment via Configurable Semi-POMDPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2207.12509, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Toshinori Sato, Tomoaki Ukezono |
Tolerating Aging-Induced Timing Violations Via Configurable Approximations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GCCE ![In: IEEE 8th Global Conference on Consumer Electronics, GCCE 2019, Osaka, Japan, October 15-18, 2019, pp. 1023-1026, 2019, IEEE, 978-1-7281-3575-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
14 | Vinícius Dal Bem, Felipe S. Marranghello, André Inácio Reis, Renato P. Ribas |
SAT-Based Formulation for Logical Capacity Evaluation of VIA-Configurable Structured ASIC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Emerg. Top. Comput. ![In: IEEE Trans. Emerg. Top. Comput. 5(2), pp. 247-259, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
14 | Vinícius Dal Bem |
SAT based environment for logical capacity evaluation of via configurable block templates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2016 |
RDF |
|
14 | Chiung-Chih Ho, Hsin-Pei Tsai, Liang-Chi Lai, Rung-Bin Lin |
A router for via configurable structured ASIC with standard cells and relocatable IPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: Sixteenth International Symposium on Quality Electronic Design, ISQED 2015, Santa Clara, CA, USA, March 2-4, 2015, pp. 51-56, 2015, IEEE, 978-1-4799-7581-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
14 | Ta-Kai Lin, Kuen-Wey Lin, Chang-Hao Chiu, Rung-Bin Lin |
Logic block and design methodology for via-configurable structured ASIC using dual supply voltages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21 - 23, 2014, pp. 111-116, 2014, ACM, 978-1-4503-2816-6. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
14 | Hsin-Hung Liu, Rung-Bin Lin, I-Lun Tseng |
Relocatable and resizable SRAM synthesis for via configurable structured ASIC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 494-501, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
14 | Hui-Hsiang Tung, Rung-Bin Lin, Mei-Chen Li, Tsung-Han Heish |
Standard Cell Like Via-Configurable Logic Blocks for Structured ASIC in an Industrial Design Flow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 20(12), pp. 2184-2197, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
14 | Hsin-Pei Tsai, Rung-Bin Lin, Liang-Chi Lai |
Design and analysis of via-configurable routing fabrics for structured ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2012 Design, Automation & Test in Europe Conference & Exhibition, DATE 2012, Dresden, Germany, March 12-16, 2012, pp. 1479-1482, 2012, IEEE, 978-1-4577-2145-8. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
14 | Vinícius Dal Bem, André Inácio Reis, Renato P. Ribas |
Lithography analysis of via-configurable transistor-array fabrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NORCHIP ![In: NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, pp. 1-4, 2012, IEEE, 978-1-4673-2221-8. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
14 | Vinícius Dal Bem, Paulo F. Butzen, Carlos Eduardo Klock, Vinicius Callegaro, André Inácio Reis, Renato P. Ribas |
Area impact analysis of via-configurable regular fabric for digital integrated circuit design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: 24th Symposium on Integrated Circuits and Systems Design, SBCCI '11, João Pessoa, Brazil, August 30 - September 2, 2011, pp. 103-108, 2011, ACM, 978-1-4503-0828-1. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
14 | Marc Pons 0001, Francesc Moll, Antonio Rubio 0001, Jaume Abella 0001, Xavier Vera, Antonio González 0001 |
Design of complex circuits using the Via-Configurable transistor array regular layout fabric. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, September 26-28, 2011, pp. 166-169, 2011, IEEE, 978-1-4577-1616-4. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
14 | Liang-Chi Lai, Hsih-Hang Chang, Rung-Bin Lin |
Rover: routing on via-configurable fabrics for standard-cell-like structured ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, Lausanne, Switzerland, May 2-6, 2011, pp. 37-42, 2011, ACM, 978-1-4503-0667-6. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
14 | Marc Pons 0001, Francesc Moll, Antonio Rubio 0001, Jaume Abella 0001, Xavier Vera, Antonio González 0001 |
VCTA: A Via-Configurable Transistor Array regular fabric. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: 18th IEEE/IFIP VLSI-SoC 2010, IEEE/IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Madrid, Spain, 27-29 September 2010, pp. 335-340, 2010, IEEE. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
14 | Rung-Bin Lin, I-Wei Lee, Wen-Hao Chen |
Clock routing for structured ASICs with via-configurable fabrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 11th International Symposium on Quality of Electronic Design (ISQED 2010), 22-24 March 2010, San Jose, CA, USA, pp. 777-784, 2010, IEEE, 978-1-4244-6455-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
14 | Mei-Chen Li, Hui-Hsiang Tung, Chien-Chung Lai, Rung-Bin Lin |
Standard Cell Like Via-Configurable Logic Block for Structured ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2008, 7-9 April 2008, Montpellier, France, pp. 381-386, 2008, IEEE Computer Society, 978-0-7695-3170-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Yajun Ran, Malgorzata Marek-Sadowska |
Via-configurable routing architectures and fast design mappability estimation for regular fabrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2005 International Conference on Computer-Aided Design, ICCAD 2005, San Jose, CA, USA, November 6-10, 2005, pp. 25-32, 2005, IEEE Computer Society, 0-7803-9254-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Yajun Ran, Malgorzata Marek-Sadowska |
Designing a via-configurable regular fabric. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, CICC 2004, Orlando, FL, USA, October 2004, pp. 423-426, 2004, IEEE, 0-7803-8495-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Alwyn Goh, Geong Sen Poh, David Ngo Chek Ling |
Loss-Tolerant Stream Authentication via Configurable Integration of One-Time Signatures and Hash-Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Communications and Multimedia Security ![In: Communications and Multimedia Security - Advanced Techniques for Network and Data Protection, 7th IFIP TC-6 TC-11 International Conference, CMS 2003, Torino, Italy, October 2-3, 2003, Proceedings, pp. 239-251, 2003, Springer, 3-540-20185-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Ying Zhao, Sharad Malik, Albert R. Wang, Matthew W. Moskewicz, Conor F. Madigan |
Matching Architecture to Application Via Configurable Processors: A Case Study with Boolean Satisfiability Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 19th International Conference on Computer Design (ICCD 2001), VLSI in Computers and Processors, 23-26 September 2001, Austin, TX, USA, Proceedings, pp. 447-452, 2001, IEEE Computer Society, 0-7695-1200-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
13 | Aneesh Koorapaty, V. Kheterpal, Padmini Gopalakrishnan, M. Fu, Lawrence T. Pileggi |
Exploring Logic Block Granularity for Regular Fabrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 468-473, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
11 | Holger Lange, Andreas Koch 0001 |
Memory Access Schemes for Configurable Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, The Roadmap to Reconfigurable Computing, 10th International Workshop, FPL 2000, Villach, Austria, August 27-30, 2000, Proceedings, pp. 615-625, 2000, Springer, 3-540-67899-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
Displaying result #1 - #28 of 28 (100 per page; Change: )
|
|