Search results for "voltage-mode"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
62	I. Thoidis, Dimitrios Soudris, Ioannis Karafyllidis, Adonios Thanailakis, Thanos Stouraitis	Multiple-Valued Logic Voltage-Mode Storage Circuits Based On True-Single-Phase Clocked Logic.	Great Lakes Symposium on VLSI	1998	DBLP DOI BibTeX RDF	voltage-mode latches, voltage-mode master-slave, true-single phase clocked-logic, Multiple-Valued Logic
38	K. Wayne Current	Memory Circuits for Multiple-Valued Logic Voltage Signals.	ISMVL	1995	DBLP DOI BibTeX RDF	memory circuits, multiple valued logic voltage signals, voltage-mode CMOS multiple valued logic memory circuits, polysilicon-gate CMOS technology, SETUP clock mode, HOLD clock mode, multivalued logic circuits, integrated memory circuits, CMOS memory circuits
37	Keivan Navi, Daniel Etiemble	From Multi-Valued Current Mode CMOS Circuits to Efficient Voltage Mode CMOS Arithmetic Operators.	ISMVL	1995	DBLP DOI BibTeX RDF	multivalued current mode CMOS circuits, voltage mode CMOS arithmetic operators, 3-valued current mode CMOS 2-input BSC adder, CMOS binary 4-2 counter, 1-digit Avizienis-like adder, adders, CMOS integrated circuits, integrated logic circuits, multivalued logic circuits, ternary logic, redundant number representation
36	Drazen Jurisic, Neven Mijat, George S. Moschytz	Low-sensitivity current-mode active-RC filters using impedance tapering.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
36	Atul Katoch, Harry J. M. Veendrick, Evert Seevinck	High speed current-mode signaling circuits for on-chip interconnects.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
36	Yann-Hang Lee, Yoonmee Doh, C. Mani Krishna 0001	EDF scheduling using two-mode voltage-clock-scaling for hard real-time systems.	CASES	2001	DBLP DOI BibTeX RDF	dynamic reclaiming, energy and power optimization, scheduling, real-time systems, voltage scaling
36	Yu-Yee Liow, Chung-Yu Wu	The design of high-speed pipelined analog-to-digital converters using voltage-mode sampling and current mode processing techniques.	ISCAS (3)	2002	DBLP DOI BibTeX RDF
33	Ivo Lattenberg, Kamil Vrba	Filters with Current Amplifiers for High-speed Communication.	ICN/ICONS/MCL	2006	DBLP DOI BibTeX RDF
32	Ricardo C. Goncalves da Silva, Henri Boudinov, Luigi Carro	A cell library for low power high performance CMOS voltage-mode quaternary logic.	SBCCI	2006	DBLP DOI BibTeX RDF	quaternary logic design, voltage-mode, multi-valued logic
30	Chun-Ming Chang	Analytical synthesis of the digitally programmable voltage-mode OTA-C universal biquad.	ISCAS	2006	DBLP DOI BibTeX RDF
30	Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III, Dale Edwards	A hybrid current/voltage mode on-chip signaling scheme with adaptive bandwidth capability.	IEEE Trans. Very Large Scale Integr. Syst.	2004	DBLP DOI BibTeX RDF
30	Alexander Fish, Orly Yadid-Pecht	CMOS current/voltage mode winner-take-all circuit with spatial filtering.	ISCAS (3)	2001	DBLP DOI BibTeX RDF
30	Jaime Ramírez-Angulo, Gladys Ducoudray-Acevedo, Ramón González Carvajal, Antonio J. López-Martín	Low-voltage high-performance voltage-mode and current-mode WTA circuits based on flipped voltage followers.	IEEE Trans. Circuits Syst. II Express Briefs	2005	DBLP DOI BibTeX RDF
29	Ivo Lattenberg, Kamil Vrba, David Kubánek	Signal Processing for High-Speed Data Communication Using Pure Current Mode Filters.	ICN (2)	2005	DBLP DOI BibTeX RDF
28	Jiun-Wei Horng, Hung-Pin Chou, Iun-Cheng Shiu	Current-mode and voltage-mode quadrature oscillator employing multiple outputs CCIIs and grounded capacitors.	ISCAS	2006	DBLP DOI BibTeX RDF
27	Chun-Ming Chang	Voltage-mode high-order OTA-only-without-C low-pass (from 215 M to 705 M Hz) and band-pass (from 214 M to 724 M Hz) filter structure.	ISCAS (6)	2005	DBLP DOI BibTeX RDF
27	Kahou Wong	Stability study of a voltage-mode buck regulator using system poles approach.	ISCAS (5)	2002	DBLP DOI BibTeX RDF
26	Cheng-Chung Yang, Chen-Yu Wang, Tai-Haur Kuo	Current-Mode Converters with Adjustable-Slope Compensating Ramp.	APCCAS	2006	DBLP DOI BibTeX RDF
26	Turgay Temel, Avni Morgül, Nizamettin Aydin	A Novel Signed Higher-Radix Full-Adder Algorithm and Implementation with Current-Mode Multi-Valued Logic Circuits.	DSD	2004	DBLP DOI BibTeX RDF
25	Santanu Kapat, Amit Patra, Soumitro Banerjee	A novel current controlled tri-state boost converter with superior dynamic performance.	ISCAS	2008	DBLP DOI BibTeX RDF
25	Dominic DiClemente, Fei Yuan 0005	Current-Mode Phase-Locked Loops with Low Supply Voltage Sensitivity.	ISCAS	2007	DBLP DOI BibTeX RDF
25	Siew-Chong Tan, Yuk-Ming Lai, C. K. Tse	A family of PWM based sliding mode voltage controllers for basic DC-DC converters.	ISCAS	2006	DBLP DOI BibTeX RDF
25	Jonne Poikonen, Ari Paasio	On the topographic equivalence between voltage mode and current mode ranked order filters for array processors.	ISCAS	2006	DBLP DOI BibTeX RDF
23	Ming Li, Dong Dai, Xikui Ma, Herbert H. C. Iu	Fast-scale period-doubling bifurcation in voltage-mode controlled full-bridge inverter.	ISCAS	2008	DBLP DOI BibTeX RDF
23	Boonchai Boonchu, Wanlop Surakampontorn	CMOS voltage-mode analog multiplier.	ISCAS	2006	DBLP DOI BibTeX RDF
23	Hafiz Md. Hasan Babu, Md. Rafiqul Islam 0001, Amin Ahsan Ali, Mohammad Musa Salehin Akon	A Technique for Logic Design of Voltage-Mode Pass Transistor Based Multi-Valued Multiple-Output Logic Circuits.	ISMVL	2003	DBLP DOI BibTeX RDF	Multi-valued logic (MVL), TMOS logic circuits, Support set, Residual, Literals
22	Kaituo Yang, Chirn Chye Boon, Zhe Liu 0038, Jiaming Piao, Ting Guo, Yangtao Dong, Chenyang Li, Ao Zhou 0003, Zhijie Yang, Xiaoying Wang, Yufeng Liu	A Hybrid Coupler-First 5GHz Noise-Cancelling Dual-Mode Receiver with +10dBm in-Band IIP3 in Current-Mode and 1.7dB NF in Voltage-Mode.	ISSCC	2022	DBLP DOI BibTeX RDF
22	Xiao Liu 0001, Andreas Demosthenous, Nick Donaldson	A dual-mode neural stimulator capable of delivering constant current in current-mode and high stimulus charge in semi-voltage-mode.	ISCAS	2010	DBLP DOI BibTeX RDF
22	Joseph N. Y. Aziz, Roman Genov	Electro-chemical multi-channel integrated neural interface technologies.	ISCAS	2006	DBLP DOI BibTeX RDF
21	Guo-Ming Sung, Jyi-Hrong Tzeng, Chen-Shen Liao, Shih-Chieh Shu	A Low-power 7-b 33-Msamples/s Switched-current Pipelined ADC for Motor Control.	APCCAS	2006	DBLP DOI BibTeX RDF
20	Motoi Inaba	Experiment Result of Down Literal Circuit and Analog Inverter on CMOS Double-Polysilicon Process.	ISMVL	2007	DBLP DOI BibTeX RDF
20	Wilson Eberle, Yan-Fei Liu, Paresh C. Sen	A Simple Large Signal Model for Isolated DC-DC Converters.	CCECE	2006	DBLP DOI BibTeX RDF
20	Fei-Hu Hsieh, Hen-Kung Wang, Po-Lun Chang, Chi-Syuan Chang	Intermediate-Scale Instability Phenomena of Buck-Boost Power Factor Correctors.	HIS (1)	2009	DBLP DOI BibTeX RDF	Buck-boost converter, power factor corrector, voltage-mode control, intermediate-scale instability
20	Hirokatsu Shirahama, Takahiro Hanyu	Design of High-Performance Quaternary Adders Based on Output-Generator Sharing.	ISMVL	2008	DBLP DOI BibTeX RDF	Carry pre-addition, Differential-pair circuitry, Voltage-mode circuit, Transfer-gate circuitry, Current-mode circuit
19	An Hu, Fei Yuan	Inter-signal timing skew compensation of parallel links with voltage-mode incremental signaling.	ISCAS	2008	DBLP DOI BibTeX RDF
19	Joseph F. Ryan 0002, Benton H. Calhoun	Minimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-Threshold Operation.	ISQED	2008	DBLP DOI BibTeX RDF	Sub-threshold Circuits, Sub-Vt, Sense-Amplifiers, Variation, Offset
19	Wei-Yuan Chiu, Jiun-Wei Horng, Shyuan-Shenq Yang	High-Input Impedance Voltage-Mode Universal Biquadratic Filter with One input and Five Outputs Using DDCCs.	DELTA	2008	DBLP DOI BibTeX RDF	universal biquad, current conveyor, analogue circuit, active filter
19	Liang Zhang 0038, John M. Wilson 0002, Rizwan Bashirullah, Lei Luo 0006, Jian Xu, Paul D. Franzon	Voltage-Mode Driver Preemphasis Technique For On-Chip Global Buses.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
19	Ricardo Cunha, Henri Boudinov, Luigi Carro	Quaternary Look-Up Tables Using Voltage-Mode CMOS Logic Design.	ISMVL	2007	DBLP DOI BibTeX RDF
19	Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III	Accurate delay model and experimental verification for current/voltage mode on-chip interconnects.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
19	Chun-Ming Chang, Bashir M. Al-Hashimi	Analytical synthesis of voltage mode OTA-C all-pass filters for high frequency operation.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
19	Brent Maundy, Ezz I. El-Masry, Peter B. Aronhime	Novel high performance single amplifier biquads [voltage mode filters].	ISCAS (1)	2003	DBLP DOI BibTeX RDF
19	Ioannis M. Thoidis, Dimitrios Soudris, Jean-Marc Fernandez, Adonios Thanailakis	The circuit design of multiple-valued logic voltage-mode adders.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
18	Marshnil Vipin Dave, Rajkumar Satkuri, Mahavir Jain, Maryam Shojaei Baghini, Dinesh Kumar Sharma	Low-power current-mode transceiver for on-chip bidirectional buses.	ISLPED	2010	DBLP DOI BibTeX RDF	current-mode signaling, driver pre-emphasis, interconnects
18	David Kubánek, Kamil Vrba, Radek Sponar	Low-Pass Filter with UCC Suitable for Data Systems.	ICN/ICONS/MCL	2006	DBLP DOI BibTeX RDF
18	Ro-Min Weng, Chi-Cheng Chao	A 1.5 V high folding rate current-mode folding amplifier for folding and interpolating ADC.	ISCAS	2006	DBLP DOI BibTeX RDF
18	Ashok Narasimhan, Manish Kasotiya, Ramalingam Sridhar	A Low-Swing Differential Signaling Scheme for On-Chip Global Interconnects.	VLSI Design	2005	DBLP DOI BibTeX RDF
18	K. Wayne Current	Design of a Quaternary Latch Circuit Using a Binary CMOS RS Latch.	ISMVL	2000	DBLP DOI BibTeX RDF	quaternary, memory, circuit, latch
18	Shunichi Kaeriyama, Takahiro Hanyu, Michitaka Kameyama	Arithmetic-Oriented Multiple-Valued Logic-in-Memory VLSI Based on Current-Mode Logic.	ISMVL	2000	DBLP DOI BibTeX RDF
18	Mostafa Amer, Ahmed Abuelnasr, Mohamed Ali 0001, Ahmad Hassan, Aref Trigui, Ahmed Ragab, Mohamad Sawan, Yvon Savaria	Enhanced Dynamic Regulation in Buck Converters: Integrating Input-Voltage Feedforward With Voltage-Mode Feedback.	IEEE Access	2024	DBLP DOI BibTeX RDF
18	Winai Jaikla, Surasak Sangyaem, Piya Supavarasuwat, Fabian Khateb, Shahram Minaei, Tomasz Kulej, Peerawut Suwanjan	Reconfigurable Voltage-Mode First-Order Multifunction Filter Employing Second-Generation Voltage Conveyor (VCII) With Complete Standard Functions and Electronically Controllable Modification.	IEEE Access	2023	DBLP DOI BibTeX RDF
18	Joo-Hyung Chae, Yong-Un Jeong, Byung-Du Choi	Design and Comparative Study of Voltage Regulation-Based 2-Tap Flexible Feed-Forward Equalizer for Voltage-Mode Transmitters.	IEEE Access	2022	DBLP DOI BibTeX RDF
18	Winai Jaikla, Pruedchawat Talabthong, Surapong Siripongdee, Piya Supavarasuwat, Peerawut Suwanjan, Amornchai Chaichana	Electronically controlled voltage mode first order multifunction filter using low-voltage low-power bulk-driven OTAs.	Microelectron. J.	2019	DBLP DOI BibTeX RDF
18	Jirawat Hirunporm, Montree Siripruchyanun	A Fully/Independently Tunable Voltage-mode PID Controller Using Voltage Differencing Gain Amplifiers with Electronic Method.	TSP	2019	DBLP DOI BibTeX RDF
18	Zehra Gulru Cam, Herman Sedef, Fuat Anday	Voltage Differencing Gain Amplifier-Based nth-Order Low-Pass Voltage-Mode Filter.	J. Circuits Syst. Comput.	2018	DBLP DOI BibTeX RDF
18	K. Roja, Sarada Musala, Avireni Srinivasulu	A Voltage Mode All Pass Filter Employing Voltage Difference Transconductance Amplifier.	ECAI	2018	DBLP DOI BibTeX RDF
18	K. Roja, K. Malathi Santhoshini, Sarada Musala, Avireni Srinivasulu	Voltage Difference Transconductance Amplifier based Voltage Mode Band Pass Filter with constant Q-Factor.	ECAI	2018	DBLP DOI BibTeX RDF
18	Woo-Rham Bae, Haram Ju, Kwanseo Park, Deog-Kyoon Jeong	A 6-to-32 Gb/s voltage-mode transmitter with scalable supply, voltage swing, and pre-emphasis in 65-nm CMOS.	A-SSCC	2016	DBLP DOI BibTeX RDF
18	Firat Yücel, Erkan Yüce	A New Voltage-Mode Multifunctional Filter Using Only Two Voltage Followers and a Minimum Number of Passive Elements.	J. Circuits Syst. Comput.	2015	DBLP DOI BibTeX RDF
18	Shen Xu, Fengfeng Sun, Miao Yang, Caixia Han, Weifeng Sun, Shengli Lu	A wide output range voltage-mode buck converter with fast voltage-Tracking speed for RF power amplifiers.	Microelectron. J.	2015	DBLP DOI BibTeX RDF
18	Seok Kim, Youngkyun Jeong, Mira Lee, Kee-Won Kwon, Jung-Hoon Chun	A 5.2-Gb/s Low-Swing Voltage-Mode Transmitter With an AC-/DC-Coupled Equalizer and a Voltage Offset Generator.	IEEE Trans. Circuits Syst. I Regul. Pap.	2014	DBLP DOI BibTeX RDF
18	Hadi Youssef Kanaan, Cédric Somers, Kamal Al-Haddad	Design and implementation of a modified Sheppard-Taylor Power Factor Corrector operating in Discontinuous Capacitor Voltage Mode and very low output voltage level.	IECON	2013	DBLP DOI BibTeX RDF
18	B. C. Akshatha, Vijay Kumar Akshintala	Low Voltage, Low Power, High Linearity, High Speed CMOS Voltage Mode Analog Multiplier.	ICETET	2009	DBLP DOI BibTeX RDF
18	Martin Minarcik, Kamil Vrba	Single-Input Six-Output Voltage-Mode Filter Using Universal Voltage Conveyors.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2008	DBLP DOI BibTeX RDF
18	Quoc-Hoang Duong, Trung-Kien Nguyen, Sang-Gug Lee 0001	Ultra low-voltage low-power exponential voltage-mode circuit with tunable output range.	ISCAS (2)	2004	DBLP BibTeX RDF
18	Yaxiong Zhang, Alister Hamilton	A current mode Palmo cell for programmable analogue signal processing.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
18	Mingcui Zhou, Wentai Liu, Mohanasankar Sivaprakasam	A closed-form delay formula for on-chip RLC interconnects in current-mode signaling.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
18	Chung-Chieh Fang, Eyad H. Abed	Sampled-data modeling and analysis of closed-loop PWM DC-DC converters.	ISCAS (5)	1999	DBLP DOI BibTeX RDF
17	Jahnvi Singh, Nijwm Wary, Pradip Mandal	Use of current-mode and voltage-mode receivers together for on-chip multipoint-to-multipoint data transmission across global interconnects.	VLSID	2024	DBLP DOI BibTeX RDF
17	Sung-Ha Kim, Byungwook Cho, Jahoon Jin, Yong Ho Song, Jung-Hoon Chun	A 16/32 Gb/s Dual-Mode NRZ/PAM4 Voltage-Mode Transmitter With 2-Tap FFE.	IEEE Access	2022	DBLP DOI BibTeX RDF
17	Wei Zhu, Arindam Mishra, Valentijn De Smedt	An On-chip Voltage Mode Control Circuit with Operation Mode Switch for Phase-shifted Full-bridge Isolated DC-DC Bus Converters.	NEWCAS	2022	DBLP DOI BibTeX RDF
17	Shraman Mukherjee, Sumantra Seth, Saurabh Saxena	A 5-Gb/s PAM4 Voltage Mode Transmitter with Current Mode Continuous Time Linear Equalizer.	VLSID	2022	DBLP DOI BibTeX RDF
17	Sensen Li, Min-Yu Huang, Doohwan Jung, Tzu-Yuan Huang, Hua Wang 0006	A MM-Wave Current-Mode Inverse Outphasing Transmitter Front-End: A Circuit Duality of Conventional Voltage-Mode Outphasing.	IEEE J. Solid State Circuits	2021	DBLP DOI BibTeX RDF
17	Bhartendu Chaturvedi, Jitendra Mohan, Atul Kumar, Kirat Pal	Current-Mode First-Order Universal Filter and its Voltage-Mode Transformation.	J. Circuits Syst. Comput.	2020	DBLP DOI BibTeX RDF
17	Xiaoran Wang, Ping Gui	A Hybrid Line Driver with Voltage-Mode SST Pre-Emphasis and Current-Mode Equalization.	MWSCAS	2020	DBLP DOI BibTeX RDF
17	Chieh-Pu Lo, Wen-Zhang Lin, Wei-Yu Lin, Huan-Ting Lin, Tzu-Hsien Yang, Yen-Ning Chiang, Ya-Chin King, Chrong Jung Lin, Yu-Der Chih, Tsung-Yung Jonathon Chang, Meng-Fan Chang	A ReRAM Macro Using Dynamic Trip-Point-Mismatch Sampling Current-Mode Sense Amplifier and Low-DC Voltage-Mode Write-Termination Scheme Against Resistance and Write-Delay Variation.	IEEE J. Solid State Circuits	2019	DBLP DOI BibTeX RDF
17	Lorenzo Capineri, Pietro Giannelli, Giacomo Calabrese	Comparison of Voltage-Mode and Charge-Mode amplifiers for Interfacing piezopolymer transducers to SHM electronic systems.	ICECS	2019	DBLP DOI BibTeX RDF
17	Songjie Zhao, Zhongliang Pan	Performance Comparison Between Current-Mode Signaling and Voltage-Mode Signaling for Single-Walled Carbon Nanotube Bundle Interconnects.	J. Circuits Syst. Comput.	2018	DBLP DOI BibTeX RDF
17	Soheil Ziabakhsh, Ghyslain Gagnon, Gordon W. Roberts	The Peak-SNR Performances of Voltage-Mode versus Time-Mode Circuits.	IEEE Trans. Circuits Syst. II Express Briefs	2018	DBLP DOI BibTeX RDF
17	Hae-Woong Yang, Ashkan Roshan-Zamir, Young-Hoon Song, Samuel Palermo	A low-power dual-mode 20-Gb/s NRZ and 28-Gb/s PAM-4 voltage-mode transmitter.	A-SSCC	2017	DBLP DOI BibTeX RDF
17	Fabio Ciciriello, Francesco Corsi, Francesco Licciulli, Cristoforo Marzocca, Gianvito Matarrese	Time performance of voltage-mode vs current-mode readouts for SiPM's.	IWASI	2015	DBLP DOI BibTeX RDF
17	Xu Bai, Michitaka Kameyama	Implementation of Voltage-Mode/Current-Mode Hybrid Circuits for a Low-Power Fine-Grain Reconfigurable VLSI.	IEICE Trans. Electron.	2014	DBLP DOI BibTeX RDF
17	Hua-Pin Chen, San-Fu Wang, Ming-Yuan Hsieh	Tunable current-mode and voltage-mode quadrature oscillator using a DVCCTA.	IEICE Electron. Express	2014	DBLP DOI BibTeX RDF
17	Young-Hoon Song, Samuel Palermo	A 6-Gbit/s Hybrid Voltage-Mode Transmitter With Current-Mode Equalization in 90-nm CMOS.	IEEE Trans. Circuits Syst. II Express Briefs	2012	DBLP DOI BibTeX RDF
17	Dalibor Biolek, Abhirup Lahiri, Winai Jaikla, Montree Siripruchyanun, Josef Bajer	Realization of electronically tunable voltage-mode/current-mode quadrature sinusoidal oscillator using ZC-CG-CDBA.	Microelectron. J.	2011	DBLP DOI BibTeX RDF
17	Erkan Yüce	Various Current-Mode and voltage-Mode Instrumentation amplifier Topologies Suitable for Integration.	J. Circuits Syst. Comput.	2010	DBLP DOI BibTeX RDF
17	Swathi Marri, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón G. Carvajal	A new scheme for DC offset compensation and its application to current mode and voltage mode D/A converters.	ECCTD	2009	DBLP DOI BibTeX RDF
17	Ahmed M. Soliman	Voltage mode and current mode Tow Thomas bi-quadratic filters using inverting CCII.	Int. J. Circuit Theory Appl.	2007	DBLP DOI BibTeX RDF
17	Özhan Koca, Xinyi Yang, Robert Weigel	Transformation from Voltage-Mode to Current-Mode: an Alternative Approach.	ICECS	2007	DBLP DOI BibTeX RDF
17	Spiridon Vlassis, Stylianos Siskos	Design of voltage-mode and current-mode computational circuits using floating-gate MOS transistors.	IEEE Trans. Circuits Syst. I Regul. Pap.	2004	DBLP DOI BibTeX RDF
17	Slawomir Koziel, Stanislaw Szczepanski	Dynamic range comparison of voltage-mode and current-mode state-space Gm-C biquad filters.	ICECS	2001	DBLP DOI BibTeX RDF
17	Piotr Pawlowski, Andrzej Guzinski	Comparative investigations of substrate noise caused by voltage-mode and current-mode gates.	ISCAS	2000	DBLP DOI BibTeX RDF
17	Jaime Ramírez-Angulo, Kevin Treece, P. Andrews, T. Choi	Current-Mode and Voltage-Mode VLSI Fuzzy Processor Architecture.	ISCAS	1995	DBLP DOI BibTeX RDF
16	Yohei Nakata, Shunsuke Okumura, Hiroshi Kawaguchi 0001, Masahiko Yoshimoto	0.5-V operation variation-aware word-enhancing cache architecture using 7T/14T hybrid SRAM.	ISLPED	2010	DBLP DOI BibTeX RDF	fine-grain control, low power, cache memory, microarchitecture, variation, low voltage
16	Boonchai Boonchu, Wanlop Surakampontorn	A new NMOS four-quadrant analog multiplier.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
16	Jörg Langeheine, Karlheinz Meier, Johannes Schemmel, Martin Trefzer	Intrinsic Evolution of Digital-to-Analog Converters Using a CMOS FPTA Chip.	Evolvable Hardware	2004	DBLP DOI BibTeX RDF
16	Jing Shen, Koichi Tanno, Okihiko Ishizuka	Down Literal Circuit with Neuron-MOS Transistors and Its Applications.	ISMVL	1999	DBLP DOI BibTeX RDF
15	Supreet Joshi, Dinesh Sharma	A Novel Low Power Multilevel Current Mode Interconnect System.	ISVLSI	2006	DBLP DOI BibTeX RDF
15	Achim Graupner, M. Tanzer, René Schüffny	CMOS image sensor with shared in-pixel amplifier and calibration facility.	APCCAS (2)	2002	DBLP DOI BibTeX RDF
15	Chung-Chieh Fang, Eyad H. Abed	Harmonic balance analysis and control of period doubling bifurcation in buck converters.	ISCAS (3)	2001	DBLP DOI BibTeX RDF