Search results for "WMPI"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	John B. Carter, Lixin Zhang 0002 (eds.)	Proceedings of the 3rd Workshop on Memory Performance Issues, in conjunction with the 31st International Symposium on Computer Architecture 2004, Munich, Germany, June 20, 2004	WMPI	2004	DBLP BibTeX RDF
1	Chikafumi Takahashi, Masaaki Kondo, Taisuke Boku, Daisuke Takahashi, Hiroshi Nakamura, Mitsuhisa Sato	SCIMA-SMP: on-chip memory processor architecture for SMP.	WMPI	2004	DBLP DOI BibTeX RDF
1	Lars Wehmeyer, Urs Helmig, Peter Marwedel	Compiler-optimized usage of partitioned memories.	WMPI	2004	DBLP DOI BibTeX RDF
1	Erik G. Hallnor, Steven K. Reinhardt	A compressed memory hierarchy using an indirect index cache.	WMPI	2004	DBLP DOI BibTeX RDF
1	Chitra Natarajan, Bruce Christenson, Faye A. Briggs	A study of performance impact of memory controller features in multi-processor server environment.	WMPI	2004	DBLP DOI BibTeX RDF	memory transaction scheduling, server systems, multi-processors, memory controller, memory subsystem, performance impact
1	José González 0002, Fernando Latorre, Antonio González 0001	Cache organizations for clustered microarchitectures.	WMPI	2004	DBLP DOI BibTeX RDF	clustering, memory hierarchy, steering, cache organization
1	Magnus Ekman, Per Stenström	A case for multi-level main memory.	WMPI	2004	DBLP DOI BibTeX RDF	memory-systems
1	Stephen Somogyi, Thomas F. Wenisch, Nikolaos Hardavellas, Jangwoo Kim, Anastassia Ailamaki, Babak Falsafi	Memory coherence activity prediction in commercial workloads.	WMPI	2004	DBLP DOI BibTeX RDF	coherence misses, coherence prediction, sharing patterns, trace-based prediction, commercial workloads
1	Doron Nakar, Shlomo Weiss	Selective main memory compression by identifying program phase changes.	WMPI	2004	DBLP DOI BibTeX RDF
1	Marco Galluzzi, Ramón Beivide, Valentin Puente, José-Ángel Gregorio, Adrián Cristal, Mateo Valero	Evaluating kilo-instruction multiprocessors.	WMPI	2004	DBLP DOI BibTeX RDF	ROB, shared-memory multiprocessors, CC-NUMA, memory wall, instruction window, kilo-instruction processors
1	Irina Chihaia, Thomas R. Gross	An analytical model for software-only main memory compression.	WMPI	2004	DBLP DOI BibTeX RDF
1	G. Surendra, Subhasis Banerjee, S. K. Nandy 0001	On the effectiveness of prefetching and reuse in reducing L1 data cache traffic: a case study of Snort.	WMPI	2004	DBLP DOI BibTeX RDF	cache traffic, intrusion detection, pattern matching, network processor, instruction reuse
1	Steven T. Gabriel, David S. Wise	The Opie compiler from row-major source to Morton-ordered matrices.	WMPI	2004	DBLP DOI BibTeX RDF	cache, scientific computing, paging, quadtrees
1	Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt	Understanding the effects of wrong-path memory references on processor performance.	WMPI	2004	DBLP DOI BibTeX RDF	processor performance analysis, wrong path modeling, wrong-path memory references, speculative execution, data prefetching, execution-driven simulation, cache pollution
1	Wolfgang Raab, Hans-Martin Blüthgen, Ulrich Ramacher	A low-power memory hierarchy for a fully programmable baseband processor.	WMPI	2004	DBLP DOI BibTeX RDF	baseband processor, multi-tasked processor, task interleaving, memory hierarchy, low-power memory
1	Ramesh V. Peri, John Fernando, Ravi K. Kolagotla	Addressing mode driven low power data caches for embedded processors.	WMPI	2004	DBLP DOI BibTeX RDF
1	Jay B. Brockman, Shyamkumar Thoziyoor, Shannon K. Kuntz, Peter M. Kogge	A low cost, multithreaded processing-in-memory system.	WMPI	2004	DBLP DOI BibTeX RDF	PIM, processing-in-memory
1	Muhamed F. Mudawar	Scalable cache memory design for large-scale SMT architectures.	WMPI	2004	DBLP DOI BibTeX RDF	scalable multiported cache memory, simultaneous multithreaded architectures
1	Collin McCurdy, Charles N. Fischer	A localizing directory coherence protocol.	WMPI	2004	DBLP DOI BibTeX RDF	parallel computation, distributed memory architectures, shared memory architectures, irregular computation
1	Faye A. Briggs, Suresh Chittor, Kai Cheng	Micro-architecture techniques in the intel E8870 scalable memory controller.	WMPI	2004	DBLP DOI BibTeX RDF	distributed coherency, transaction flows, scalability, memory latency

Publications at "WMPI"( http://dblp.L3S.de/Venues/WMPI )