| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Yingyan Lin |
Bringing Powerful Machine-Learning Systems to Daily-Life Devices via Algorithm-Hardware Co-Design.  |
VLSI-DAT  |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Charlie Hong-Men Su |
The Rise of RISC-V from Edge to Cloud. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Ofir Sharoni, Yael Sufrin, Avi Cohen, Rolf Seltmann, Aravind Narayana, Thomas Thamm |
Excursion Prevention Strategyto Increase Chip Performance by Photomask Tuning. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Mitsumasa Koyanagi |
3D Heterogeneous Integration Technology for AI System. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Hung-Hsuan Lin |
AI in Transportation and Video Inference Speedup. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhe-Ting Liu, Davy P. Y. Wong, Pai H. Chou |
An Imu-Based Wearable Ring For On-Surface Handwriting Recognition. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu-Sian Lin, Soon-Jyh Chang, Chia-Ling Wei |
A Noise-shaping SAR Assisted MASH 2-1 Sigma-Delta Modulator. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Vivienne Sze |
Efficient Computing for AI and Robotics. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Richard Panek, Jakub Lojda, Jakub Podivinsky, Zdenek Kotásek |
Reliability Analysis of Reconfiguration Controller for FPGA-Based Fault Tolerant Systems: Case Study. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Kiyotaka Sasagawa, Makito Haruta, Yasumi Ohta, Hironari Takehara, Jun Ohta |
Miniaturized CMOS imaging device for implantable applications. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Yong-Yu Lin, Fan-ta Chen, Wei-Zen Chen |
A Millimeter-Wave Frequency Synthesizer for 60 GHz Wireless Interconnect. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | |
2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020, Hsinchu, Taiwan, August 10-13, 2020 |
VLSI-DAT |
2020 |
DBLP BibTeX RDF |
|
| 1 | Yoshiki Kakuta, Reika Kinoshita, Hiroshi Kinoshita, Chihiro Matsui, Ken Takeuchi |
Real-time Error Monitoring System Considering Endurance and Data-retention Characteristics of TaOX-based ReRAM Storage with Workloads at Data Centers. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Wen-Pin Hsu |
Intelligent Document Recognition on Financial Process Automation. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Chi-Yun Yang, Yang-Ming Yeh, Yi-Chang Lu |
Hardware Architecture and Implementation of Clustered Tensor Approximation for Multi-Dimensional Visual Data. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Jinn-Shyan Wang, Chien-Tung Liu, Chao-Hsiang Wang |
Low-Active-Energy and Low-Standby-Power Sub-threshold ROM for IoT Edge Sensing Systems. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Hsin-I Wu, Ren-Song Tsay, Fong-Yuan Chang |
CORONA: A k-COnnected RObust Interconnection Network Generation Algorithm. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Takehiro Nakamura |
5G Evolution and 6G. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Wen-Chiang Chen |
5G mmWAVE Technology Design Challenges and Development Trends. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Hsiang-Chun Cheng, Yu-Hong Yang, Tai-Cheng Lee |
Analysis and Design of a Self-Charged Crystal Oscillator with Pulse Regulating Feedback Loop. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Tsung-Wei Huang |
Programming Systems for Parallelizing VLSI CAD and Beyond. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Yung-Hui Chung, Qi-Feng Zeng |
A 12-bit 100-kS/s SAR ADC for IoT Applications. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Chia-Hsiang Yang |
AI Acceleration with RISC-V for Edge Computing. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Hong-Ke Lin, Pin-Han Lin, Chih-Wei Liu |
Design of a High-Throughput and Area-Efficient Ultra-Long FFT Processor. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Kun-Chih Jimmy Chen, Zi-Jie Gao |
Integrated Group-based Valuable Sensor Selection Approach for Remaining Machinery Life Estimation in the Future Industry 4.0 Era. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Shu-Ming Liu, Luba Tang, Ning-Chi Huang, Der-Yu Tsai, Ming-Xue Yang, Kai-Chiang Wu |
Fault-Tolerance Mechanism Analysis on NVDLA-Based Design Using Open Neural Network Compiler and Quantization Calibrator. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroyuki Ito |
Edge-AI Based Cattle Behavior Estimation System for Grazing. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Ru Chen, Hui-Hsin Liao, Chia-Hsuan Chang, Che-Chia Lin, Chao-Lin Lee, Yuan-Ming Chang, Chun-Chieh Yang, Jenq-Kuen Lee |
Experiments and optimizations for TVM on RISC-V Architectures with P Extension. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Zi-Yi Zhao, An-Tai Xiao, Jiun-In Guo |
Video Dehazing Hardware Accelerator Design based on Dark Channel Prior with Sky Preservation. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Ryutaro Yasuhara |
TaOx ReRAM as a Highly-Reliable Embedded Memory and Its Application to Edge AI. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaohua Huang, Bowen Wang, Woogeun Rhee, Zhihua Wang 0001 |
A 5.4GHz ΔΣ Bang-Bang PLL with 19dB In-Band Noise Reduction by Using a Nested PLL Filter. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu-Jung Wang, Siou-Lin You, Zhen-Hao Zhu, Wei-Ting Lin, Cheng-You Ho, Chi-Lun Hsu, Chun-Hsing Lee, Hsi-Pin Ma |
A 24 Mbit/s Red LED-based Visible Light Communication System Employing DCO-OFDM Modulation. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Weida Zhu, Xinghai Zhang, Genggeng Liu, Wenzhong Guo, Ting-Chi Wang |
MiniDeviation: An Efficient Multi-Stage Bus-Aware Global Router. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Ming Khuan Son, Neng-Jian Sim, Tzi-Dar Chiueh |
A Novel Minimum Variance Beamformer and Its Circuit Design for Ultrasound Beamforming. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Onur Mutlu |
Intelligent Architectures for Intelligent Machines. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Sherief Reda |
Overview of the OpenROAD Digital Design Flow from RTL to GDS. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Dana Neustadter |
Security Done Right: Start at the Heart of the SoC. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Tong-Yu Hsieh, Hsin-Yung Shen, Chia-Teng Hsu |
Cost-Effective Reliable Edge Computing Hardware Design Based on Module Simplification and Duplication: A Case Study on Vehicle Detection Based on Support Vector Machine. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Kea-Tiong Tang |
Breath Analysis for Early Detection and Rapid Diagnosis of Diseases for Preventive Medicine. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Shimeng Yu |
Compute-in-Memory for AI: From Inference to Training. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Yier Jin |
CAD for Security: A Full Reverse Engineering Toolchain from Layout to RTL. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Ching-Hwa Cheng, Jiun-In Guo |
Low-Power 3D-PCB Stacking System Design and Validation by Automatic Voltage-Current Scalable Technique. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Chieh Hsu, Jing-Yuan Lin, Chii-Hwa Wang, Sz-Wei Chou |
An SIMO Step-Down Converter with Coupled Inductor. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Mike Davies |
Progress in Neuromorphic Computing : Drawing Inspiration from Nature for Gains in AI and Computing. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Jun Matsui, Hisakatsu Yamaguchi |
Event-Driven Model for High Speed End-to-End Simulations of Transmission System with Non-Linear Optical Elements and Cascaded Clock-and-Data Recovery Circuits. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Lih-Yih Chiou, Chi-Ray Huang, Chang-Chieh Cheng, Jing-Yu Huang, Wei-Suo Ling |
A Variation-Tolerant Bitline Leakage Sensing Scheme for Near-Threshold SRAMs. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Chuan-Cheng Cheng, Jeremy Dunworth, Sriram Kalpat, Haitao Cheng, Gang Liu, Ming-Ta Yang, Wing Sy, Joseph Wang 0002, Kamal Sahota, P. R. Chidi Chidambaram |
Silicon Process Impact on 5G NR mmWave Front End Design and Performance. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Sebastian Kiesel, Thomas Kern, Bernhard Wicht, Helmut Graeb |
A 30 ns 16 Mb 2 b/cell Embedded Flash with Ramped Gate Time-Domain Sensing Scheme for Automotive Application. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | San-Liang Lee |
Research Status of Silicon Photonic Integration in Taiwan's Academia. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Chia-Kai Chan, Hong-Ke Lin, Chih-Wei Liu |
High-Throughput 64K-point FFT Processor for THz Imaging Radar System. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai-Chieh Yang, Ming-Ting Lee, Chen-Hung Wu, James Chien-Mo Li |
ATPG and Test Compression for Probabilistic Circuits. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | |
International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019, Hsinchu, Taiwan, April 22-25, 2019 |
VLSI-DAT |
2019 |
DBLP BibTeX RDF |
|
| 1 | Shien-Chun Luo |
Customization of a Deep Learning Accelerator. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yining Zhang, Jiahao Zhao, Woogeun Rhee, Zhihua Wang 0001 |
Design and Analysis of Data-Pattern-Insensitive Phase-Tracking Receivers with Fully-Balanced FSK Modulation. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Mingoo Seok, Minhao Yang, Zhewei Jiang, Aurel A. Lazar, Jae-sun Seo |
Cases for Analog Mixed Signal Computing Integrated Circuits for Deep Neural Networks. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Kang-Yi Fan, Shigeru Yamashita, Juinn-Dar Huang |
Reactant Minimization for Multi-Target Sample Preparation on Digital Microfluidic Biochips Using Network Flow Models. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Hsinchung Chen, Subramanian Meenakshi, Ali Heydarigorji, Seyede Mahya Safavi, Pai H. Chou, Cheng-Ting Lee, Ruey-Kang Chang |
BlueBox: A Complete Recorder for Code-Blue Events in Hospitals. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuguang Liu, Haixin Song, Kunnong Zeng, Woogeun Rhee, Zhihua Wang 0001 |
A 9mW 6-9GHz 2.5Gb/s Proximity Transmitter with Combined OOK/BPSK Modulation for Low Power Mobile Connectivity. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas Ernst |
Future of Computing and Sensing Systems for Embedded Applications. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yan Li |
Evolution and Advances of the Nonvolatile Memories and Applications. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yasushi Maruta |
Development and Evaluation of Low-SHF-Band C-RAN Massive MIMO System for 5G. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Pei-Kuei Tsung, Tung-Chien Chen, Chien-Hung Lin, Chih-Yu Chang, Jih-Ming Hsu |
Heterogeneous Computing for Edge AI. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Chia-Chih Jack Yen |
Failure Root Cause Analysis Automation on Functional Simulation Regressions. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Chee-Kit Ng, Yu-Chun Lin, Shyh-Jye Jou |
A 50 Gb/s Adaptive ADFE with SNR Based Power Management for 2-PAM Systems. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuan-Hsi Chou, Shih-Lien Lu |
A High Performance, Low Energy, Compact Masked 128-Bit AES in 22nm CMOS Technology. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Dominik Sisejkovic, Farhad Merchant, Rainer Leupers, Gerd Ascheid, Volker Kiefer |
A Critical Evaluation of the Paradigm Shift in the Design of Logic Encryption Algorithms. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Fatih Hamzaoglu |
Embedded Memories for Silicon-In-Package: Optimization of Memory Subsystem from IoT to Machine Learning. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Takashi Dateki |
R&D Activities for Capacity Enhancement Using 5G Ultra High-Density Distributed Antenna Systems. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Katsuhiko Hoya, Kosuke Hatsuda, Kenji Tsuchida, Yohji Watanabe, Yusuke Shirota, Tatsunori Kanai |
A perspective on NVRAM technology for future computing system. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Fen Lin, Cheng-Tao Hsieh, Cheng-Yi Chou |
ONNC-Based Software Development Platform for Configurable NVDLA Designs. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Tsung-Ching Huang, Ting Lei, Leilai Shao, Sridhar Sivapurapu, Madhavan Swaminathan, Sicheng Li, Zhenan Bao, Kwang-Ting Cheng, Raymond G. Beausoleil |
Process Design Kit and Design Automation for Flexible Hybrid Electronics. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Tom Walker |
Using a Complete Flow for Photonic Integrated Circuits to Improve Product Development Time. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Tom Munk, Hillel Kugler, Ofir Maori, Adam Teman |
TEMPO: Thermal-Efficient Management of Power in High-Throughput Network Switches. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Pai-Hsiang Hsu, Yueh-Ru Lee, Chung-Chih Hung |
10-Bit SAR ADC With Novel Pseudo-Random Capacitor Switching Scheme. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Chao-Jun Shang, Cheng-Hung Wu, Kuen-Jong Lee, Yu-Hsiang Chen |
A Novel Test Generation Method for Small-Delay Defects with User-Defined Fault Model. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Chia Chen, Shao-Yung Lu, Jui-Hsiang Tsai, Yu-Te Liao |
A Power-Efficient, Bi-Directional Readout Interface Circuit for Cyclic-Voltammetry Electrochemical Sensors. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Shankaran Janardhanan |
Silicon Technologies for Next Generation 5G Architectures and Applications. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuan Xie 0001 |
CRISP: Center for Research on Intelligent Storage and Processing-in-Memory. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Jia-Ching Wang, Tsung-Chih Hung, Tai-Haur Kuo |
A 15-bit 20 MS/s SHA-Less Pipelined ADC Achieving 73.7 dB SNDR with Averaging Correlated Level Shifting Technique. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Hyung-Il Kim |
Beyond Digital Neuromorphic Hardware: Time-Based and Flash-Based Designs. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yujun Li |
Semiconductor for 5G. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ghavam G. Shahidi |
Slow-Down in Power Scaling and the End of Moore's Law? |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yongpan Liu |
Flexible Circuits and Systems for Smart Biomedical Applications. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Jing Wang, Hirofumi Shinohara |
A CMOS 0.85-V 15.8-nW Current and Voltage Reference without Resistors. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ming-Wei Lin |
TSRI Silicon Photonics Design Platform: Standardization and Collaboration. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Prabhu B. M. Prasad, Khyamling Parane, Basavaraj Talawar |
High-Performance NoC Simulation Acceleration Framework Employing the Xilinx DSP48E1 Blocks. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Winfried Kaiser |
EUVL Optics: Status and Future Perspectives. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Jianxiong Yin |
Scalable AI Computing Lifecycle. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ya-Chin Chung, Po-Hsiang Cheng, Chih-Wei Liu |
Energy Efficient CNN Inference Accelerator Using Fast Fourier Transform. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Che Lee, Ting-Shuo Hsu, Chun-Tse Chen, Jing-Jia Liou, Juin-Ming Lu |
NNSim: A Fast and Accurate SystemC/TLM Simulator for Deep Convolutional Neural Network Accelerators. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Yi Kao, Cheng-Ting Lee, Yu-Hung Yeh, Jui-Feng Sung, Pai H. Chou |
EcoSim: A Smartphone-Based Sensor-Node Emulator with Native Sensors and Protocol Stack. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Peng-Chang Huang, Tai-Haur Kuo |
A Light Energy Harvesting Single-Inductor Dual-Input Dual-Output Converter for WSN. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Hsieh |
Autonomous Driving Technologies and Computing Platform. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Khyamling Parane, Prabhu B. M. Prasad, Basavaraj Talawar |
Design of an Adaptive and Reliable Network on Chip Router Architecture Using FPGA. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Shih-Lien Lu, Cheng-En Lee, Peter Noel, Saman Adham, Ted Wong, Jonathan Chang |
A Reliable, Low-Cost, Low-Energy Physically Unclonable Function Circuit Through Effective Filtering. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yun-Wen Lu, Antoon Purnal, Simon Vandenhende, Chen-Yi Lee, Ingrid Verbauwhede, Hsie-Chia Chang |
A Lightweight 1.16 pJ/bit Processor for the Authenticated Encryption Scheme KetjeSR. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yueh-Chi Wu, Chih-Tsun Huang |
Efficient Dynamic Fixed-Point Quantization of CNN Inference Accelerators for Edge Devices. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yih-Chih Chou, Chien-Cheng Wu, Cheng-Hong Tsai |
Clocking for HPC Design: Challenges and Experience Sharing. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu-Zhe Wang, Jingjie Wu, Shi-Hao Chen, Mango Chia-Tso Chao, Chia-Hsiang Yang |
Micro-Architecture Optimization for Low-Power Bitcoin Mining ASICs. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Haoyan Liu, Takashi Ohsawa |
User- Friendly Compact Model of Magnetic Tunnel Junctions for Circuit Simulation Based on Switching Probability. |
VLSI-DAT |
2019 |
DBLP DOI BibTeX RDF |
|
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