| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Indranil Maity, Shivam Das, Malay Gangopadhyay, Indrajit Maity |
Understanding 2-Propanol Sensing Mechanism of Pd Modified Graphene Based Gas Sensor Devices using DFT Study.  |
VLSID  |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Debabrata Senapati, Dharmendra Maurya, Arnab Sarkar, Chandan Karfa |
ERS: Energy-efficient Real-time DAG Scheduling on Uniform Multiprocessor Embedded Systems. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Pranav Jain, Gagandeep, Sneh Saurabh |
FLIP: An Artificial Neural Network-based Post-routing Incremental Placer. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Kailash Prasad, Neel Shah, Jinay Dagli, Joycee Mekie |
SDR-PUF: Sequence-Dependent Reconfigurable SRAM PUF with an Exponential CRP Space. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Gokulnath Rajendran, Furqan Zahoor, Sidhaant Sachin Thakker, Simranjeet Singh, Farhad Merchant, Vikas Rana, Anupam Chattopadhyay |
Harnessing Entropy: RRAM Crossbar-based Unified PUF and RNG. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Albert Daimari, Ankit Chakusaru Deori, Amab Ratna Pawe, Ratul Kumar Baruah |
Design of 3 bit/cell NAND Memory Array Based on Ferroelectric Field Effect Transistor. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Sushmita Ghosh, Bidyut K. Bhattacharyya |
A Novel Approach to Control a DC-DC Converter Using its Empirical Physical Model. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Nidhee Bhuwal, Kamal Solanki, Manoj Kumar Majumder, Deepika Gupta |
Flux Controlled Grounded Meminductor Emulator Using Single DVCCTA. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Minal Bisen, Kapil Jainwal, Nitin Khanna |
Design and Implementation of SPAD-Based Linearly Stable Multi-Mode Configurable TAC Pixel. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Ashutosh Ghimire, Mahommed Alkurdi, Fathi Amsaad 0001 |
Enhancing Hardware Trojan Security through Reference-Free Clustering using Representatives. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | R. Sivaraman, D. Muralidaran, R. Muthaiah, V. S. Shankar Sriram |
Characteristic Exploitation of Programmable Delay Line Influenced Oscillator Circuit as Hardware Security Primitive. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Zeeshan Anwar, Imlijungla Longchar, Hemangee K. Kapoor |
Bit-Beading: Stringing bit-level MAC results for Accelerating Neural Networks. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Alba Ordonez Rodriguez, Fabien Gilibert, Francois Paolini, Pascal Urard, Roberto Guizzetti, John Samuel 0003, Remy Cellier, Lioua Labrak, Bastien Deveautour |
Artificial neural network-based solution for PSP MOSFET model card extraction. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Amartya Dutta, Riya Majumder, Rajat Kumar Pal |
Reinforcement Learning based Droplet Routing Technique in Hexagonal Digital Microfluidic Biochips using Dueling Network. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Ananya Kapoor, Ayush Thapar, Chaitanya Shanker Jha, Chaudhry Indra Kumar |
A High Performance and Low Power Subthreshold Voltage Level Shifter Design. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Jyoti Priya, Darshak Bhatt |
A Low Power and Low Noise, Self Body Biased Low Noise Amplifier. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Ritajit Majumdar, Dhiraj Madan, Debasmita Bhoumik, Dhinakaran Vinayagamurthy, Shesha Raghunathan, Susmita Sur-Kolay |
Optimized QAOA ansatz circuit design for two-body Hamiltonian problems. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Debayan Das, Majid Sabbagh, Rana Elnaggar, Guang Chen, Sayak Ray, Jason M. Fung |
Optimal Placement of TDC Sensor for Enhanced Power Side-Channel Assessment on FPGAS. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Suryansh Upadhyay, Swaroop Ghosh |
Stealthy SWAPs: Adversarial SWAP Injection in Multi-Tenant Quantum Computing. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Sabyasachee Banerjee, Subhashis Majumder, Bhargab B. Bhattacharya |
On Managing Test-Time, Power, and Layer Assignment in 3D SoCs with Built-In-Self-Repair Modules. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Tanusree Kaibartta, Hitarth Arora, Debesh Kumar Das |
Genetic Algorithm Based Efficient Grouping Technique for Post Bond Test and Crosstalk Faults Among TSVs. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Tamonash Bhattacharyya, Prasun Ghosal, Sonam, Sujay Deb |
Vigil: A RISC-V SoC Architecture for 2-fold Hybrid CNN-kNN based Fall Detector Implementation on FPGA. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Manjith Baby Sarojam Chellam, Ramasubramanian Natarajan, Nagi Naganathan |
Logic locking emulator on FPGA: A conceptual view. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Gopikrishna Vijayakumar, Alok Joshi, Abhishek Kumar 0007 |
A 1.6 - 2.5 GHz Receiver for Software Defined Radio with High Linearity Mode. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Subhadip Kundu, Jais Abraham |
Revisiting Test Compression Configuration in Context of Multi-Core Testing Using Packetized Scan Network. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Apurba Prasad Padhy, Bishnu Prasad Das |
Lightweight Approximate Multiplier with Improved Accuracy in FPGA for Error Resilient Application. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Noble G, Nalesh S 0001, S. Kala |
MOSCON: Modified Outer Product based Sparse Matrix-Matrix Multiplication Accelerator with Configurable Tiles. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Vaishnavi Sankar, Balachander Sathianarayanan, Nirmala Devi Manickam, M. Jayakumar 0001 |
Reliability Enhancement of Hardware Trojan Detection using Histogram Augmentation Technique. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sira Rao, Baskaran Chidambaram, Prasanth V., Karthik Rajakumar, Pramod Prabhakara, Praveen Ravichandran, Shailesh Ghotgalkar, Ashish Vanjari, Mihir Mody |
Live & Seamless Firmware Upgrade in Real Time Control Systems. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Shivam Nigam, Mukund Murali, Hari Shanker Gupta, Saurabh Saxena |
A 105-525MHz Integer-N Phase-Locked Loop in Indigenous SCL 180nm CMOS. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Eric Homan, Codey Mathis, Chonghan Lee, Harland M. Patch, Christina M. Grozinger, Vijay Narayanan |
InsectEye: An Intelligent Trap for Insect Biodiversity Monitoring. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Vibhu, Sparsh Mittal, Vivek Kumar |
Machine Learning-based model for Single Event Upset Current Prediction in 14nm FinFETs. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Pranose J. Edavoor, Aneesh Raveendran, David Selvakumar, Vivian Desalphine, Shankar G. Dharani, Gopal Raut |
Design and Analysis of Posit Quire Processing Engine for Neural Network Applications. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Thota Pranay Kumar, Siva Kumar Rapina, Bheema Rao Nistala |
A 16Gbps 3rd Order CTLE Design for Serial Links with High Channel Loss in 16nm FinFET. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Aparajithan Nathamuni Venkatesan, Ram Venkat Narayanan, Kishore Pula, Sundarakumar Muthukumaran, Ranga Vemuri |
Word-Level Structure Identification In FPGA Designs Using Cell Proximity Information. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahish Shylendra, Swarup Bhunia, Amit Ranjan Trivedi |
Unifying Intrinsically-Operated Physically Unclonable Function and Random Number Generation in Analog Circuits: A Case Study on Successive Approximation ADC. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Santanu Kundu, Chetan Suryakant Padharia, Ravi Sankar Kerla |
MLTDRC: Machine Learning Driven Faster Timing Design Rule Check Convergence. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Biswojit Nayak, B. N. Bhramar Ray |
ISP: An Improved Slicing Pair Code for Skewed Slicing Floorplan. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Masataka Hirai, Debraj Kundu, Shigeru Yamashita, Sudip Roy 0001, Hiroyuki Tomiyama |
Transport-Free Placement of Mixers for Realizing Bioprotocol on Programmable Microfluidic Devices. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Amina Haroon, Ram Krishna Ghosh, Sneh Saurabh |
Implementation of Probabilistic Bits (Pbits) using Low Barrier Magnets: Investigation and Analysis. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sivalingam Thirubalan, Suresh Kumar Kopparti, Desmond Tan Hai Peng |
Efficient 3D Modeling Methodology for High-Speed Channels. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Darakshan Jamal, Ratheesh T. Veetil |
Efficient MBIST Area and Test Time Estimator Using Machine Learning Technique. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sujata Kotabagi, Raghavendra Nayak, Sachin Dalabanjan, Vineet P. N, Priyanka L. Patil, Sameer Hemadri |
Maximum Power Point Tracking using Buck-Boost converter for EH-PMIC. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Samuel Abrams, Vijaykrishnan Narayanan |
Extending Action Recognition in the Compressed Domain. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Gaurav Saraswat, Anuj Parashar |
Voltage Boosted Schmitt Trigger Sense Amplifier (VBSTSA) With Improved Offset And Reaction Time For High Speed SRAMs. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Suriya Srinivasan, Ranga Vemuri |
Mutation Analysis and Model Checking Guided Test Generation for SoC Run-Time Monitors. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Somnath Mondal, Sachin Patkar, T. K. Pal |
Hardware implementation of Ring-LWE lattice cryptography with BCH and Gray coding based error correction. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Belal Iqbal, Anuj Grover, Harsh Rawat |
A Common Mode Insensitive Process Tolerant Sense Amplifier Design for In Memory Compute Applications in 65nm LSTP Technology. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Ashutosh Yadav, Anand Bulusu, Surinder Singh, Sudeb Dasgupta |
Radiation Hardened CMOS Programmable Bias Generator for Space Applications at 180nm. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sayandeep Sanyal, Mayukh Bhattacharya, Pallab Dasgupta, Amit Patra |
Accelerating Defect Simulation in Analog and Mixed-Signal Circuits by Parallel Defect Injection. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas Grurl, Christoph Pichler, Jürgen Fuß, Robert Wille |
Automatic Implementation and Evaluation of Error-Correcting Codes for Quantum Computing: An Open-Source Framework for Quantum Error Correction. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Alisha P. B, Tripti S. Warrier |
True Random Number Generator based on Voltage-Gated Spintronic structure. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Omkareshwar Gundoji, Dighanchal Banerjee, Sounak Dey, Arpan Pal 0001 |
Mutual Information based Efficient Spike Encoding on FPGA. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Dharmaray Nedalgi, Lavanya M. N, Saroja V. Siddamal |
Supply Noise and Peak Current Reduction in High-Speed Output Drivers. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sumanta Pyne |
Translation of Array Expressions for in-Memory Computation on Memristive Crossbar. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | N. S. Aswathy, Deep Bhuinya, Hemangee K. Kapoor |
WIB-SAR: Write Intensity Based Selective Address Remapping. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Swati Shilaskar, Anup Behare, Ketki Sonawane, Shripad Bhatlawande |
Post Silicon Validation for I2C (SMBUS) Peripheral. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Noopur Srivastava, Anil Kumar Rajput, Manisha Pattanaik, Gaurav Kaushal |
An Energy-Efficient and Robust 10T SRAM Based in-Memory Computing Architecture. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Abhishek Jadhav, Varsha Bhide, T. N. V. Raghuram, Tapas Nandy |
SV Based Fast & Accurate Verification Methodology for CTLE Adaptation Algorithm. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Saurabh Goyal, Sanjay Kumar Wadhwa, Divya Tripathi, Gaurav Agrawal, Krishna Thakur, Deependra Kumar Jain, Alvin Leng Sun Loke, Atul Kumar, Manish Kumar Upadhyay, Bhawna, Sanjoy Kumar Dey |
Design Challenges and Techniques for 5nm FinFET CMOS Analog/Mixed-Signal Circuits. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Josie E. Rodriguez Condia, Matteo Sonza Reorda |
Evaluating the Impact of Transition Delay Faults in GPUs. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Kailash Prasad, Ayush Srivastava, Nistha Baruah, Joycee Mekie |
Fast and Robust Sense Amplifier for Digital In Memory Computing. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Anamika Sharma, Sachin Divekar, Rajesh Zele |
A Portable Ultra-low-cost Multi-Gas Sensing System-on-Module for Wireless Air Quality Monitoring Network. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Dinesh Kushwaha, Ashish Joshi, Neha Gupta, Aditya Sharma, Sandeep Miryala, Rajiv V. Joshi, Sudeb Dasgupta, Anand Bulusu |
An Energy-Efficient Multi-bit Current-based Analog Compute-In-Memory Architecture and design Methodology. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Nandit Kaushik, B. Srinivasu |
Memristor-based High Speed and Area Efficient Comparators in IMPLY Logic. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Shyam Peraka, SK Irfan Ali, Durga Vasu Mogili, Ashok Kumar Palivela, Sudheer Reddy, Jyotsna Bavisetti, Dhanush Reddy Y |
FPGA based Smart and Sustainable Agriculture. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Rakesh M. B., Pabitra Das, Sai Pranav K. R, Amit Acharyya |
GRILAPE: Graph Representation Inductive Learning-based Average Power Estimation for Frontend ASIC RTL Designs. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sumana Ghosh |
Delay-Aware Control for Autonomous Systems. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | |
36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, VLSID 2023, Hyderabad, India, January 8-12, 2023 |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Hanumantharaya H, Ratheesh T. Veetil, Anvesh Gadi |
Signal Agnostic Scalable Scan Wrapper Design. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Padmaja Bhamidipati, Ranga Vemuri |
ASPIRE: An Intermediate Representation for Abstract Security Policies. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Harikrishna Kambham, Srayan Sankar Chatterjee, Adithya Sunil Edakkadan, Abhishek Srivastava 0002 |
Analysis and Design of Low Phase Noise 20 GHz VCO for Frequency Modulated Continuous Wave Chirp Synthesizers in mmWave Radars. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Reshma Sinha, Jasdeep Kaur |
Enhanced Performance Parameters of Magnetic Tunnel Junction with Composite Dielectric Barrier. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Vishesh Mishra, Neelofar Hassan, Akshay Mehta, Urbi Chatterjee |
DARK-Adders: Digital Hardware Trojan Attack on Block-based Approximate Adders. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sunny Bezawada, Battu Prakash Reddy |
The Acceleration of OPUS Codec Using Processor - FPGA Co-processing. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | M. Mohamed Asan Basiri, PVSR Bharadwaja |
Efficient FPGA Implementations of Lifting based DWT using Partial Reconfiguration. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Rupesh D. Kadhao, Siddharth R. K., Nithin Kumar Y. B., Vasantha M. H., Devesh Dwivedi |
A 2.5 GHz, 1-Kb SRAM with Auxiliary Circuit Assisted Sense Amplifier in 65-nm CMOS Process. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sresthavadhani Mantha, Adithya Sunil Edakkadan, Arpit Sahni, Abhishek Srivastava 0002 |
An mmWave Frequency Range Multi-Modulus Programmable Divider for FMCW Radar Applications. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohd Sakib Ansari S, Kavitha S, Bhupendra Singh Reniwal, Santosh Kumar Vishvakarma |
Design of Radiation Hardened 12T SRAM with Enhanced Reliability and Read/Write Latency for Space Application. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sanjoy Kumar Dey, Mukul Sarkar, Shouribrata Chatterjee |
A low-power resistive tail dynamic comparator with self-shut mechanism. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Snigdha Jakkoju, Deepthi J. Bandarupalli, Anil Srikanth, Saji Thomas, Saurabh Saxena |
A 2.25 GHz PLL with 0.05-2 MHz Inloop Phase Modulation and -70 dBc Reference Spur for Telemetry Applications. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Vinay Kumar, Vijay Sahu, Ambar Khanda, Sudhir Kumar |
Dynamic Keeper for 1R1W 8T-SRAM to Enable Read Operation at 150c till 0.5v in 5nm FinFET. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sowmyashree S, Hitesh Shrimali |
A Low Noise Bandgap Reference with 0.89 V Vref, 0.88 μVrms noise and 80 dB of PSRR. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Vivek Kumar, Jyoti Patel, Arnab Datta, Sudeb Dasgupta |
FEM modeling of gate resistance for 5 nm SGC/DGC Stacked Nanosheet Transistor. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sajin S, Shubham Sunil Garag, Anuj Phegade, Deepshikha Gusain, Kuruvilla Varghese |
Design of a Multi-Core Compatible Linux Bootable 64-bit Out-of-Order RISC-V Processor Core. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Reeshita Kallapu, Dimitrios Stathis 0001, Srinivas Boppu, Ahmed Hemani |
DRRA-based Reconfigurable Architecture for Mixed-Radix FFT. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Krishnan Sukumar, Santosh Vodnala, Ravindra Ayyagari, Animesh Jain, Thanapandi Ganesan, Rajesh R |
Surmounting Challenges in the Design of Low Power Real Time Clock IP for Advanced FinFET Technology Nodes. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Meghvern Pathak, Rahul Shrestha |
Hardware Architecture and FPGA Implementation of Low Latency Turbo Encoder for Deep-Space Communication Systems. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | K. Lakshmi BhanuPrakash Reddy, Haripriya R. S, Keerthija Puli, Subba Ramkumar Reddy Annapalli, Vikramkumar Pudi |
Design of Energy Efficient and Low Delay Posit Multiplier. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Vishwajeet S. B, Vaibhavi Solanki, Anand D. Darji |
Design of Hardware Efficient Approximate DCT Architecture. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Swetha Ananthanarayanan, Bhupendra Singh Reniwal, Abhishek Upadhyay |
Design and Analysis of Multibit Multiply and Accumulate (MAC) unit: An Analog In-Memory Computing Approach. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Siva Charan Nimmagadda, Hari Bilash Dubey |
Programmable Delay Line With Inherent Duty Cycle Correction. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Akash Poptani, Abhishek Mittal, Rishit Saiya, Rajshekar Kalayappan, Sandeep Chandran |
SANNA: Secure Acceleration of Neural Network Applications. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Kahkeshan Naz, Rohit Jindal, Sai Boothkuri |
A Novel AI Based Approach for Performance validation. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Debjit Batabyal, Sandeep Kumar Singh, Rajnish Kumar Mishra, Anuj Grover |
A Sense Amplifier Based Bulk Built-In Current Sensor for Detecting Laser-Induced Currents. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Aditya Ramkumar, Anshul Verma, Bishnu Prasad Das |
Ultra-Low Power Non-Uniform SAR ADC based ECG detector for Early Detection of Cardiovascular Diseases. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Shyam Peraka, SK Irfan Ali, Reddy Sudheer, Pilli Praveen Kumar, Goutham Kondala, Dimple Samal |
A Novel Approach for Assisting Blind People Using a Smart Wearable Device. |
VLSID |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | M. K. Aparna Nair, Police Manoj Kumar Reddy, Y. L. Abijith, Venkatesh Rajagopalan, Soumya J. |
Hardware Implementation of Network Interface Architecture for RISC-V based NoC-MPSoC Framework. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Aditi Singh |
Equivalence Checking of Non-Binary Combinational Netlists. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Ebrahimabadi, Mohamed F. Younis, Wassila Lalouani, Naghmeh Karimi |
An Attack Resilient PUF-based Authentication Mechanism for Distributed Systems. |
VLSID |
2022 |
DBLP DOI BibTeX RDF |
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