Search results for "layouts"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
26	Peter Lindstrom 0001, Valerio Pascucci	Terrain Simplification Simplified: A General Framework for View-Dependent Out-of-Core Visualization.	IEEE Trans. Vis. Comput. Graph.	2002	DBLP DOI BibTeX RDF	continuous levels of detail, edge bisection, geomorphing, external memory paging, out-of-core algorithms, data layouts, Terrain visualization, surface simplification, error metrics, view-dependent refinement
26	Mahmut T. Kandemir, J. Ramanujam	Data Relation Vectors: A New Abstraction for Data Optimizations.	IEEE Trans. Computers	2001	DBLP DOI BibTeX RDF	compiler optimizations for memory hierarchy, reuse vectors, data relation vectors, loop transformations, Data reuse, cache locality, memory layouts
26	Hiroshi Hosobe	A modular geometric constraint solver for user interface applications.	UIST	2001	DBLP DOI BibTeX RDF	module mechanisms, geometric constraints, graph layouts, soft constraints, constraint solvers
26	Reinhard Rauscher, Dieter Klawan, Hans-Jürgen Bandelt	Results Given by a New Evaluation System for Placement and Routing Heuristics.	EUROMICRO	1996	DBLP DOI BibTeX RDF	routing heuristics, placement heuristics, minimal hardware requirements, fabrication processes, algorithm development, VLSI, programming languages, VLSI layouts, evaluation system, hardware platforms
26	Peter Lüders, Rolf Ernst	Research report: improving browsing in information by the automatic display layout.	INFOVIS	1995	DBLP DOI BibTeX RDF	automatic display layout, graph structured information, automatic layout system, time consuming, manual layout, user requests, display layouts, information retrieval, graphical user interfaces, user modelling, user model, human factors, computer animation, information network, graphical representations, information browsing, layout algorithms
26	J. T. Mowchenko, Y. Yang	Optimizing wiring space in slicing floorplans.	Great Lakes Symposium on VLSI	1995	DBLP DOI BibTeX RDF	wiring space optimisation, slicing floorplans, net density, sibling rectangles, circuit modules, routed layouts, VLSI, heuristic, network routing, circuit layout CAD, circuit optimisation, integrated circuit layout, branch and bound algorithm, wiring, IC layout
26	Sabine Randriamasy	A set-based benchmarking method for address bloc location on arbitrarily complex grey level images.	ICDAR	1995	DBLP DOI BibTeX RDF	set-based benchmarking method, address bloc location, arbitrarily complex grey level images, mailpiece, ground truth file, automatically located zones, ground truth lines, adaptive binarization, manually located zones, partial line locatation, contents-related text line importance, explicit error diagnosis, numerical evaluation, image segmentation, layouts, pixels, page segmentation, visual quality
26	Hussein M. Alnuweiri	Optimal VLSI Networks for Multidimensional Transforms.	IEEE Trans. Parallel Distributed Syst.	1994	DBLP DOI BibTeX RDF	optimal VLSI networks, multidimensional transforms, AT/sup 2/-optimal networks, mapping large K-shuffle networks, index-rotation operations, regular layouts, VLSI, fast Fourier transforms, discrete Fourier transform, circuit analysis computing, minimisation of switching nets
22	Xiaojun Bi 0001, Barton A. Smith, Shumin Zhai	Quasi-qwerty soft keyboard optimization.	CHI	2010	DBLP DOI BibTeX RDF	qwerty, optimization, touch screens, soft keyboard
22	Hector Ouilhet	Google Sky Map: using your phone as an interface.	Mobile HCI	2010	DBLP DOI BibTeX RDF
22	Michael Douma, Grzegorz Ligierko, Ovidiu Ancuta, Pavel Gritsai, Sean Liu	SpicyNodes: Radial Layout Authoring for the General Public.	IEEE Trans. Vis. Comput. Graph.	2009	DBLP DOI BibTeX RDF
22	Yeonsoo Yang, Scott R. Klemmer	Aesthetics matter: leveraging design heuristics to synthesize visually satisfying handheld interfaces.	CHI Extended Abstracts	2009	DBLP DOI BibTeX RDF	GUI layout, design tool, automatic interface generation
22	Florent Montreuil, Emmanuele Grosicki, Laurent Heutte, Stéphane Nicolas	Unconstrained Handwritten Document Layout Extraction Using 2D Conditional Random Fields.	ICDAR	2009	DBLP DOI BibTeX RDF
22	Kamran Ali, Knut Hartmann, Georg Fuchs, Heidrun Schumann	Adaptive Layout for Interactive Documents.	Smart Graphics	2008	DBLP DOI BibTeX RDF
22	Hiroki Matsutani, Michihiro Koibuchi, D. Frank Hsu, Hideharu Amano	Three-Dimensional Layout of On-Chip Tree-Based Networks.	ISPAN	2008	DBLP DOI BibTeX RDF	Fat H-Tree, Network-on-Chip, Fat Tree, 3-D IC
22	Hiroshi Hosobe	Analysis of a high-dimensional approach to interactive graph drawing.	APVIS	2007	DBLP DOI BibTeX RDF
22	Xiaoping Tang, Xin Yuan, Michael S. Gray	Practical method for obtaining a feasible integer solution in hierarchical layout optimization.	ICCAD	2007	DBLP DOI BibTeX RDF
22	Chris Hawblitzel, Heng Huang, Lea Wittie, Juan Chen	A garbage-collecting typed assembly language.	TLDI	2007	DBLP DOI BibTeX RDF	garbage collection, typed assembly language
22	Ian Vollick, Daniel Vogel 0001, Maneesh Agrawala, Aaron Hertzmann	Specifying label layout style by example.	UIST	2007	DBLP DOI BibTeX RDF	design, learning, workflows, labeling
22	Kazuya Uyama, Morihiko Tamai, Yoshihiro Murata, Naoki Shibata, Keiichi Yasumoto, Minoru Ito	A Delivery Method for Compound Video Playback in Wireless Network.	ISPA Workshops	2006	DBLP DOI BibTeX RDF
22	Rong Liu, Hao Zhang 0002, Oliver van Kaick	Spectral Sequencing Based on Graph Distance.	GMP	2006	DBLP DOI BibTeX RDF
22	Dirk Beyer 0001, Andreas Noack	Clustering Software Artifacts Based on Frequent Common Changes.	IWPC	2005	DBLP DOI BibTeX RDF
22	Joshua Wing Kei Ho, Seok-Hee Hong 0001	Drawing Clustered Graphs in Three Dimensions.	GD	2005	DBLP DOI BibTeX RDF
22	Junichi Saruwatari, Masafumi Hagiwara	Ikebana Support System Reflecting Kansei with Interactive Evolutionary Computation.	ICEC	2005	DBLP DOI BibTeX RDF	ikebana, Evolutionary computation, image scale
22	Suryani Lim, Lianping Chen, Guojun Lu, Ray Smith	Browsing Texture Image Databases.	MMM	2005	DBLP DOI BibTeX RDF
22	Manish Garg, Laurent Le Cam, Matthieu Gonzalez	Lithography Driven Layout Design.	VLSI Design	2005	DBLP DOI BibTeX RDF
22	Eunice E. Santos, Gayathri Muthukrishnan	Efficient Simulation Based on Sweep Selection for 2-D and 3-D Ising Spin Models on Hierarchical Clusters.	IPDPS	2004	DBLP DOI BibTeX RDF
22	Chi-Hsiang Yeh	Optimal Layout for Fast Fourier Transform in Multilayer VLSI.	IPDPS	2004	DBLP DOI BibTeX RDF
22	Lubomir Torok, Imrich Vrto	Layout Volumes of the Hypercube.	GD	2004	DBLP DOI BibTeX RDF
22	Seok-Hee Hong 0001, Damian Merrick, Hugo A. D. do Nascimento	The Metro Map Layout Problem.	GD	2004	DBLP DOI BibTeX RDF
22	Michel Côté, Philippe Hurat	Layout Printability Optimization Using a Silicon Simulation Methodology.	ISQED	2004	DBLP DOI BibTeX RDF
22	Quang Vinh Nguyen, Mao Lin Huang	A Fast Focus + Context Viewing Technique for the Navigation of Classical Hierarchical Layout.	IV	2003	DBLP DOI BibTeX RDF
22	Akira Matsubayashi	VLSI layout of trees into grids of minimum width.	SPAA	2003	DBLP DOI BibTeX RDF	cutwidth, grid, tree, graph embedding, VLSI layout, graph layout, aspect ratio
22	Yu Chen 0005, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky	Area fill synthesis for uniform layout density.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2002	DBLP DOI BibTeX RDF
22	Shai Rubin, Rastislav Bodík, Trishul M. Chilimbi	An efficient profile-analysis framework for data-layout optimizations.	POPL	2002	DBLP DOI BibTeX RDF
22	Qi Tian 0001, Baback Moghaddam, Thomas S. Huang	Visualization, Estimation and User-Modeling for Interactive Browsing of Image Libraries.	CIVR	2002	DBLP DOI BibTeX RDF
22	N. E. Crosbie, Mahmut T. Kandemir, Ibrahim Kolcu, J. Ramanujam, Alok N. Choudhary	Strategies for Improving Data Locality in Embedded Applications.	ASP-DAC/VLSI Design	2002	DBLP DOI BibTeX RDF
22	Avaneendra Gupta, John P. Hayes	CLIP: integer-programming-based optimal layout synthesis of 2D CMOS cells.	ACM Trans. Design Autom. Electr. Syst.	2000	DBLP DOI BibTeX RDF	CMOS networks, circuit clustering, diffusion sharing, leaf cell synthesis, transistor chains, two-dimensional layout, integer programming, integer linear programming, layout optimization, module generation
22	Chi-Hsiang Yeh, Behrooz Parhami, Emmanouel A. Varvarigos	The Recursive Grid Layout Scheme for VLSI Layout of Hierarchical Networks.	IPPS/SPDP	1999	DBLP DOI BibTeX RDF
22	Avaneendra Gupta, John P. Hayes	Near-Optimum Hierarchical Layout Synthesis of Two-Dimensional CMOS Cells.	VLSI Design	1999	DBLP DOI BibTeX RDF
22	Ulrik Brandes, Dorothea Wagner	Dynamic Grid Embedding with Few Bends and Changes.	ISAAC	1998	DBLP DOI BibTeX RDF
22	Koichi Wada 0001, Wei Chen 0003, Yupin Luo, Kimio Kawaguchi	Optimal Fault-Tolerant ATM-Routings for Biconnected Graphs.	WG	1997	DBLP DOI BibTeX RDF
22	John H. Shamilian, Henry S. Baird, Thomas L. Wood	A retargetable table reader.	ICDAR	1997	DBLP DOI BibTeX RDF	retargetable table reader, machine-printed documents, predefined tabular-data layout, textual data, record lines, fixed-width fields, field-specific contextual knowledge, small print, tight line-spacing, photocopies, line-art, background patterns, pitch-estimation, high-performance OCR, segmentation, graphical user interface, neural nets, document image processing, skew-correction
22	Qinghong Wu, C. Y. Roger Chen, Bradley S. Carlson	LILA: layout generation for iterative logic arrays.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1995	DBLP DOI BibTeX RDF
22	Bryan Preas, Massoud Pedram, Don Curry	Automatic Layout of Silicon-on-Silicon Hybrid Packages.	DAC	1989	DBLP DOI BibTeX RDF
22	Zheng Liu, Lihong Zhang	Performance-constrained template-driven retargeting for analog and RF layouts.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	optimization, performance, layout, retargeting, parasitics
22	Yaniv Frishman, Ayellet Tal	Uncluttering Graph Layouts Using Anisotropic Diffusion and Mass Transport.	IEEE Trans. Vis. Comput. Graph.	2009	DBLP DOI BibTeX RDF
22	Soonyong Park, Howon Cheong, Sung-Kee Park	Coarse-to-fine global localization for mobile robots with hybrid maps of objects and spatial layouts.	IROS	2009	DBLP DOI BibTeX RDF
22	David Eppstein, Elena Mumford	Orientation-Constrained Rectangular Layouts.	WADS	2009	DBLP DOI BibTeX RDF
22	Zheng Liu, Lihong Zhang	Performance-constrained parasitic-aware retargeting and optimization of analog layouts.	CCECE	2009	DBLP DOI BibTeX RDF
22	Steffen Lohmann, Jürgen Ziegler 0001, Lena Tetzlaff	Comparison of Tag Cloud Layouts: Task-Related Performance and Visual Exploration.	INTERACT (1)	2009	DBLP DOI BibTeX RDF	Performance, Visualization, Evaluation, Navigation, Eye Tracking, Perception, Tagging, Folksonomy, Tag Clouds, User Goals
22	Masato Nakamura, Shohei Asami, Tadachika Ozono, Toramatsu Shintani	A Dynamic Rearrangement Mechanism of Web Page Layouts Using Web Agents.	IEA/AIE	2009	DBLP DOI BibTeX RDF
22	Lihong Zhang, Nuttorn Jangkrajarng, Sambuddha Bhattacharya, C.-J. Richard Shi	Parasitic-Aware Optimization and Retargeting of Analog Layouts: A Symbolic-Template Approach.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
22	Daniel G. Aliaga, Bedrich Benes, Carlos A. Vanegas, Nathan Andrysco	Interactive Reconfiguration of Urban Layouts.	IEEE Computer Graphics and Applications	2008	DBLP DOI BibTeX RDF	urban reconstruction, texture synthesis, geometric constraints, image synthesis, procedural modeling, style
22	Frank van Ham, Bernice E. Rogowitz	Perceptual Organization in User-Generated Graph Layouts.	IEEE Trans. Vis. Comput. Graph.	2008	DBLP DOI BibTeX RDF
22	Seok-Hee Hong 0001, Hiroshi Nagamochi	Approximating Crossing Minimization in Radial Layouts.	LATIN	2008	DBLP DOI BibTeX RDF
22	Vivek Joshi, Brian Cline, Dennis Sylvester, David T. Blaauw, Kanak Agarwal	Leakage power reduction using stress-enhanced layouts.	DAC	2008	DBLP DOI BibTeX RDF	performance, mobility, layout, leakage, stress
22	Alessandro Nordio, Carla-Fabiana Chiasserini, Emanuele Viterbo	The impact of quasi-equally spaced sensor layouts on field reconstruction.	IPSN	2007	DBLP DOI BibTeX RDF	sensor networks, performance analysis, signal reconstruction, irregular sampling
22	Megha Gupta, Srinivas Akella	A scheduling and routing algorithmfor digital microfluidic ring layouts with bus-phase addressing.	IROS	2007	DBLP DOI BibTeX RDF
22	David M. Pawlowski, Liang Deng, Martin D. F. Wong	Fast and Accurate OPC for Standard-Cell Layouts.	ASP-DAC	2007	DBLP DOI BibTeX RDF
22	Michael Balzer, Oliver Deussen	Level-of-detail visualization of clustered graph layouts.	APVIS	2007	DBLP DOI BibTeX RDF
22	Adam L. Buchsbaum, Emden R. Gansner, Suresh Venkatasubramanian	Directed graphs and rectangular layouts.	APVIS	2007	DBLP DOI BibTeX RDF
22	Kevin W. McCullen	Redundant Via Insertion in Restricted Topology Layouts.	ISQED	2007	DBLP DOI BibTeX RDF
22	I. Scott MacKenzie, Janet C. Read	Using paper mockups for evaluating soft keyboard layouts.	CASCON	2007	DBLP DOI BibTeX RDF
22	Bongshin Lee, Cynthia Sims Parr, Catherine Plaisant, Benjamin B. Bederson, Vladislav Daniel Veksler, Wayne D. Gray, Christopher Kotfila	TreePlus: Interactive Exploration of Networks with Enhanced Tree Layouts.	IEEE Trans. Vis. Comput. Graph.	2006	DBLP DOI BibTeX RDF	Piccolo Zoomable User Interface (ZUI) Toolkit, information visualization, graphical user interfaces, interaction techniques, Graph visualization, evaluation/methodology, navigation techniques
22	José R. Herrero 0001, Juan J. Navarro	Using Non-canonical Array Layouts in Dense Matrix Operations.	PARA	2006	DBLP DOI BibTeX RDF
22	Keoncheol Shin, Jungeun Kim, Seonggun Kim, Hwansoo Han	Restructuring field layouts for embedded memory systems.	DATE	2006	DBLP DOI BibTeX RDF
22	Nuttorn Jangkrajarng, Lihong Zhang, Sambuddha Bhattacharya, Nathan Kohagen, C.-J. Richard Shi	Template-based parasitic-aware optimization and retargeting of analog and RF integrated circuit layouts.	ICCAD	2006	DBLP DOI BibTeX RDF	analog/RF integrated circuits, layout automation, layout symmetry, design reuse, parasitics
22	Ewa Grabska, Katarzyna Grzesiak-Kopec, Grazyna Slusarczyk	Designing Floor-Layouts with the Assistance of Curious Agents.	International Conference on Computational Science (3)	2006	DBLP DOI BibTeX RDF
22	Enrique Vallejo 0001, Ramón Beivide, Carmen Martínez	Practicable Layouts for Optimal Circulant Graphs.	PDP	2005	DBLP DOI BibTeX RDF
22	Kaushik Sinha, Xuan Zhang, Ruoming Jin, Gagan Agrawal	Using Data Mining Techniques to Learn Layouts of Flat-File Biological Datasets.	BIBE	2005	DBLP DOI BibTeX RDF
22	Knut Hartmann, Timo Götzelmann, Kamran Ali, Thomas Strothotte	Metrics for Functional and Aesthetic Label Layouts.	Smart Graphics	2005	DBLP DOI BibTeX RDF
22	Seok-Hee Hong 0001, Nikola S. Nikolov	Hierarchical Layouts of Directed Graphs in Three Dimensions.	GD	2005	DBLP DOI BibTeX RDF
22	Ming C. Hao, Umeshwar Dayal, Daniel A. Keim, Tobias Schreck	Importance-Driven Visualization Layouts for Large Time Series Data.	INFOVIS	2005	DBLP DOI BibTeX RDF	Space-Filling Layout Generation, Information Visualization, Time Series
22	Masanobu Honda, Kazunori Mizuno, Yukio Fukui, Seiichi Nishihara	Updating Building Layouts of Time-Varying Virtual Cities.	Computer Graphics International	2004	DBLP DOI BibTeX RDF
22	Vida Dujmovic, David R. Wood	Layouts of Graph Subdivisions.	GD	2004	DBLP DOI BibTeX RDF
22	Michele Flammini, Giorgio Gambosi, Alessandro Gasparini, Alfredo Navarra	Dynamic Layouts for Wireless ATM.	Euro-Par	2003	DBLP DOI BibTeX RDF
22	Eric J. Schwabe, Ian M. Sutherland	Efficient Mappings for Parity-Declustered Data Layouts.	COCOON	2003	DBLP DOI BibTeX RDF
22	Ramesh Marasini, Nashwan Dawood	CEPM 1: simulation modeling and optimization of stockyard layouts for precast concrete products.	WSC	2002	DBLP DOI BibTeX RDF
22	Bikram Baidya, Tamal Mukherjee	Extraction and LVS for mixed-domain integrated MEMS layouts.	ICCAD	2002	DBLP DOI BibTeX RDF	MEMS LVS, MEMS extraction, integrated MEMS, verification, parasitics
22	Franklin M. Schellenberg, Luigi Capodieci	Impact of RET on physical layouts.	ISPD	2001	DBLP DOI BibTeX RDF	off-axis illumination, physical verification, simulation, DFM, OPC, lithography, RET, phase-shifting, PSM
22	Dinesh Bhatia, James Haralambides	Resource requirements and layouts for field programmable interconnection chips.	IEEE Trans. Very Large Scale Integr. Syst.	2000	DBLP DOI BibTeX RDF
22	Alpesh Patel, Anthony J. Kusalik, Carl McCrosky	Area-Efficient VLSI Layouts for Binary Hypercubes.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	track assignment, Hypercube, VLSI layout
22	Prosenjit Bose, Christos Kaklamanis, Lefteris M. Kirousis, Evangelos Kranakis, Danny Krizanc, David Peleg	Station Layouts in the Presence of Location Constraints.	ISAAC	1999	DBLP DOI BibTeX RDF
22	Dieter Kratsch, Lorna Stewart	Approximating Bandwidth by Mixing Layouts of Interval Graphs.	STACS	1999	DBLP DOI BibTeX RDF
22	James Hwang, Cameron Patterson, S. Mohan, Eric Dellinger, Sujoy Mitra, Ralph Wittig	Generating Layouts for Self-implementing Modules.	FPL	1998	DBLP DOI BibTeX RDF
22	Markus Wolf 0001, Ulrich Kleine	Application independent module generation in analog layouts.	ED&TC	1997	DBLP DOI BibTeX RDF
22	Ornan Ori Gerstel, Avishai Wool, Shmuel Zaks	Optimal Layouts on a Chain ATM Network (Extended Abstract).	ESA	1995	DBLP DOI BibTeX RDF
22	Shun-Lin Su, Charles H. Barry, Chi-Yuan Lo	A space-efficient short-finding algorithm [VLSI layouts].	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1994	DBLP DOI BibTeX RDF
22	Koji Nakano	Linear Layouts of Generalized Hypercubes.	WG	1993	DBLP DOI BibTeX RDF
22	Bill Lin 0001, A. Richard Newton	A circuit disassembly technique for synthesizing symbolic layouts from mask descriptions.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1990	DBLP DOI BibTeX RDF
22	Saleem M. Haider, Peng H. Ang	A data-structuring technique for gridded VLSI layouts.	EURO-DAC	1990	DBLP DOI BibTeX RDF
22	Masato Edahiro, Takeshi Yoshimura	New Placement and Global Routing Algorithms for Standard Cell Layouts.	DAC	1990	DBLP DOI BibTeX RDF
22	Gerhard Zimmermann	A New Area and Shape Function Estimation Technique for VLSI Layouts.	DAC	1988	DBLP BibTeX RDF
22	Donald G. Baltus, Jonathan Allen	SOLO: A Generator of Efficient Layouts from Optimized MOS Circuit Schematics.	DAC	1988	DBLP BibTeX RDF
22	Antoni A. Szepieniec	Integrated placement/routing in sliced layouts.	DAC	1986	DBLP DOI BibTeX RDF
22	Fillia Makedon, Ivan Hal Sudborough	Minimizing Width in Linear Layouts.	ICALP	1983	DBLP DOI BibTeX RDF
19	Tae-Joon Kim, Bochang Moon, Duksu Kim, Sung-Eui Yoon	RACBVHs: Random-Accessible Compressed Bounding Volume Hierarchies.	IEEE Trans. Vis. Comput. Graph.	2010	DBLP DOI BibTeX RDF	Hierarchy and BVH compression, cache-coherent layouts, ray tracing, collision detection, random access
19	Marc Tchiboukdjian, Vincent Danjean, Bruno Raffin	Binary Mesh Partitioning for Cache-Efficient Visualization.	IEEE Trans. Vis. Comput. Graph.	2010	DBLP DOI BibTeX RDF	Cache-aware, mesh layouts, data locality, isosurface extraction, unstructured mesh, cache-oblivious
19	Behzad Sajadi, Yan Huang 0003, Pablo Diaz-Gutierrez, Sung-Eui Yoon, M. Gopi 0001	A novel page-based data structure for interactive walkthroughs.	SI3D	2009	DBLP DOI BibTeX RDF	walkthrough systems, spatial data structures, out-of-core algorithms, data layouts