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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2784 occurrences of 1319 keywords
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Results
Found 4097 publication records. Showing 4097 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
31 | Keith A. Bowman, James W. Tschanz, Shih-Lien Lu, Paolo A. Aseron, Muhammad M. Khellah, Arijit Raychowdhury, Bibiche M. Geuskens, Carlos Tokunaga, Chris Wilkerson, Tanay Karnik, Vivek De |
Resilient microprocessor design for high performance & energy efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010, pp. 355-356, 2010, ACM, 978-1-4503-0146-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
resilient design |
31 | Uwe Brinkschulte, Daniel Lohn, Mathias Pacher |
Towards a Statistical Model of a Microprocessor's Throughput by Analyzing Pipeline Stalls. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SEUS ![In: Software Technologies for Embedded and Ubiquitous Systems, 7th IFIP WG 10.2 International Workshop, SEUS 2009, Newport Beach, CA, USA, November 16-18, 2009, Proceedings, pp. 82-90, 2009, Springer, 978-3-642-10264-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
31 | Frederik Vandeputte, Lieven Eeckhout |
Finding Stress Patterns in Microprocessor Workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Fourth International Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings, pp. 153-167, 2009, Springer, 978-3-540-92989-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
31 | Hisashige Ando, Ryuji Kan, Yoshiharu Tosaka, Keiji Takahisa, Kichiji Hatanaka |
Validation of hardware error recovery mechanisms for the SPARC64 V microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: The 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2008, June 24-27, 2008, Anchorage, Alaska, USA, Proceedings, pp. 62-69, 2008, IEEE Computer Society, 978-1-4244-2397-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
31 | Liang-Bi Chen, Yung-Chih Liu, Chen-Hung Chen, Chung-Fu Kao, Ing-Jer Huang |
Parameterized embedded in-circuit emulator and its retargetable debugging software for microprocessor/microcontroller/DSP processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 117-118, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
31 | Venkatesh Arunachalam, Wayne P. Burleson |
Low-power clock distribution in a multilayer core 3d microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, Orlando, Florida, USA, May 4-6, 2008, pp. 429-434, 2008, ACM, 978-1-59593-999-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
3D ic's, 3D processor architectures, clock grids |
31 | Michail Maniatakos, Naghmeh Karimi, Yiorgos Makris, Abhijit Jas, Chandra Tirumurti |
Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA, pp. 454-462, 2008, IEEE Computer Society, 978-0-7695-3365-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
31 | Syed Zafar Shazli, Mehdi Baradaran Tahoori |
Obtaining Microprocessor Vulnerability Factor Using Formal Methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA, pp. 63-71, 2008, IEEE Computer Society, 978-0-7695-3365-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
31 | Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis |
Exploring the speedups of embedded microprocessor systems utilizing a high-performance coprocessor data-path. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 39(3), pp. 251-271, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Coprocessor data-path, Template units, Performance, Synthesis, Kernels, Design flow, Chaining |
31 | Love Kothari, Nicholas P. Carter |
Architecture of a Self-Checkpointing Microprocessor that Incorporates Nanomagnetic Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(2), pp. 161-173, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
memory technologies, low-power design, Emerging technologies |
31 | Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V. Kodakara, David J. Lilja, Ajit Dingankar |
Design fault directed test generation for microprocessor validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 761-766, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
31 | Albert Meixner, Daniel J. Sorin |
Unified microprocessor core storage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 4th Conference on Computing Frontiers, 2007, Ischia, Italy, May 7-9, 2007, pp. 23-34, 2007, ACM, 978-1-59593-683-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
unified caching, resource allocation, microarchitecture, power-efficiency |
31 | Balaji Vaidyanathan, Wei-Lun Hung, Feng Wang 0004, Yuan Xie 0001, Narayanan Vijaykrishnan, Mary Jane Irwin |
Architecting Microprocessor Components in 3D Design Space. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 103-108, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
31 | Fu-Ching Yang, Wen-Kai Huang, Ing-Jer Huang |
Automatic Verification of External Interrupt Behaviors for Microprocessor Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 896-901, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
31 | Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis |
Performance Improvements in Microprocessor Systems Utilizing a Copressor Data-Path. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSAMOS ![In: Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2006), Samos, Greece, July 17-20, 2006, pp. 85-92, 2006, IEEE, 1-4244-0155-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Jin Yang 0006 |
Verification Challenges and Opportunities in the New Era of Microprocessor Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATVA ![In: Automated Technology for Verification and Analysis, 4th International Symposium, ATVA 2006, Beijing, China, October 23-26, 2006., pp. 6-7, 2006, Springer, 3-540-47237-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis 0001 |
Design of a Robust 8-Bit Microprocessor to Soft Errors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 10-12 July 2006, Como, Italy, pp. 195-196, 2006, IEEE Computer Society, 0-7695-2620-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Murari Mani, Mahesh Sharma, Michael Orshansky |
Application of fast SOCP based statistical sizing in the microprocessor design flow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006, pp. 372-375, 2006, ACM, 1-59593-347-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Kotaro Shimamura, Takeshi Takehara, Yosuke Shima, Kunihiko Tsunedomi |
A Single-Chip Fail-Safe Microprocessor with Memory Data Comparison Feature. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: 12th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2006), 18-20 December, 2006, University of California, Riverside, USA, pp. 359-368, 2006, IEEE Computer Society, 0-7695-2724-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Tun Li, Dan Zhu, Yang Guo 0003, GongJie Liu, Sikun Li |
MA2TG: A Functional Test Program Generator for Microprocessor Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August - 3 September 2005, Porto, Portugal, pp. 176-183, 2005, IEEE Computer Society, 0-7695-2433-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
31 | Tun Li, Dan Zhu, Lei Liang, Yang Guo 0003, Sikun Li |
Automatic functional test program generation for microprocessor verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 1039-1042, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
31 | Ioannis Panagopoulos, Christos Pavlatos, George K. Papakonstantinou |
A hardware extension of the RISC microprocessor for Attribute Grammar evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2004 ACM Symposium on Applied Computing (SAC), Nicosia, Cyprus, March 14-17, 2004, pp. 897-904, 2004, ACM, 1-58113-812-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
RISC microprocessors, Attribute Grammars, declarative programs |
31 | Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero |
Fully Automatic Test Program Generation for Microprocessor Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 11006-11011, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
31 | Mountassar Maamoun, Abdelhalim Benbelkacem, Daoud Berkani, Abderrezak Guessoum |
Interfacing in Microprocessor-based Systems with a Fast Physical Addressing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June - 2 July 2003, Calgary, Alberta, Canada, pp. 144-149, 2003, IEEE Computer Society, 0-7695-1944-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Software/hardware System, Fast Physical Addressing, Interfacing, DMA |
31 | Manish Amde, Ivan Blunno, Christos P. Sotiriou |
Automating the design of an asynchronous DLX microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 502-507, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
DLX, asynchronous, design flow |
31 | Bob Bentley |
alidating the Intel® Pentium® 4 Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: 2001 International Conference on Dependable Systems and Networks (DSN 2001) (formerly: FTCS), 1-4 July 2001, Göteborg, Sweden, Proceedings, pp. 493-500, 2001, IEEE Computer Society, 0-7695-1101-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
31 | Paul Kartschoke, Stephen F. Geissler |
Timing Driven Wiring on an Advanced Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 4-6 September 2001, Warsaw, Poland, pp. 408-413, 2001, IEEE Computer Society, 0-7695-1239-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
31 | Li-C. Wang, Magdy S. Abadir |
Test Generation Based on High-Level Assertion Specification for PowerPCTM Microprocessor Embedded Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 13(2), pp. 121-135, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
high-level test generation, assertion test generation, design validation, logic verification, symbolic trajectory evaluation |
31 | Leland L. Day, Paul A. Ganfield, Dennis M. Rickert, Fred J. Ziegler |
Test methodology for a microprocessor with partial scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998, pp. 708-716, 1998, IEEE Computer Society, 0-7803-5093-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
31 | Tsang-Ling Sheu, Yuan-Bao Shieh, Woei Lin |
The selection of optimal cache lines for microprocessor-based controllers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 23rd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1990, Orlando, Florida, USA, November 27-29, 1990, pp. 183-192, 1990, ACM/IEEE, 0-89791-413-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP BibTeX RDF |
|
31 | Alan J. Weissberger |
Keeping pace with a single-chip 16-bit microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS National Computer Conference ![In: American Federation of Information Processing Societies: 1975 National Computer Conference, 19-22 May 1975, Anaheim, CA, USA, pp. 9-14, 1975, AFIPS Press, 978-1-4503-7919-9. The full citation details ...](Pics/full.jpeg) |
1975 |
DBLP DOI BibTeX RDF |
|
30 | Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Matteo Sonza Reorda |
Exploiting an I-IP for both Test and Silicon Debug of Microprocessor Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 55-62, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Iman Faraji, Moslem Didehban, Hamid R. Zarandi |
Analysis of Transient Faults on a MIPS-Based Dual-Core Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARES ![In: ARES 2010, Fifth International Conference on Availability, Reliability and Security, 15-18 February 2010, Krakow, Poland, pp. 125-130, 2010, IEEE Computer Society, 978-0-7695-3965-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Dual-core microprocessor, Microprocessor without Interlocked Pipeline Stages (MIPS), simulation-based fault injection, vulnerability analysis, fault propagation |
26 | Soo-Mook Moon, Scott D. Carson |
Generalized Multiway Branch Unit for VLIW Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 6(8), pp. 850-862, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
generalized multiway branching, VLIW microprocessor, condition tree, mirror normalization, VLIW compiler, Instruction-level parallelism, superscalar microprocessor |
26 | Walter A. Helbig, Veljko M. Milutinovic |
A DCFL E/D-MESFET GaAs Experimental RISC Machine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 38(2), pp. 263-274, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
RCA, DCFL E/D-MESFET, RISC machine, GaAs microprocessor, instruction execution sequence, III-V semiconductors, microprocessor chips, instruction set architecture, software environment, reduced instruction set computing, 32 bit, field effect integrated circuits, gallium arsenide |
26 | Terry J. Fountain, K. N. Matthews, Michael J. B. Duff |
The CLIP7A Image Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Pattern Anal. Mach. Intell. ![In: IEEE Trans. Pattern Anal. Mach. Intell. 10(3), pp. 310-319, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
CLIP7A, image-processing chip, 16 bit, computer vision, computer vision, computerised picture processing, computerised picture processing, microprocessor chip, microprocessor chips, data processing, 8 bit |
25 | Jian Shen, Jacob A. Abraham |
An RTL Abstraction Technique for Processor Microarchitecture Validation and Test Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 16(1-2), pp. 67-81, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
microprocessor design validation, coverage measurement, test generation |
25 | A. Pavlov, Jean-Luc Béchennec, Daniel Etiemble |
Performance evaluation of the memory hierarchy of a desktop PC using commodity chips with specific traces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 23rd EUROMICRO Conference '97, New Frontiers of Information Technology, 1-4 September 1997, Budapest, Hungary, pp. 409-, 1997, IEEE Computer Society, 0-8186-8129-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
memory hierarchy simulation, desktop PC, commodity chips, PC microcomputers, synthetic bus traces, dynamically scheduled superscalar microprocessor, performance evaluation, memory architecture |
25 | Robert B. Jones, David L. Dill, Jerry R. Burch |
Efficient validity checking for processor verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1995, San Jose, California, USA, November 5-9, 1995, pp. 2-6, 1995, IEEE Computer Society / ACM, 0-8186-7213-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
formal verification, validation, decision procedure, uninterpreted functions, microprocessor architecture |
25 | G. Rothbart, R. Fullwood, H. O. Conde |
Automatic data acquisition and processing of train deceleration for rapid transit train systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Annual Conference (2) ![In: Proceedings 1978 ACM Annual Conference, Washington, DC, USA, December 4-6, 1978, Volume II, pp. 612-616, 1978, ACM, 978-0-89791-000-2. The full citation details ...](Pics/full.jpeg) |
1978 |
DBLP DOI BibTeX RDF |
Microprocessor monitor, Rapid transit system, Data acquisition |
25 | Michail Maniatakos, Naghmeh Karimi, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
Instruction-Level Impact Analysis of Low-Level Faults in a Modern Microprocessor Controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 60(9), pp. 1260-1273, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
instruction-level error, microprocessor controller, Fault simulation, concurrent error detection |
25 | Naghmeh Karimi, Michail Maniatakos, Abhijit Jas, Chandra Tirumurti, Yiorgos Makris |
Workload-Cognizant Concurrent Error Detection in the Scheduler of a Modern Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 60(9), pp. 1274-1287, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
scheduler, microprocessor, invariance, Concurrent error detection |
25 | Klaus-Dietrich Kramer, Thomas Stolze, Alexander Oppelt |
Microprocessor Benchmarks - A Detailed Look at Techniques, Problems and Solutions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSEng ![In: 21st International Conference on Systems Engineering (ICSEng 2011), Las Vegas, NV, USA, Aug. 16-18, 2011, pp. 337-340, 2011, IEEE, 978-1-4577-1078-0. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
Performance Assessment and Rating, Runtime Measurement, Benchmarks, Microprocessor, Microcontroller |
25 | Lingkan Gong, Jingfen Lu |
Verification-Purpose Operating System for Microprocessor System-Level Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 27(1), pp. 76-85, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
microprocessor verification, system-level function, Verification-Purpose Operating System, VPOS, FPGA, design and test |
25 | Amol Vasudeva, Arvind Kumar Sharma, Ashish Kumar |
Saksham: Customizable x86 Based Multi-Core Microprocessor Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICSyN ![In: First International Conference on Computational Intelligence, Communication Systems and Networks, CICSYN 2009, Indore, India, 23-25 July, 2009, pp. 220-225, 2009, IEEE Computer Society, 978-0-7695-3743-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Microprocessor Simulator, x86 Architecture Simulator, Register/Instruction Set Simulator, Object oriented, Assembler |
25 | Cecilia Metra, Daniele Rossi 0001, Martin Omaña 0001, Abhijit Jas, Rajesh Galivanche |
Function-Inherent Code Checking: A New Low Cost On-Line Testing Approach for High Performance Microprocessor Control Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 13th European Test Symposium, ETS 2008, Verbania, Italy, May 25-29, 2008, pp. 171-176, 2008, IEEE Computer Society, 978-0-7695-3150-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
microprocessor, error detecting codes, on-line testing, control logic |
25 | Emmanuel Touloupis, James A. Flint, Vassilios A. Chouliaras, David D. Ward |
Study of the Effects of SEU-Induced Faults on a Pipeline Protected Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(12), pp. 1585-1596, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
fault modeling and simulation, fault tolerance, fault injection, soft error, SEU, microprocessor test |
25 | Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David M. Brooks |
Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 26(1), pp. 119-129, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
microprocessor, energy savings, Dynamic-compilation |
25 | Scott Davidson 0001 |
An insider's look at microprocessor design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 23(2), pp. 162-163, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Pentium Pro, management, Intel, microprocessor design |
25 | Michael J. Flynn, Patrick Hung |
Microprocessor Design Issues: Thoughts on the Road Ahead. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 25(3), pp. 16-31, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
SIA, performance consideration, reliability, Power, SoC designs, microprocessor design, process technology |
25 | Lieh-Ming Wu, Kuochen Wang, Chuang-Yi Chiu |
A BNF-based automatic test program generator for compatible microprocessor verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 9(1), pp. 105-132, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Advanced microprocessor, compatibility verification, top-down recursive descent parsing method, coverage, automatic program generator, BNF |
25 | Cecilia Metra, T. M. Mak, Martin Omaña 0001 |
Fault secureness need for next generation high performance microprocessor design for testability structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the First Conference on Computing Frontiers, 2004, Ischia, Italy, April 14-16, 2004, pp. 444-450, 2004, ACM, 1-58113-741-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
built in self test, design for testability, microprocessor, comparator, fault secureness |
25 | Joachim G. Clabes, Joshua Friedrich, Mark Sweet, Jack DiLullo, Sam G. Chu, Donald W. Plass, James Dawson, Paul Muench, Larry Powell, Michael S. Floyd, Balaram Sinharoy, Mike Lee, Michael Goulet, James Wagoner, Nicole S. Schwartz, Stephen L. Runyon, Gary Gorman, Phillip J. Restle, Ronald N. Kalla, Joseph McGill, J. Steve Dodson |
Design and implementation of the POWER5 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 670-672, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
POWER5, simultaneous multi-threading (SMT), clock gating, power reduction, microprocessor design, temperature sensor |
25 | Hisashige Ando, Yuuji Yoshida, Aiichiro Inoue, Itsumi Sugiyama, Takeo Asakawa, Kuniki Morita, Toshiyuki Muta, Tsuyoshi Motokurumada, Seishi Okada, Hideo Yamashita, Yoshihiko Satsukawa, Akihiko Konmoto, Ryouichi Yamashita, Hiroyuki Sugiyama |
A 1.3GHz fifth generation SPARC64 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 702-705, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
unix server, reliability, microprocessor, microarchitecture, SPARC, clock distribution |
25 | Marco Antonio Dal Poz, Jose Edinson Aedo Cobo, Wilhelmus A. M. Van Noije, Marcelo Knörich Zuffo |
A Simple RISC Microprocessor Core Designed for Digital Set-Top-Box Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 12th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2000), 10-12 July 2000, Boston, MA, USA, pp. 35-, 2000, IEEE Computer Society, 0-7695-0716-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
FPGA, VHDL, Reconfigurable Computing, Microprocessor, MPEG, RISC, Co-Design, Instruction Set, HDTV, Set-Top-Box, iDCT, cable TV |
25 | Rajesh Raina, Robert F. Molyneaux |
Random Self-Test Method - Applications on PowerPC (tm) Microprocessor Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 19-21 February 1998, Lafayette, LA, USA, pp. 222-229, 1998, IEEE Computer Society, 0-8186-8409-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
High-Level Design Validation, Silicon Validation, Pseudo-Random Testing, Microprocessor Testing |
25 | Scott A. Taylor, Michael Quinn, Darren Brown, Nathan Dohm, Scot Hildebrandt, James Huggins, Carl Ramey |
Functional Verification of a Multiple-issue, Out-of-Order, Superscalar Alpha Processor - The DEC Alpha 21264 Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 35th Conference on Design Automation, Moscone center, San Francico, California, USA, June 15-19, 1998., pp. 638-643, 1998, ACM Press, 0-89791-964-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
21264, coverage anaysis, verification, architecture, validation, microprocessor, pseudo-random, Alpha |
25 | Mohammed Atiquzzaman, W. H. Shehadah |
A Microprocessor-Based Office Image Processing System-An Extension of Work. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(3), pp. 379-384, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
microprocessor-based office image processing system, compute-bound, I/O-bound state, image input time, computerised picture processing |
25 | Luigi Ciminiera, Adriano Valenzano |
Authentication Mechanisms in Microprocessor-Based Local Area Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 15(5), pp. 654-658, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
authentication mechanisms, microprocessor-based local area networks, unauthorized use, intruders, interface process, user-server connection, unauthorized requests, capability checking, iAPX432-based hosts, database, cache, searching, service, local area networks, security of data, identity, protect, server, hardware support, shared resources, parallel search, access rights, check, performance issues |
25 | Kwok-Tung Fung, Hwa C. Torng |
On the Analysis of Memory Conflicts and Bus Contentions in a Multiple-Microprocessor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 28(1), pp. 28-37, 1979. The full citation details ...](Pics/full.jpeg) |
1979 |
DBLP DOI BibTeX RDF |
multiple-microprocessor system, interference, memory mapping, memory conflict, Bus contention |
25 | Jan Van Campenhout, Paul H. Notredame |
A Stochastic Model for Closed-Loop Preemptive Microprocessor I/O Organizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 27(12), pp. 1126-1136, 1978. The full citation details ...](Pics/full.jpeg) |
1978 |
DBLP DOI BibTeX RDF |
Microprocessor systems, priority systems, performance analysis, stochastic modeling |
25 | Marshall C. Pease III |
The Indirect Binary n-Cube Microprocessor Array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 26(5), pp. 458-473, 1977. The full citation details ...](Pics/full.jpeg) |
1977 |
DBLP DOI BibTeX RDF |
Admissible maps, microprocessor array, n-cube array, triangular permutations, virtual array, grid computations, parallel processing, fast Fourier transform, switching network, array processor, permutation network, parallel matrix multiplication |
25 | Edward Chen, William A. Gruver, Dorian Sabaz, Lesley Shannon |
Facilitating Processor-Based DPR Systems for non-DPR Experts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2008, 14-15 April 2008, Stanford, Palo Alto, California, USA, pp. 318-319, 2008, IEEE Computer Society, 978-0-7695-3307-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Smriti Bhatnagar, Richa Gupta, Kapil Kumar Singla |
Apparatus for Ensuring Seat Belt Usage and Checking Blood Alcohol Concentration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RAM ![In: 2008 IEEE Conference on Robotics, Automation and Mechatronics, RAM 2008, 21-24 September 2008, Chengdu, China, pp. 353-357, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Cecilia Metra, Daniele Rossi 0001, T. M. Mak |
Won't On-Chip Clock Calibration Guarantee Performance Boost and Product Quality?. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(3), pp. 415-428, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
fault tolerance, Reliability, VLSI, testing |
25 | Youngjin Cho, Naehyuck Chang |
Energy-Aware Clock-Frequency Assignment in Microprocessors and Memory Devices for Dynamic Voltage Scaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(6), pp. 1030-1040, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Fred A. Bower, Daniel J. Sorin, Sule Ozev |
Online diagnosis of hard faults in microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 4(2), pp. 8, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Hard fault tolerance, fine-grained diagnosis, processor microarchitecture |
25 | Djones Lettnin, Markus Winterholer, Axel G. Braun, Joachim Gerlach, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel |
Coverage Driven Verification applied to Embedded Software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), May 9-11, 2007, Porto Alegre, Brazil, pp. 159-164, 2007, IEEE Computer Society, 0-7695-2896-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Nick Tredennick |
Computing in transition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPRCTA ![In: Proceedings of the 1st international workshop on High-performance reconfigurable computing technology and applications, HPRCTA 2007,held in conjunction with SC07, Reno, Nevada, USA, November 11, 2007, 2007, ACM Press, 978-1-59593-894-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Fred A. Bower, Daniel J. Sorin, Sule Ozev |
A Mechanism for Online Diagnosis of Hard Faults in Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 12-16 November 2005, Barcelona, Spain, pp. 197-208, 2005, IEEE Computer Society, 0-7695-2440-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Sitaram Yadavalli, Sandip Kundu |
On Fault-Simulation Through Embedded Memories On Large Industrial Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 14th International Conference on VLSI Design (VLSI Design 2001), 3-7 January 2001, Bangalore, India, pp. 117-121, 2001, IEEE Computer Society, 0-7695-0831-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | William Cunningham, Steven E. Wixson |
Useful ideas for microcomputer operating systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Southeast Regional Conference ![In: Proceedings of the 17th Annual Southeast Regional Conference, 1979, Orlando, Florida, USA, April 9-11, 1979, pp. 140-141, 1979, ACM, 978-1-4503-7330-2. The full citation details ...](Pics/full.jpeg) |
1979 |
DBLP DOI BibTeX RDF |
|
24 | Jonathan Owen, Maurice Steinman |
Northbridge Architecture of AMD's Griffin Microprocessor Family. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 28(2), pp. 10-18, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
data communications devices, low-power design, power management, processors, I/O and data communications, Hot Chips 19 |
24 | Davy Genbrugge, Lieven Eeckhout |
Memory Data Flow Modeling in Statistical Simulation for the Efficient Exploration of Microprocessor Design Spaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 57(1), pp. 41-54, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Simulation, Modeling techniques, Performance Analysis and Design Aids |
24 | Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis |
Performance and Energy Consumption Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 50(2), pp. 179-200, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
coprocessor data-path, template units, kernels, performance improvements, design flow, energy reductions, architectural synthesis |
24 | Yu Zhou, Somnath Paul, Swarup Bhunia |
Harvesting Wasted Heat in a Microprocessor Using Thermoelectric Generators: Modeling, Analysis and Measurement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 98-103, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Shijian Zhang, Weiwu Hu |
Fetching Primary and Redundant Instructions in Turn for a Fault-Tolerant Embedded Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: 14th IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2008, 15-17 December 2008, Taipei, Taiwan, pp. 1-8, 2008, IEEE Computer Society, 978-0-7695-3448-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Marek Chrobak, Christoph Dürr, Mathilde Hurand, Julien Robert |
Algorithms for Temperature-Aware Task Scheduling in Microprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAIM ![In: Algorithmic Aspects in Information and Management, 4th International Conference, AAIM 2008, Shanghai, China, June 23-25, 2008. Proceedings, pp. 120-130, 2008, Springer, 978-3-540-68865-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Ilya Wagner, Valeria Bertacco, Todd M. Austin |
Microprocessor Verification via Feedback-Adjusted Markov Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(6), pp. 1126-1138, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Erik Schüler, Marcelo Ienczczak Erigson, Luigi Carro |
Functionally Fault-tolerant DSP Microprocessor using Sigma-delta Modulated Signals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 23(4), pp. 275-292, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
error tolerant system, single event upset (SEU), Digital SignalProcessing (DSP), fault-tolerance, sigma-delta |
24 | Scott Sirowy, Yonghui Wu, Stefano Lonardi, Frank Vahid |
Two-level microprocessor-accelerator partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 313-318, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis |
Speedups and Energy Savings of Microprocessor Platforms with a Coarse-Grained Reconfigurable Data-Path. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-8, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis |
Improving performance and energy consumption in embedded microprocessor platforms with a flexible custom coprocessor data-path. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 2-7, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
coprocessor data-path, synthesis, energy savings, performance improvements, design flow |
24 | Rajdeep Chakraborty, J. K. Mandal 0001 |
A Microprocessor-based Block Cipher through Rotational Addition Technique (RAT). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIT ![In: 9th International Conference in Information Technology, ICIT 2006, Bhubaneswar, Orissa, India, 18-21 December 2006, pp. 155-159, 2006, IEEE Computer Society, 0-7695-2635-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Akira Mochizuki, Takeshi Kitamura, Hirokatsu Shirahama, Takahiro Hanyu |
Design of a Microprocessor Datapath Using Four-Valued Differential-Pair Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 36th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2006), 17-20 May 2006, Singapore, pp. 14, 2006, IEEE Computer Society, 0-7695-2532-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Hassan Al-Sukhni, David Lindberg, James Holt, Michele Reese |
Workload Slicing for Characterizing New Features in High Performance Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, pp. 61-67, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Seungbae Lee, Gi-Joon Nam, Junseok Chae, Hanseup Kim, Alan J. Drake |
Two-dimensional position detection system with MEMS accelerometers, readout circuitry, and microprocessor for padless mouse applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(10), pp. 1167-1178, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
24 | Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David M. Brooks |
A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 12-16 November 2005, Barcelona, Spain, pp. 271-282, 2005, IEEE Computer Society, 0-7695-2440-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
24 | Danghui Wang, Xiaoya Fan, Deyuan Gao, Shengbing Zhang, Jianfeng An |
Microprocessor Based Self Schedule and Parallel BIST for System-On-a-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICESS ![In: Embedded Software and Systems, Second International Conference, ICESS 2005, Xi'an, China, December 16-18, 2005, Proceedings, pp. 299-309, 2005, Springer, 3-540-30881-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
24 | Masayuki Miyazaki, Goichi Ono, Takayuki Kawahara |
Optimum threshold-voltage tuning for low-power, high-performance microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 17-20, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
24 | Paolo Bernardi, Ernesto Sánchez 0001, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero |
Diagnosing Faulty Functional Units in Processors by Using Automatically Generated Test Sets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 37-41, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
24 | Jayanta Bhadra, Magdy S. Abadir, David Burgess, Ekaterina Trofimova |
Automatic Generation of High Performance Embedded Memory Models for PowerPC Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 111-118, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
24 | Warren A. Hunt Jr. |
Mechanical Mathematical Methods for Microprocessor Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 16th International Conference, CAV 2004, Boston, MA, USA, July 13-17, 2004, Proceedings, pp. 523-533, 2004, Springer, 3-540-22342-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | Shlomi Dolev, Yinnon A. Haviv |
Self-Stabilizing Microprocessor - Analyzing and Overcoming Soft-Errors (Extended Abstract). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARCS ![In: Organic and Pervasive Computing - ARCS 2004, International Conference on Architecture of Computing Systems, Augsburg, Germany, March 23-26, 2004, Proceedings, pp. 31-46, 2004, Springer, 3-540-21238-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | Ming-che Lai, Kui Dai, Li Shen 0007, Zhiying Wang 0003 |
A New Technique for Program Code Compression in Embedded Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICESS ![In: Embedded Software and Systems, First International Conference, ICESS 2004, Hangzhou, China, December 9-10, 2004, Revised Selected Papers, pp. 158-164, 2004, Springer, 3-540-28128-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | Byung-Soo Choi, Jeong-A Lee, Dong-Soo Har |
High Performance Microprocessor Design Methods Exploiting Information Locality and Data Redundancy for Lower Area Cost and Power Consumption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, ACSAC 2004, Beijing, China, September 7-9, 2004, Proceedings, pp. 170-184, 2004, Springer, 3-540-23003-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | Michael B. Taylor, Walter Lee, Jason E. Miller, David Wentzlaff, Ian Bratt, Ben Greenwald, Henry Hoffmann, Paul R. Johnson, Jason Sungtae Kim, James Psota, Arvind Saraf, Nathan Shnidman, Volker Strumpen, Matthew I. Frank, Saman P. Amarasinghe, Anant Agarwal |
Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 31st International Symposium on Computer Architecture (ISCA 2004), 19-23 June 2004, Munich, Germany, pp. 2-13, 2004, IEEE Computer Society, 0-7695-2143-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | George K. Adam |
Design of a Microprocessor-Based Control System of a Compression Molding Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECCS ![In: 9th International Conference on Engineering of Complex Computer Systems (ICECCS 2004), 14-16 April 2004, Florence, Italy, pp. 207-212, 2004, IEEE Computer Society, 0-7695-2109-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | W. Lindsay, Ernesto Sánchez 0001, Matteo Sonza Reorda, Giovanni Squillero |
Automatic Test Programs Generation Driven by Internal Performance Counters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, pp. 8-13, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, Stephen W. Keckler, Doug Burger |
Static energy reduction techniques for microprocessor caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 11(3), pp. 303-313, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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