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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 8783 occurrences of 2559 keywords
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Results
Found 7713 publication records. Showing 7713 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
29 | Ismail Assayad |
Joint SW/HW Modelling and Design Exploration Using P-Ware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COMPSAC ![In: Proceedings of the 32nd Annual IEEE International Computer Software and Applications Conference, COMPSAC 2008, 28 July - 1 August 2008, Turku, Finland, pp. 1341-1346, 2008, IEEE Computer Society, 978-0-7695-3262-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
SW/HW Design, Scheduling, Exploration, Multiprocessor Embedded Systems |
29 | Andrew Over, Bill Clarke, Peter E. Strazdins |
A Comparison of Two Approaches to Parallel Simulation of Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: 2007 IEEE International Symposium on Performance Analysis of Systems and Software, April 25-27, 2007, San Jose, California, USA, Proceedings, pp. 12-22, 2007, IEEE Computer Society, 1-4244-1081-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
speedup analysis, Sparc Sulima, UltraSPARC IIICu-based multiprocessor systems, careful locking, simulation time quantum, serial simulation, load-balancing, parallel simulation, parallel discrete event simulation, interconnect model, NAS parallel benchmarks |
29 | Manuel E. Acacio, José González 0002, José M. García 0001, José Duato |
A Two-Level Directory Architecture for Highly Scalable cc-NUMA Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 16(1), pp. 67-79, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
directory memory overhead, two-level directory architecture, compressed sharing codes, unnecessary coherence messages, cc-NUMA multiprocessor, Scalability |
29 | Paolo Gai, Marco Di Natale, Giuseppe Lipari, Alberto Ferrari, Claudio Gabellini, Paolo Marceca |
A comparison of MPCP and MSRP when sharing resources in the Janus multiple-processor on a chip platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real Time Technology and Applications Symposium ![In: Proceedings of the 9th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2003), May 27-30, 2003, Toronto, Canada, pp. 189-, 2003, IEEE Computer Society, 0-7695-1956-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
scheduling, real-time, operating systems, multiprocessor, system-on-a-chip |
29 | Nils Nieuwejaar, David Kotz, Apratim Purakayastha, Carla Schlatter Ellis, Michael L. Best |
File-Access Characteristics of Parallel Scientific Workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 7(10), pp. 1075-1089, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
multiprocessor, scientific computing, parallel I/O, workload characterization, Parallel file system |
29 | Chris J. Scheiman, Peter R. Cappello |
A Processor-Time-Minimal Schedule for 3D Rectilinear Mesh Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: The International Conference on Application Specific Array Processors (ASAP'95), July 24-26, 1995, Strasbourg, France, pp. 26-33, 1995, IEEE Computer Society, 0-8186-7109-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
systolic array, multiprocessor schedule |
29 | Arvind Easwaran, Insik Shin, Insup Lee 0001 |
Optimal virtual cluster-based multiprocessor scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Syst. ![In: Real Time Syst. 43(1), pp. 25-59, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Virtual processor clustering, Compositional schedulability analysis, Multiprocessor scheduling, Hierarchical scheduling |
29 | Chi Keong Goh, Eu Jin Teoh, Kay Chen Tan |
A hybrid evolutionary approach for heterogeneous multiprocessor scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Soft Comput. ![In: Soft Comput. 13(8-9), pp. 833-846, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Local search, Heterogeneous, Multiprocessor scheduling, Hybrid evolutionary algorithm, Precedence |
29 | Christian Schäck, Wolfgang Heenes, Rolf Hoffmann |
A Multiprocessor Architecture with an Omega Network for the Massively Parallel Model GCA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation, 9th International Workshop, SAMOS 2009, Samos, Greece, July 20-23, 2009. Proceedings, pp. 98-107, 2009, Springer, 978-3-642-03137-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Global Cellular Automata, FPGA, multiprocessor architecture, omega network |
29 | Abu Zafar M. Shahriar, Md. Mostofa Akbar, Mohammad Sohel Rahman, Muhammad Abdul Hakim Newton |
A multiprocessor based heuristic for multi-dimensional multiple-choice knapsack problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 43(3), pp. 257-280, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Multiprocessor systems, Heuristic algorithms, Knapsack problem, Process synchronization, Inter process communication |
29 | Iyad Al Khatib, Francesco Poletti, Davide Bertozzi, Luca Benini, Mohamed Bechara, Hasan Khalifeh, Axel Jantsch, Rustam Nabiev |
A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: ECG prototype architectural design space exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 13(2), pp. 31:1-31:21, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
hardware space exploration, embedded system design, Multiprocessor system-on-chip, real time analysis, electrocardiogram algorithms |
29 | Akash Kumar 0001, Shakith Fernando, Yajun Ha, Bart Mesman, Henk Corporaal |
Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 13(3), pp. 40:1-40:27, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multi-application, multiple use-cases, synchronous data-flow graphs, FPGA, multiprocessor systems, multimedia systems, design exploration |
29 | Piotr Switalski, Franciszek Seredynski |
Generalized Extremal Optimization for Solving Multiprocessor Task Scheduling Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SEAL ![In: Simulated Evolution and Learning, 7th International Conference, SEAL 2008, Melbourne, Australia, December 7-10, 2008. Proceedings, pp. 161-169, 2008, Springer, 978-3-540-89693-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multiprocessor task scheduling problem, Generalized Extremal Optimization, GEO, genetic algorithm |
29 | Simon Schliecker, Jonas Rox, Matthias Ivers, Rolf Ernst |
Providing accurate event models for the analysis of heterogeneous multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 185-190, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
compositional performance analysis, real-time, multiprocessor |
29 | Christof Pitter |
Time-predictable memory arbitration for a Java chip-multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
JTRES ![In: Proceedings of the 6th International Workshop on Java Technologies for Real-time and Embedded Systems, JTRES 2008, 24-26 September 2008, Santa Clara, California, USA, pp. 115-122, 2008, ACM, 978-1-60558-337-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Java, chip-multiprocessor, shared memory, worst-case execution time |
29 | Po-Chun Chang, I-Wei Wu, Jean Jyh-Jiun Shann, Chung-Ping Chung |
ETAHM: an energy-aware task allocation algorithm for heterogeneous multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 776-779, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
DVS multiprocessor system, task scheduling |
29 | Dipankar Das 0002, P. P. Chakrabarti 0001, Rajeev Kumar 0004 |
Functional verification of task partitioning for multiprocessor embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 12(4), pp. 44, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Containment checking, state space reduction, UML activity diagrams, multiprocessor embedded systems |
29 | Ahmed Amine Jerraya, Olivier Franza, Markus Levy, Masao Nakaya, Pierre G. Paulin, Ulrich Ramacher, Deepu Talla, Wayne H. Wolf |
Roundtable: Envisioning the Future for Multiprocessor SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 24(2), pp. 174-183, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
multiprocessor, SoC, multicore, MPSoC, CPU, chip |
29 | Ismail Assayad, Sergio Yovine |
Modelling and Exploration Environment for Application Specific Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HASE ![In: Tenth IEEE International Symposium on High Assurance Systems Engineering (HASE 2007), November 14-16, 2007, Dallas, Texas, USA, pp. 433-434, 2007, IEEE Computer Society, 0-7695-3043-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Software/Hardware Analysis, Architecture Exploration, Multiprocessor Embedded Systems |
29 | Philip Machanick |
Design principles for a virtual multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAICSIT ![In: Proceedings of the 2007 Annual Conference of the South African Institute of Computer Scientists and Information Technologists on IT Research in Developing Countries, SAICSIT 2007, Port Elizabeth, South Africa, October 2-3, 2007, pp. 76-82, 2007, ACM, 978-1-59593-775-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
chip multiprocessor, instruction-level parallelism |
29 | Anna Swiecicka, Franciszek Seredynski, Albert Y. Zomaya |
Multiprocessor Scheduling and Rescheduling with Use of Cellular Automata and Artificial Immune System Support. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 17(3), pp. 253-262, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
genetic algorithm, cellular automata, artificial immune system, Multiprocessor scheduling |
29 | Dong-Ik Ko, Shuvra S. Bhattacharyya |
The pipeline decomposition tree: : an analysis tool for multiprocessor implementation of image processing applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 52-57, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
design space exploration, multiprocessor scheduling, system-level models |
29 | Bogdan Caprita, Jason Nieh, Clifford Stein 0001 |
Grouped distributed queues: distributed queue, proportional share multiprocessor scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PODC ![In: Proceedings of the Twenty-Fifth Annual ACM Symposium on Principles of Distributed Computing, PODC 2006, Denver, CO, USA, July 23-26, 2006, pp. 72-81, 2006, ACM, 1-59593-384-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
scheduling, quality of service, resource management, multiprocessor scheduling, fair queuing, proportional sharing |
29 | Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil D. Dutt |
Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 49-52, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
customized memory hierarchy, multiprocessor data reuse analysis, scratch pad memory management |
29 | Hiroaki Inoue, Akihisa Ikeno, Masaki Kondo, Junji Sakai, Masato Edahiro |
FIDES: an advanced chip multiprocessor platform for secure next generation mobile terminals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2005, Jersey City, NJ, USA, September 19-21, 2005, pp. 178-183, 2005, ACM, 1-59593-161-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
secure mobile terminal, chip multiprocessor, linux |
29 | Baback A. Izadi, Füsun Özgüner |
An Augmented k-ary Tree Multiprocessor with Real-Time Fault-Tolerant Capability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 27(1), pp. 5-17, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
k-ary tree, augmented multiprocessor, wave switching, fault tolerance, real time, reconfiguration |
29 | Sang-Il Han, Amer Baghdadi, Marius Bonaciu, Soo-Ik Chae, Ahmed Amine Jerraya |
An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 250-255, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
data transfer architecture, memory server, message passing, network on chip, network interface, multiprocessor SoC |
29 | Alessio Bechini, Pierfrancesco Foglia, Cosimo Antonio Prete |
Fine-grain design space exploration for a cartographic SoC multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGARCH Comput. Archit. News ![In: SIGARCH Comput. Archit. News 31(1), pp. 85-92, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
SoC Multiprocessors, performance evaluation, embedded systems, trace-driven simulation, multiprocessor architecture |
29 | Abdel Krim Amoura, Evripidis Bampis, Claire Kenyon, Yannis Manoussakis |
Scheduling Independent Multiprocessor Tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Algorithmica ![In: Algorithmica 32(2), pp. 247-261, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Scheduling, Approximation, Multiprocessor tasks |
29 | Aleksei V. Fishkin, Guochuan Zhang |
On Maximizing the Throughput of Multiprocessor Tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MFCS ![In: Mathematical Foundations of Computer Science 2002, 27th International Symposium, MFCS 2002, Warsaw, Poland, August 26-30, 2002, Proceedings, pp. 269-279, 2002, Springer, 3-540-44040-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
approximation algorithm, complexity, throughput, Multiprocessor task |
29 | Satoshi Matsushita |
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSS ![In: Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), October 2-4, 2002, Kyoto, Japan, pp. 103-108, 2002, ACM / IEEE Computer Society, 1-58113-576-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
deign experience, CMP, chip multiprocessor, functional verification, speculative multithreading |
29 | Erwin A. de Kock |
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSS ![In: Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), October 2-4, 2002, Kyoto, Japan, pp. 68-73, 2002, ACM / IEEE Computer Society, 1-58113-576-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
multiprocessor mapping, system design method, data parallelism, code transformation, process network, task-level parallelism |
29 | Jaewon Oh, Hyokyung Bahn, Chris Wu, Kern Koh |
Pareto-based soft real-time task scheduling in multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APSEC ![In: 7th Asia-Pacific Software Engineering Conference (APSEC 2000), 5-8 December 2000, Singapore, pp. 24-, 2000, IEEE Computer Society, 0-7695-0915-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
soft real-time task scheduling, processor minimization, deadline missing time, Pareto-based genetic algorithm, genetic algorithms, scheduling, performance, real-time systems, parallel programming, parallel program, multiprocessing systems, multiprocessor systems, experimental results, minimisation, Pareto-optimal set |
29 | Jeffrey B. Rothman, Alan Jay Smith |
Multiprocessor Memory Reference Generation Using Cerberus. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: MASCOTS 1999, Proceedings of the 7th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, 24-28 October, 1999, College Park, Maryland, USA, pp. 278-287, 1999, IEEE Computer Society, 0-7695-0381-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Multiprocessor Memory References, Execution Driven Simulation, Program Tracing |
29 | Hideyuki Takada, Ken Sakamura |
A novel approach to multiprogrammed multiprocessor synchronization for real-time kernel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTSS ![In: Proceedings of the 18th IEEE Real-Time Systems Symposium (RTSS '97), December 3-5, 1997, San Francisco, CA, USA, pp. 134-143, 1997, IEEE Computer Society, 0-8186-8268-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
multiprogrammed multiprocessor synchronization, inopportune preemption, preemption-safe locking, preemption cost, wait-free operations, complex data structures, SPEPP, Spinning Processor Executes for Preempted Processors, performance measurements, multiprogramming, wait-free synchronization, real-time kernels |
29 | Jan Jonsson, Kang G. Shin |
A Parametrized Branch-and-Bound Strategy for Scheduling Precedence-Constrained Tasks on a Multiprocessor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 1997 International Conference on Parallel Processing (ICPP '97), August 11-15, 1997, Bloomington, IL, USA, Proceedings, pp. 158-165, 1997, IEEE Computer Society, 0-8186-8108-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
real-time scheduling precedence-constrained tasks, branch-and-bound strategy, multiprocessor systems, hard real-time systems |
29 | Debashis Basak, Dhabaleswar K. Panda 0001 |
Designing Clustered Multiprocessor Systems under Packaging and Technological Advancements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 7(9), pp. 962-978, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
k-ary n-cube interconnection, packaging constraints, interconnection networks, parallel architectures, Multiprocessor systems, clustered architectures, hierarchical organization, scalable systems |
29 | Shuvra S. Bhattacharyya, Sundararajan Sriram, Edward A. Lee |
Minimizing Synchronization Overhead in Statically Scheduled Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: The International Conference on Application Specific Array Processors (ASAP'95), July 24-26, 1995, Strasbourg, France, pp. 298-309, 1995, IEEE Computer Society, 0-8186-7109-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
multiprocessor implementation, synchronization, dataflow, static scheduling, iterative computation |
29 | Sylvie Norre |
Static Allocation of Tasks on Multiprocessor Architectures with Interprocessor Communication Delays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARLE ![In: PARLE '93, Parallel Architectures and Languages Europe, 5th International PARLE Conference, Munich, Germany, June 14-17, 1993, Proceedings, pp. 488-499, 1993, Springer, 3-540-56891-3. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
Deterministic scheduling, Task allocation on multiprocessor architectures, Stochastic scheduling |
29 | Roger D. Hersch, B. Tonelli, Bernard Krummenacher |
A Multiprocessor Multiwindow Visualization Subsystem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CONPAR ![In: Parallel Processing: CONPAR 92 - VAPP V, Second Joint International Conference on Vector and Parallel Processing, Lyon, France, September 1-4, 1992, Proceedings, pp. 103-108, 1992, Springer, 3-540-55895-0. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
multiprocessor window display, colour image visualization, high-speed browsing |
29 | Dipak Ghosal, Giuseppe Serazzi, Satish K. Tripathi |
The Processor Working Set and Its Use in Scheduling Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 17(5), pp. 443-453, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
processor working set, PWS, parallel program behavior, transputer-based multiprocessor machine, processor allocation strategies, static allocation policy, scheduling, scheduling, multiprocessing systems, transputers |
29 | Emilio Luque, Ana Ripoll, Porfidio Hernández, Tomàs Margalef |
Impact of task duplication on static-scheduling performance in multiprocessor systems with variable execution-time tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 4th international conference on Supercomputing, ICS 1990, Amsterdam, The Netherlands, June 11-15, 1990, pp. 439-446, 1990, ACM, 0-89791-369-8. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
multiprocessor systems, heuristic algorithms, list scheduling, task duplication, static scheduling |
29 | Michael L. Dertouzos, Aloysius K. Mok |
Multiprocessor On-Line Scheduling of Hard-Real-Time Tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 15(12), pp. 1497-1506, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
hard-real-time task scheduling, scheduling game representation, a priori knowledge, mutual exclusion constraints, scheduling, real-time systems, multiprocessing systems, multiprogramming, optimal scheduling, multiprocessor environment |
29 | Patrick Valduriez |
Semi-Join Algorithms for Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMOD Conference ![In: Proceedings of the 1982 ACM SIGMOD International Conference on Management of Data, Orlando, Florida, USA, June 2-4, 1982., pp. 225-233, 1982, ACM Press, 978-0-89791-073-6. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP DOI BibTeX RDF |
semi-join, performance evaluation, filtering, multiprocessor system, relational algebra, join, database machine |
29 | Per Brinch Hansen |
Multiprocessor Architectures For Concurrent Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Annual Conference (1) ![In: Proceedings 1978 ACM Annual Conference, Washington, DC, USA, December 4-6, 1978, Volume I, pp. 317-323, 1978, ACM, 978-0-89791-000-2. The full citation details ...](Pics/full.jpeg) |
1978 |
DBLP DOI BibTeX RDF |
Hierarchical stores, Language-directed computer design, Monitors, Processes, Concurrent programming, Real-time applications, Multiprocessor architecture |
28 | Jae-Kwon Suh, Heok-Joung Kwon, Chung-Sei Rhee |
An parallel diagnosis method for an optimal fault-tolerant network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 11-13 December 1997, Seoul, Korea, Proceedings, pp. 750-755, 1997, IEEE Computer Society, 0-8186-8227-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
parallel diagnosis method, optimal fault-tolerant network, multiprocessor network architecture, adaptive diagnosis approach, binary cube, hypercube, multiprocessor interconnection networks, diagnosable system |
28 | Tamás Bartha |
Effective Approximate Fault Diagnosis of Systems with Inhomogeneous Test Invalidation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 22rd EUROMICRO Conference '96, Beyond 2000: Hardware and Software Design Strategies, September 2-5, 1996, Prague, Czech Republic, pp. 379-, 1996, IEEE Computer Society, 0-8186-7487-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
system-level fault diagnosis, Parsytec GCel, local information diagnosis, diagnostic algorithm, generalized test invalidation, computational complexity, fault diagnosis, multiprocessor system, multiprocessor architectures, massively parallel computers |
28 | Rainer Hauser, Reinhard Männer, Mikhail Makhaniok |
NERV: a parallel processor for standard genetic algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '95, The 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California, USA, pp. 782-789, 1995, IEEE Computer Society, 0-8186-7074-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
standard genetic algorithms, MIMD multiprocessor system, NERV hardware, NERV multiprocessor, genetic algorithms, parallel algorithms, parallel architectures, parallel machines, GA, parallel processor, parallel genetic algorithms |
28 | Toshinori Yamada, Koji Yamamoto, Shuichi Ueno |
Fault-tolerant graphs for hypercubes and tori. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (2) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 499-505, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
fault-tolerant graphs, fault-tolerant multiprocessor interconnection networks, graph theory, fault tolerant computing, hypercubes, multiprocessor interconnection networks, hypercube networks, subgraph, tori |
28 | Mayez A. Al-Mouhamed, Adel Al-Maasarani |
Performance Evaluation of Scheduling Precedence-Constained Computations on Message-Passing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(12), pp. 1317-1321, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
scheduling precedence-constrained computations, multiprocessor topology, global priority-based schedulingheuristics, generalized list scheduling, backward scheduling, graph-driven scheduling, scheduling, performance evaluation, performance evaluation, computational complexity, multiprocessor, message passing, network topology, time complexity, message-passing systems |
28 | C. Selvakumar, C. Siva Ram Murthy |
Scheduling Precedence Constrained Task Graphs with Non-Negligible Intertask Communication onto Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(3), pp. 328-336, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
precedence constrained task graphs, scheduling, parallel algorithms, computational complexity, parallel program, graph theory, multiprocessors, multiprocessing systems, heuristic algorithm, heuristic programming, list scheduling, communication channels, multiprocessing programs, completion time, multiprocessor interconnectionnetworks, intertask communication, multiprocessor scheduling problem |
28 | Chih-Ping Chu, Doris L. Carver |
Parallelizing Subroutines in Sequential Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Softw. ![In: IEEE Softw. 11(1), pp. 77-85, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
IBM computers, subroutine parallelization, execution mode, code restructuring, recursive process, IBM 3090 multiprocessor, common memory, interprocessor synchronization, special memory locations, Alliant FX/8, structured Fortran program, parallel algorithms, parallel programming, interprocessor communication, subroutines, structured programming, Cray X-MP, local memory, sequential programs, shared-memory multiprocessor system |
28 | Zbigniew M. Wójcik, Barbara E. Wójcik |
Rough Grammar For Efficient and Fault-Tolerant Computing on a Distributed System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 17(7), pp. 652-668, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
global load balancing, dynamic task scheduling, multiprocessor machine, rough grammar, rough grammar production rules, pipeline fashion, statically scheduled multiprocessor, decentralized methodology, scheduling, fault tolerance, parallel processing, distributed computation, fault-tolerant computing, fault tolerant computing, concurrent program, grammars, pipeline processing |
28 | Steven L. Scott, Gurindar S. Sohi |
The Use of Feedback in Multiprocessors and Its Application to Tree Saturation Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 1(4), pp. 385-398, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
tree saturation control, feedback control schemes, hot-spot accesses, feedback, feedback, multiprocessor interconnection networks, multiprocessing systems, multiprocessor systems, multistage interconnection networks |
28 | A. L. Narasimha Reddy, Prithviraj Banerjee |
Design, Analysis, and Simulation of I/O Architectures for Hypercube. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 1(2), pp. 140-151, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
I/O architectures, I/O access, disk organizations, scientific workload, performance evaluation, parallelism, data structures, parallel architectures, multiprocessor interconnection networks, multiprocessing systems, memory architecture, matrices, hypercube multiprocessors, multiprocessor network |
28 | Jean-Luc Gaudiot, Andrew Sohn |
Data-Driven Parallel Production Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 16(3), pp. 281-293, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
parallel production systems, data-flow principles, high programmability, data-driven principles, RETE match algorithm, actor set, program graph design, tagged data-flow computer, deterministic simulation, artificial intelligence production systems, parallel programming, parallel architectures, expert systems, symbolic computations, symbol manipulation, multiprocessor architecture, numerical computations, multiprocessor environment, data-driven architectures |
28 | Michael Gschwind |
The Cell Broadband Engine: Exploiting Multiple Levels of Parallelism in a Chip Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 35(3), pp. 233-262, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
compute-transfer parallelism, multi-level application parallelism, Chip multiprocessor, Cell Broadband Engine, heterogeneous chip multiprocessor |
28 | Theodore P. Baker |
An Analysis of EDF Schedulability on a Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 16(8), pp. 760-768, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
real-time scheduling, Multiprocessor systems, utilization, multiprocessor scheduling, earliest deadline first, feasibility, deadline scheduling |
28 | Brian A. Malloy, Errol L. Lloyd, Mary Lou Soffa |
Scheduling DAG's for Asynchronous Multiprocessor Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(5), pp. 498-508, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
asynchronous multiprocessor execution, sequential instructionstream, execution costs, datadependencies, Data General shared memory multiprocessor system, scheduling, scheduling, parallel programming, parallelism, concurrency, shared memory systems, DAG, communication costs, instruction sets, multiprocessing programs, fine grained parallelism |
28 | Chienhua Chen, Dharma P. Agrawal, J. Richard Burke |
dBCube: A New Class of Hierarchical Multiprocessor Interconnection Networks with Area Efficient Layout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 4(12), pp. 1332-1344, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
dBCube, hierarchical multiprocessor interconnection networks, area efficient layout, node connectivity, compound graph, necklace, performance evaluation, VLSI, graphs, hypercube, multiprocessor interconnection networks, hierarchical networks, wafer scale integration, de Bruijn graph, hypercube topology, Communication locality |
28 | Hong Jiang, Kenneth C. Smith |
PPMB: A Partial-Multiple-Bus Multiprocessor Architecture with Improved Cost-Effectiveness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(3), pp. 361-366, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
PPMB, partial-multiple-bus multiprocessor architecture, processor-oriented partial-multiple-bus, memory-oriented partial-multiple-bus, system bandwidth, simulation, performance evaluation, design, performance analysis, interconnection networks, computer architecture, multiprocessor interconnection networks, cost-effectiveness, arbitration |
28 | Ashwani Kumar Ramani, Pradip K. Chande, Pramod C. Sharma |
A General Model for Performance Investigations of Priority Based Multiprocessor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(6), pp. 747-754, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
discrete time semi-Markov model, task priorities, crossbar interconnection network, performance evaluation, load balancing, multiprocessor interconnection networks, Markov processes, performance measures, multiprocessing systems, multiprocessor system, task scheduling, performance optimization, system performance |
28 | Peter F. Corbett |
Rotator Graphs: An Efficient Topology for Point-to-Point Multiprocessor Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 3(5), pp. 622-626, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
point-to-point multiprocessor networks, directed permutation graphs, Faber-Moore graphs, rotator graphs, one-step fault diagnosable, fault tolerant, topology, multiprocessor interconnection networks, directed graphs, Hamiltonian circuit, optimal routing algorithm |
28 | Suresh Chalasani, Anujan Varma |
Evaluation of Two Traffic Distribution Strategies for a Dual-Network Multiprocessor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 3(3), pp. 375-384, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
traffic distribution strategies, dual-network multiprocessor system, multiprocessing systems, shared-memory system, multistage networks, multiprocessor interconnectionnetworks |
28 | Kyungsook Y. Lee, Hyunsoo Yoon |
Indirect Star-Type Networks for Large Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 40(11), pp. 1277-1282, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
star network II, large multiprocessor systems, indirect star-type networks, star networks I, star-delta network, star-delta network, unfolding scheme, recursive property, destination tag routing scheme, indirect cube-type networks, performance evaluation, performance, multiprocessor interconnection networks, n-cube |
28 | Jacques Briat, M. Favre, Cláudio F. R. Geyer, Jacques Chassin de Kergommeaux |
Schheduling of OR-parallel Prolog on a Scalable, Reconfigurable, Distributed-Memory Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARLE (2) ![In: PARLE '91: Parallel Architectures and Languages Europe, Volume II: Parallel Languages, Eindhoven, The Netherlands, June 10-13, 1991, Proceedings, pp. 385-402, 1991, Springer, 3-540-54152-7. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
OPERA, OR-parallel Prolog, reconfigurable multiprocessor, distributed-memory, WAM, Supernode, scalable multiprocessor |
28 | Prithviraj Banerjee, Joseph T. Rahmeh, Craig B. Stunkel, V. S. S. Nair, Kaushik Roy 0001, Vijay Balasubramanian, Jacob A. Abraham |
Algorithm-Based Fault Tolerance on a Hypercube Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 39(9), pp. 1132-1145, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
Intel iPSC hypercube, fault tolerance, parallel architectures, fault tolerant computing, fast Fourier transform, multiprocessing systems, error detection, matrix multiplication, Gaussian elimination, multiprocessor architecture, hypercube multiprocessor, faulty processors |
28 | Hyunsoo Yoon, Kyungsook Y. Lee, Ming T. Liu |
Performance Analysis of Multibuffered Packet-Switching Networks in Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 39(3), pp. 319-327, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
multibuffered packet-switching networks, single-buffered delta networks, performance evaluation, interconnection networks, virtual machines, multiprocessor interconnection networks, packet switching, multiprocessor systems, simulation results, state transition diagram |
28 | Woei Lin, Chuan-lin Wu |
A Fault-Tolerant Mapping Scheme for a Configurable Multiprocessor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 38(2), pp. 227-237, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
fault-tolerant mapping scheme, configurable multiprocessor system, interprocessor connections, linear address space, parallel computation, fault tolerant computing, multiprocessor interconnection networks, configurability, multistage interconnection networks |
28 | Gita Alaghband, Harry F. Jordan |
Sparse Gaussian Elimination with Controlled Fill-in on a Shared Memory Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 38(11), pp. 1539-1557, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
controlled fill-in, ordered compatible set, Markowitz number, limited binary tree search, elimination set, parallel pivoting, stepwise algorithm, application matrices, HEP multiprocessor, parallel algorithms, computational complexity, parallel processing, shared memory multiprocessor, trees (mathematics), heuristic algorithm, matrix algebra, sparse matrix, linear time, sparse Gaussian elimination |
28 | Maheswara R. Samatham, Dhiraj K. Pradhan |
The De Bruijn Multiprocessor Network: A Versatile Parallel Processing and Sorting Network for VLSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 38(4), pp. 567-581, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
de Bruijn multiprocessor network, versatile parallel processing, N-node linear array, N-node ring, one-step shuffle-exchange network, tight lower bound, parallel processing, VLSI, VLSI, fault tolerant computing, multiprocessor interconnection networks, binary trees, sorting network, layout area |
28 | Giovanni Chiola, Marco Ajmone Marsan, Gianfranco Balbo |
Product-Form Solution Techniques for the Performance Analysis of Multiple-Bus Multiprocessor Systems with Nonuniform Memory References. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(5), pp. 532-540, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
local balance property, multiple-bus multiprocessor systems, nonuniform memory references, steady-state probability distribution, queuing models with passive resources, recursive solution, processor access rates, memory selection probabilities, first-come-first-served bus scheduling policy, scheduling, performance evaluation, performance analysis, multiprocessor interconnection networks, queueing theory, numerical analysis, product-form solution, exact computation |
25 | Hristo Nikolov, Todor P. Stefanov, Ed F. Deprettere |
Efficient Automated Synthesis, Programing, and Implementation of Multi-Processor Platforms on FPGA Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-6, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Philippas Tsigas, Yi Zhang 0004 |
Evaluating the performance of non-blocking synchronization on shared-memory multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS/Performance ![In: Proceedings of the Joint International Conference on Measurements and Modeling of Computer Systems, SIGMETRICS/Performance 2001, June 16-20, 2001, Cambridge, MA, USA, pp. 320-321, 2001, ACM, 1-58113-334-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | John L. Gustafson |
Reevaluating Amdahl's Law. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Commun. ACM ![In: Commun. ACM 31(5), pp. 532-533, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
25 | C. Mani Krishna 0001, Kang G. Shin |
Queueing analysis of a canonical model of real-time multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the International Conference on Measurements and Modeling of Computer Systems, SIGMETRICS 1983, August 29-31, 1983, Minneapolis, Minnesota, USA, pp. 175-189, 1983, ACM, 0-89791-112-1. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
|
25 | Piotr Switalski, Franciszek Seredynski |
Solving multiprocessor scheduling problem with GEO metaheuristic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009, pp. 1-8, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
25 | Ya-Shu Chen, Li-Pin Chang, Tei-Wei Kuo |
Multiprocessor frequency locking for real-time task synchronization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2008 ACM Symposium on Applied Computing (SAC), Fortaleza, Ceara, Brazil, March 16-20, 2008, pp. 289-293, 2008, ACM, 978-1-59593-753-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
real-time synchronization, resource management protocol, energy consumption |
25 | Trevor Meyerowitz, Alberto L. Sangiovanni-Vincentelli, Mirko Sauermann, Dominik Langen |
Source-Level Timing Annotation and Simulation for a Heterogeneous Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 276-279, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Christof Pitter, Martin Schoeberl |
Performance evaluation of a java chip-multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIES ![In: IEEE Third International Symposium on Industrial Embedded Systems, SIES 2008, Montpellier / La Grande Motte, France, June 11-13, 2008, pp. 34-42, 2008, IEEE, 978-1-4244-1994-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Jeffery A. Brown, Dean M. Tullsen |
The shared-thread multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 22nd Annual International Conference on Supercomputing, ICS 2008, Island of Kos, Greece, June 7-12, 2008, pp. 73-82, 2008, ACM, 978-1-60558-158-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
chip multiprocessors, simultaneous multithreading |
25 | Alexandru Andrei, Petru Eles, Zebo Peng, Jakob Rosen |
Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India, pp. 103-110, 2008, IEEE Computer Society, 0-7695-3083-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Jörg-Christian Niemann, Christian Liß, Mario Porrmann, Ulrich Rückert 0001 |
A Multiprocessor Cache for Massively Parallel SoC Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARCS ![In: Architecture of Computing Systems - ARCS 2007, 20th International Conference, Zurich, Switzerland, March 12-15, 2007, Proceedings, pp. 83-97, 2007, Springer, 978-3-540-71267-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Jian-Jia Chen, Chuan-Yue Yang, Tei-Wei Kuo, Chi-Sheng Shih 0001 |
Energy-Efficient Real-Time Task Scheduling in Multiprocessor DVS Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 342-349, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Jörg Dümmler, Raphael Kunis, Gudula Rünger |
A Scheduling Toolkit for Multiprocessor-Task Programming with Dependencies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2007, Parallel Processing, 13th International Euro-Par Conference, Rennes, France, August 28-31, 2007, Proceedings, pp. 23-32, 2007, Springer, 978-3-540-74465-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Vincent W. Freeh, Tyler K. Bletsch, Freeman L. Rawson III |
Scaling and Packing on a Chip Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-8, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Krutartha Patel, Sridevan Parameswaran, Seng Lin Shee |
Ensuring secure program execution in multiprocessor embedded systems: a case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 57-62, 2007, ACM, 978-1-59593-824-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
embedded system processors, tensilica, security, multiprocessors, code injection attacks |
25 | Mrinmoy Ghosh, Hsien-Hsin S. Lee |
Virtual Exclusion: An architectural approach to reducing leakage energy in caches for multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 13th International Conference on Parallel and Distributed Systems, ICPADS 2007, Hsinchu, Taiwan, December 5-7, 2007, pp. 1-8, 2007, IEEE Computer Society, 978-1-4244-1889-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Jakob Rosen, Alexandru Andrei, Petru Eles, Zebo Peng |
Bus Access Optimization for Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTSS ![In: Proceedings of the 28th IEEE Real-Time Systems Symposium (RTSS 2007), 3-6 December 2007, Tucson, Arizona, USA, pp. 49-60, 2007, IEEE Computer Society, 0-7695-3062-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Muhammet Fikret Ercan, Yu-Fai Fung |
Performance of Particle Swarm Optimization in Scheduling Hybrid Flow-Shops with Multiprocessor Tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSA (3) ![In: Computational Science and Its Applications - ICCSA 2007, International Conference, Kuala Lumpur, Malaysia, August 26-29, 2007. Proceedings. Part III, pp. 309-318, 2007, Springer, 978-3-540-74482-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Youfeng Wu, Maurício Breternitz Jr., Victor Ying |
Impacts of Multiprocessor Configurations on Workloads in Bioinformatics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBAC-PAD ![In: 19th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2007), 24-27 October 2007, Gramado, RS, Brazil, pp. 105-113, 2007, IEEE Computer Society, 0-7695-3014-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Arata Shinozaki, Masatoshi Shima 0002, Minyi Guo, Mitsunori Kubo |
Multiprocessor Simulator System Based on Multi-way Cluster Using Double-buffered Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA ![In: 21st International Conference on Advanced Information Networking and Applications (AINA 2007), May 21-23, 2007, Niagara Falls, Canada, pp. 893-900, 2007, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Seng Lin Shee, Sri Parameswaran |
Design Methodology for Pipelined Heterogeneous Multiprocessor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 811-816, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha |
Application-specific heterogeneous multiprocessor synthesis using extensible processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(9), pp. 1589-1602, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Alexey N. Salnikov |
PARUS: A Parallel Programming Framework for Heterogeneous Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PVM/MPI ![In: Recent Advances in Parallel Virtual Machine and Message Passing Interface, 13th European PVM/MPI User's Group Meeting, Bonn, Germany, September 17-20, 2006, Proceedings, pp. 408-409, 2006, Springer, 3-540-39110-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Hong Jin, Henry (Hui) Wang, Hongan Wang, Guozhong Dai |
An ACO-Based Approach for Task Assignment and Scheduling of Multiprocessor Control Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TAMC ![In: Theory and Applications of Models of Computation, Third International Conference, TAMC 2006, Beijing, China, May 15-20, 2006, Proceedings, pp. 138-147, 2006, Springer, 3-540-34021-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Resit Sendag, Ayse Yilmazer, Joshua J. Yi, Augustus K. Uht |
Quantifying and reducing the effects of wrong-path memory references in cache-coherent multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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25 | Jing Chen, Jian-Horng Liu |
Developing Embedded Kernel for System-On-a-Chip Platform of Heterogeneous Multiprocessor Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 12th IEEE Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2006), 16-18 August 2006, Sydney, Australia, pp. 246-250, 2006, IEEE Computer Society, 0-7695-2676-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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25 | Arata Shinozaki, Masatoshi Shima 0002, Minyi Guo, Mitsunori Kubo |
A High Performance Simulator System for a Multiprocessor System Based on a Multi-way Cluster. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings, pp. 231-243, 2006, Springer, 3-540-40056-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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25 | Kyriakos Stavrou, Pedro Trancoso, Paraskevas Evripidou |
Hardware Budget and Runtime System for Data-Driven Multithreaded Chip Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings, pp. 244-259, 2006, Springer, 3-540-40056-7. The full citation details ...](Pics/full.jpeg) |
2006 |
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