|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 3849 occurrences of 1991 keywords
|
|
|
Results
Found 9295 publication records. Showing 9295 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
31 | Ivan Stoianov, Lama Nachman, Samuel Madden 0001, Timur Tokmouline |
PIPENETa wireless sensor network for pipeline monitoring. |
IPSN |
2007 |
DBLP DOI BibTeX RDF |
Intel mote platforms, pipeline monitoring, water supply systems, wireless sensor networks |
31 | Anne Benoit, Yves Robert |
Mapping Pipeline Skeletons onto Heterogeneous Platforms. |
International Conference on Computational Science (1) |
2007 |
DBLP DOI BibTeX RDF |
Pipeline skeleton, scheduling algorithms, throughput optimization, heterogeneous platforms, complexity results |
31 | Junhao Zheng, David Wu, Don Xie, Wen Gao 0001 |
A Novel Pipeline Design for H.264 CABAC Decoding. |
PCM |
2007 |
DBLP DOI BibTeX RDF |
VLSI, pipeline, H.264/AVC, CABAC |
31 | Yang Xiao 0001, Hui Chen 0001, Mohsen Guizani |
Performance Evaluation of Pipeline Paging under Paging Delay Constraint for Wireless Systems. |
IEEE Trans. Mob. Comput. |
2006 |
DBLP DOI BibTeX RDF |
Parallel, pipeline, paging, wireless systems |
31 | Man Wang, Zhihui Du, Yinong Chen, Zhili Cheng |
A SOA Based Pipeline System to Deal with Astronomy Telescope Data. |
SOSE |
2006 |
DBLP DOI BibTeX RDF |
Pipeline Data Processing, Service-Oriented Architecture, Grid Middleware |
31 | Andrew Stephen McGough, Jeremy Cohen 0002, John Darlington, Eleftheria Katsiri, William Lee 0003, Sofia Panagiotidi, Yash Patel |
An End-to-end Workflow Pipeline for Large-scale Grid Computing. |
J. Grid Comput. |
2005 |
DBLP DOI BibTeX RDF |
brokering and planning, job launching, workflow pipeline, scheduling, Grid, workflow |
31 | Shadrokh Samavi, Shahram Shirani, Nader Karimi, M. Jamal Deen |
A Pipeline Architecture for Processing of DNA Microarrays Images. |
J. VLSI Signal Process. |
2004 |
DBLP DOI BibTeX RDF |
image processing, microarray, pipeline processing, DNA, morphological operations |
31 | Hajime Shimada, Hideki Ando, Toshio Shimada |
Pipeline stage unification: a low-energy consumption technique for future mobile processors. |
ISLPED |
2003 |
DBLP DOI BibTeX RDF |
future process technology, pipeline stage, dynamic voltage scaling, low-power consumption |
31 | Victor Varshavsky, Vyacheslav Marakhovsky |
GALA Approach in Design of Asynchronous Control for Counterflow Pipeline Processor. |
DELTA |
2002 |
DBLP DOI BibTeX RDF |
GALA - Globally Asynchronous Locally Arbitrary, Counterflow Pipeline Processor, Synchronous Prototype, Arbitration, Asynchronous Design |
31 | Prabhat Mishra 0001, Hiroyuki Tomiyama, Ashok Halambi, Peter Grun, Nikil D. Dutt, Alexandru Nicolau |
Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language. |
ASP-DAC/VLSI Design |
2002 |
DBLP DOI BibTeX RDF |
Pipeline Verification, Architecture Description Language |
31 | Jakob Engblom, Andreas Ermedahl |
Pipeline Timing Analysis Using a Trace-Driven Simulator. |
RTCSA |
1999 |
DBLP DOI BibTeX RDF |
pipeline analysis, embedded systems, WCET, hard real-time |
31 | Omer Boehm, Gadi Haber, Helena Kosachevsky |
Code alignment for architectures with pipeline group dispatching. |
SYSTOR |
2010 |
DBLP DOI BibTeX RDF |
|
31 | Brian P. Bailey, Eric Horvitz |
What's your idea?: a case study of a grassroots innovation pipeline within a large software company. |
CHI |
2010 |
DBLP DOI BibTeX RDF |
idea management, creativity, innovation, organizations |
31 | Ke Xu 0014, Chiu-sing Choy |
A Five-Stage Pipeline, 204 Cycles/MB, Single-Port SRAM-Based Deblocking Filter for H.264/AVC. |
IEEE Trans. Circuits Syst. Video Technol. |
2008 |
DBLP DOI BibTeX RDF |
|
31 | William Thies, Vikram Chandrasekhar, Saman P. Amarasinghe |
A Practical Approach to Exploiting Coarse-Grained Pipeline Parallelism in C Programs. |
MICRO |
2007 |
DBLP DOI BibTeX RDF |
|
31 | Lei Wang 0011, Zhiying Wang 0003, Kui Dai |
An Approximate Method for Performance Evaluation of Asynchronous Pipeline Rings. |
CIT |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Mario Baldi, Juan Carlos De Martin, Enrico Masala, Andrea Vesco |
Distortion-aware video communication with pipeline forwarding. |
ACM Multimedia |
2006 |
DBLP DOI BibTeX RDF |
quality of service, video streaming, multimedia networking |
31 | Marc Tremblay |
A modern high-performance processor pipeline. |
ICS |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Hemangee K. Kapoor |
Formal Modelling and Verification of an Asynchronous DLX Pipeline. |
SEFM |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Jirada Kuntraruk, William M. Pottenger, Andrew M. Ross |
Application Resource Requirement Estimation in a Parallel-Pipeline Model of Execution. |
IEEE Trans. Parallel Distributed Syst. |
2005 |
DBLP DOI BibTeX RDF |
measurement and modeling of multiple-processor systems, Performance analysis, distributed application |
31 | Miguel Lino Silva, João Canas Ferreira |
Using a Tightly-Coupled Pipeline in Dynamically Reconfigurable Platform FPGAs. |
DSD |
2005 |
DBLP DOI BibTeX RDF |
|
31 | Manesh J. Shah, Sergei Passovets, Dongsup Kim, Kyle Ellrott, Li Wang 0008, Inna Vokler, Philip F. LoCascio, Dong Xu 0002, Ying Xu 0001 |
A Computational Pipeline for Protein Structure Prediction and Analysis at Genome Scale. |
BIBE |
2003 |
DBLP DOI BibTeX RDF |
|
31 | Aristides Efthymiou, Jim D. Garside |
Adaptive Pipeline Structures fo Speculation Control. |
ASYNC |
2003 |
DBLP DOI BibTeX RDF |
|
31 | Tsutomu Maruyama, Tsutomu Hoshino |
A C to HDL Compiler for Pipeline Processing on FPGAs. |
FCCM |
2000 |
DBLP DOI BibTeX RDF |
|
31 | André Seznec, Yvon Jégou |
Towards a large number of pipeline processors in a tightly coupled multiprocessor using no cache. |
ICS |
1988 |
DBLP DOI BibTeX RDF |
|
31 | C. V. Ramamoorthy, Hon Fung Li |
Efficiency in generalized pipeline networks. |
AFIPS National Computer Conference |
1974 |
DBLP DOI BibTeX RDF |
|
29 | Eric Sprangle, Doug Carmean |
Increasing Processor Performance by Implementing Deeper Pipelines. |
ISCA |
2002 |
DBLP DOI BibTeX RDF |
Pipeline depth, Pipeline |
29 | Iain Bate, Guillem Bernat, G. Murphy, Peter P. Puschner |
Low-level analysis of a portable Java byte code WCET analysis framework. |
RTCSA |
2000 |
DBLP DOI BibTeX RDF |
low-level analysis, portable Java byte code, machine-independent program flow analysis, machine-dependent timing analysis, worst-case execution frequencies, platform-dependent information, processor pipeline, platform-independent approach, Java, timing, software performance evaluation, pipeline processing, software portability, program diagnostics, worst-case execution time analysis, program constructs |
29 | Francesco Gregoretti, F. Intini, Luciano Lavagno, Roberto Passerone, Leonardo Maria Reyneri |
Design and Implementation of the Control Structure of the PAPRICA-3 Processor. |
PDP |
1996 |
DBLP DOI BibTeX RDF |
PAPRICA-3 processor, instruction execution, linear array processor PAPRICA-9, multi path queue structure, real-time systems, image processing, embedded systems, parallel architectures, image recognition, pipeline processing, array processor, pipeline architecture, application programs, real time image processing, control structure, image processing equipment, algorithmic efficiency |
29 | Neil Garner, David M. Howard 0001, P. A. Barrett, Andrew M. Tyrrell |
A Parallel Processing Environment for Speech Signal Processing Applications. |
PDP |
1996 |
DBLP DOI BibTeX RDF |
parallel processing environment, speech signal processing applications, 1 dimensional signal processing problem, multiple inputs, multiple outputs, interconnected signal processing functions, MIMD format, user defined structure, communication based parallel processing format, serial machine, vocoders, filterbank speech analysis, T800 transputers, parallel programming, software tool, speech recognition, pipeline processing, speech processing, transputers, transputers, Occam, speech enhancement, transputer systems, pipeline parallelism |
29 | Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin |
Design tradeoffs in high speed multipliers and FIR filters. |
VLSI Design |
1996 |
DBLP DOI BibTeX RDF |
high speed multipliers, high speed FIR filters, modified Booth recoding, pipeline granularity, transistor count, activity factor reduction, guarded evaluation, gate-level pipelining, half-bit level pipelining, bit-level pipelining, delay, clocking, digital filters, FIR filters, multiplying circuits, power dissipation, design tradeoffs, pipeline arithmetic, operation speed |
29 | Sheng-Yih Guan, Avi Bleiweiss, Richard Lipes |
Parallel implementation of volume rendering on Denali graphics systems. |
IPPS |
1995 |
DBLP DOI BibTeX RDF |
computer graphic equipment, computer peripheral equipment, Denali graphics systems, 3D graphics systems, texture mapping capability, standard graphics pipeline, pipelined parallel architecture, Kubota Graphics Corporation, maximum intensity projection, iso-surface rendering, partitioning data allocation scheme, texture memory requirements, transformation and rasterization modules, frame buffer modules, parallel node, general purpose RISC processor, object parallelism, hardware ASICs, pixel memory, pixel parallelism, resource allocation, parallel architectures, volume rendering, pipeline processing, dynamic load balancing, image texture, parallel implementation, rendering (computer graphics), reduced instruction set computing, static load balancing |
29 | Jayesh Siddhiwala, Liang-Fang Chao |
Scheduling conditional data-flow graphs with resource sharing. |
Great Lakes Symposium on VLSI |
1995 |
DBLP DOI BibTeX RDF |
conditional data-flow graphs, resource sharing algorithm, pipeline scheduling algorithms, loop constructs, condition vector, dynamic resource sharing, rotation scheduling technique, parallel algorithms, data structures, data structure, resource allocation, high level synthesis, high level synthesis, processor scheduling, pipeline processing, data flow graphs, loop pipelining, conditional branches |
29 | Ronald Jones, Imants D. Svalbe |
Morphological Filtering as Template Matching. |
IEEE Trans. Pattern Anal. Mach. Intell. |
1994 |
DBLP DOI BibTeX RDF |
binary morphology, pattern recognition, image processing, mathematical morphology, pipeline processing, pipeline processing, template matching, filtering and prediction theory, table lookup, lookup table, morphological filtering |
29 | Ben-Kwei Jang, Roland T. Chin |
One-Pass Parallel Thinning: Analysis, Properties, and Quantitative Evaluation. |
IEEE Trans. Pattern Anal. Mach. Intell. |
1992 |
DBLP DOI BibTeX RDF |
one-pass parallel thinning, unit-width convergence, pipeline processing model, skeletal connectivity, parallel algorithms, image recognition, shape analysis, pipeline processing, convergence of numerical methods, noise immunity, medial axis approximation |
28 | Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason A. Blome, Scott A. Mahlke |
StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems. |
CASES |
2008 |
DBLP DOI BibTeX RDF |
reliability, architecture, pipeline, multicore |
28 | Thomas R. Puzak, Allan Hartstein, Philip G. Emma, Viji Srinivasan, Jim Mitchell |
An analysis of the effects of miss clustering on the cost of a cache miss. |
Conf. Computing Frontiers |
2007 |
DBLP DOI BibTeX RDF |
algorithm, cache, pipeline, spectrogram |
28 | Hiroaki Harai, Masayuki Murata 0001 |
High-speed buffer management for 40 Gb/s-based photonic packet switches. |
IEEE/ACM Trans. Netw. |
2006 |
DBLP DOI BibTeX RDF |
photonic packet switching, variable-length optical packet, parallel processing, buffer management, pipeline processing |
28 | Haoyu Peng, Hua Xiong, Jiaoying Shi |
Parallel-SG: research of parallel graphics rendering system on PC-Cluster. |
VRCIA |
2006 |
DBLP DOI BibTeX RDF |
dynamic rendering team, optimized parallel R-C-D pipeline, load-balancing, PC-Cluster, hybrid architecture |
28 | Zhigeng Pan, Xiaochao Wei, Jian Yang |
Geometric model reconstruction from streams of DirectX 3D game application. |
Advances in Computer Entertainment Technology |
2005 |
DBLP DOI BibTeX RDF |
DirectX 9, geometric model, reconstruction, graphics pipeline |
28 | Christine W. Chan |
Towards Ontology Construction for an Industrial Domain. |
IEEE ICCI |
2004 |
DBLP DOI BibTeX RDF |
natural gas pipeline, expert system, knowledge modeling |
28 | Chen-Han Kuo, Damon Shing-Min Liu |
A Dynamic Load-Balancing Approach for Efficient Remote Interactive Visualization. |
ITCC |
2003 |
DBLP DOI BibTeX RDF |
visualization pipeline, load-balancing, Scientific visualization, Java RMI, Visualization Toolkit |
28 | Wenyi Feng, Fred J. Meyer, Wei-Kang Huang, Fabrizio Lombardi |
On the Complexity of Sequential Testing in Configurable FPGAs. |
DFT |
1998 |
DBLP DOI BibTeX RDF |
FPGA, pipeline, PLD, sequential testing, iterative array |
28 | David A. Kearney, Neil W. Bergmann |
Performance evaluation of asynchronous logic pipelines with data dependent processing delays. |
ASYNC |
1995 |
DBLP DOI BibTeX RDF |
asynchronous logic pipelines, data dependent processing delays, logic stages, data dependent delay, two valued random variable, performance evaluation, performance evaluation, asynchronous circuits, pipeline processing, latches |
28 | Guenter Klas |
Protocol Optimization for a Packet-Switched Bus in Case of Burst Traffic by Means of GSPN. |
Application and Theory of Petri Nets |
1993 |
DBLP DOI BibTeX RDF |
Bus Pipeline, Performance Modeling, Multiprocessor Systems, GSPN |
27 | Seng Lin Shee, Andrea Erdos, Sri Parameswaran |
Architectural Exploration of Heterogeneous Multiprocessor Systems for JPEG. |
Int. J. Parallel Program. |
2008 |
DBLP DOI BibTeX RDF |
design, architecture, multiprocessor, SoC, pipelines, ASIPs, heterogeneous system |
27 | Hoon Lim, Jae Youn Choi, Young Sik Kwon, Eui-Jung Jung, Byung-Ju Yi |
SLAM in indoor pipelines with 15mm diameter. |
ICRA |
2008 |
DBLP DOI BibTeX RDF |
|
27 | Montek Singh, Steven M. Nowick |
The Design of High-Performance Dynamic Asynchronous Pipelines: High-Capacity Style. |
IEEE Trans. Very Large Scale Integr. Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
27 | Thanaa M. Ghanem, Moustafa A. Hammad, Mohamed F. Mokbel, Walid G. Aref, Ahmed K. Elmagarmid |
Incremental Evaluation of Sliding-Window Queries over Data Streams. |
IEEE Trans. Knowl. Data Eng. |
2007 |
DBLP DOI BibTeX RDF |
pipelined query execution, negative tuples, Data stream management systems |
27 | Girish Venkataramani, Seth Copen Goldstein |
Operation chaining asynchronous pipelined circuits. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
27 | Margarita Amor, Montserrat Bóo, Wolfgang Straßer, Johannes Hirche, Michael C. Doggett |
A Meshing Scheme for Efficient Hardware Implementation of Butterfly Subdivision Using Displacement Mapping. |
IEEE Computer Graphics and Applications |
2005 |
DBLP DOI BibTeX RDF |
mesh storage, graphics hardware, displacement mapping, Adaptive subdivision |
27 | Michael D. Powell, Ethan Schuchman, T. N. Vijaykumar |
Balancing Resource Utilization to Mitigate Power Density in Processor Pipelines. |
MICRO |
2005 |
DBLP DOI BibTeX RDF |
|
27 | Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay, Kaushik Roy 0001 |
A Statistical Approach to Area-Constrained Yield Enhancement for Pipelined Circuits under Parameter Variations. |
Asian Test Symposium |
2005 |
DBLP DOI BibTeX RDF |
|
27 | Tali Moreshet, R. Iris Bahar |
Effects of speculation on performance and issue queue design. |
IEEE Trans. Very Large Scale Integr. Syst. |
2004 |
DBLP DOI BibTeX RDF |
|
27 | Victor V. Zyuban, David M. Brooks, Viji Srinivasan, Michael Gschwind, Pradip Bose, Philip N. Strenski, Philip G. Emma |
Integrated Analysis of Power and Performance for Pipelined Microprocessors. |
IEEE Trans. Computers |
2004 |
DBLP DOI BibTeX RDF |
|
27 | José Manuel Colmenar, Oscar Garnica, Sonia López, José Ignacio Hidalgo, Juan Lanchares, Román Hermida |
Empirical Characterization of the Latency of Long Asynchronous Pipelines with Data-Dependent Module Delays. |
PDP |
2004 |
DBLP DOI BibTeX RDF |
|
27 | George Kola, Tevfik Kosar, Miron Livny |
Phoenix: Making Data-Intensive Grid Applications Fault-Tolerant. |
GRID |
2004 |
DBLP DOI BibTeX RDF |
|
27 | Christian Jacobi 0002 |
Formal Verification of Complex Out-of-Order Pipelines by Combining Model-Checking and Theorem-Proving. |
CAV |
2002 |
DBLP DOI BibTeX RDF |
|
27 | Asger Munk Nielsen, David W. Matula, Chung Nan Lyu, Guy Even |
An IEEE Compliant Floating-Point Adder that Conforms with the Pipelined Packet-Forwarding Paradigm. |
IEEE Trans. Computers |
2000 |
DBLP DOI BibTeX RDF |
IEEE floating-point rounding, Floating-point arithmetic, redundant number representations, floating-point addition |
27 | Gang Qu 0001, Darko Kirovski, Miodrag Potkonjak, Mani B. Srivastava |
Energy minimization of system pipelines using multiple voltages. |
ISCAS (1) |
1999 |
DBLP DOI BibTeX RDF |
|
26 | A. Folorunso Olufemi, Mohd Shahrizal Sunar, Sarudin Kari |
An Algorithm for Treating Uncertainties in the Visualization of Pipeline Sensors' Datasets. |
IVIC |
2009 |
DBLP DOI BibTeX RDF |
Uncertainty Visualisation, Nuggets, Pipeline-Sensors, Signal Dataspace, LDS |
26 | MyeongGyu Jeong, Toru Nakura, Makoto Ikeda, Kunihiro Asada |
Moebius circuit: dual-rail dynamic logic for logic gate level pipeline with error gate search feature. |
ACM Great Lakes Symposium on VLSI |
2009 |
DBLP DOI BibTeX RDF |
dcvsl, high speed digital, pipeline, error detect, soft error |
26 | Anne Benoit, Harald Kosch, Veronika Rehn-Sonigo, Yves Robert |
Bi-criteria Pipeline Mappings for Parallel Image Processing. |
ICCS (1) |
2008 |
DBLP DOI BibTeX RDF |
workflow application, JPEG encoding, optimization, pipeline, multi-criteria |
26 | Raghid Shreih, Maitham Shams |
Implementation of asynchronous pipeline circuits in multi-threshold CMOS technologies. |
ACM Great Lakes Symposium on VLSI |
2008 |
DBLP DOI BibTeX RDF |
c-element, gasp, low power, pipeline, asynchronous, multi-threshold |
26 | Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda |
Novel swapping technique for background calibration of capacitor mismatching in pipeline ADCS. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
analogue-to-digital converter, background (on-line) calibration, capacitor swapping technique, foreground (off-line) calibration, adaptive system, pipeline ADC |
26 | Shiann-Tsong Sheu, Yue-Ru Chuang |
A Pipeline-Based Genetic Algorithm Accelerator for Time-Critical Processes in Real-Time Systems. |
IEEE Trans. Computers |
2006 |
DBLP DOI BibTeX RDF |
genetic algorithms (GAs), time-critical processes, optimization, Evolutionary computing, pipeline |
26 | Edward Siomacco, John L. Kundert-Gibbs, Timothy A. Davis 0002 |
Developing efficient pipeline tools for animation production. |
ACM Southeast Regional Conference |
2006 |
DBLP DOI BibTeX RDF |
production pipeline, computer animation, graphics |
26 | Eric L. Hill, Mikko H. Lipasti |
Stall cycle redistribution in a transparent fetch pipeline. |
ISLPED |
2006 |
DBLP DOI BibTeX RDF |
pipeline gating, microarchitecture, dynamic power, instruction fetch |
26 | Vahid Majidzadeh, Omid Shoaei |
A power optimized design methodology for low-distortion sigma-delta-pipeline ADCs. |
ACM Great Lakes Symposium on VLSI |
2006 |
DBLP DOI BibTeX RDF |
reduced-sample-rate architectures, sigma-delta-pipeline ADCs, power optimization |
26 | Nathaniel Duca, Krzysztof Niski, Jonathan Bilodeau, Matthew Bolitho, Yuan Chen, Jonathan D. Cohen 0001 |
A relational debugging engine for the graphics pipeline. |
ACM Trans. Graph. |
2005 |
DBLP DOI BibTeX RDF |
visualization, debugging, SQL, streaming, graphics hardware, SIMD, relational algebra, graphics pipeline |
26 | Malay Kumar Pakhira, Rajat K. De |
A hardware pipeline for function optimization using genetic algorithms. |
GECCO |
2005 |
DBLP DOI BibTeX RDF |
hardware pipeline, pipelined GA, stochastic selection, genetic algorithms, function optimization |
26 | Samiran Halder, Arindrajit Ghosh, Ravi Sankar Prasad, Anirban Chatterjee, Swapna Banerjee |
A 160MSPS 8-Bit Pipeline Based ADC. |
VLSI Design |
2005 |
DBLP DOI BibTeX RDF |
Double sampling Sample-and-Hold, Multiplying digital-to-analog converter, Pipeline architecture, Comparator |
26 | Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda |
Digital Background Gain Error Correction in Pipeline ADCs. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
Background Calibration, On-line Calibration, Analog-to-Digital Converter, Pipeline ADC |
26 | Andreas Gerndt, Mark Asbach, Torsten W. Kuhlen, Christian H. Bischof, Stefan Lankes, Thomas Bemmerl |
Conceptual design and implementation of a pipeline-based VR-system parallelized by CORBA, and comparison with existing approaches. |
VRCAI |
2004 |
DBLP DOI BibTeX RDF |
visualization pipeline, virtual reality, parallelization, MPI, CORBA, CORBA |
26 | SangMin Shim, Soo-Mook Moon |
Split-Path Enhanced Pipeline Scheduling. |
IEEE Trans. Parallel Distributed Syst. |
2003 |
DBLP DOI BibTeX RDF |
multipath loops, enhanced pipeline scheduling, all-path pipelining, Instruction-level parallelism, software pipelining, modulo scheduling |
26 | Xingjun Wu, Hongyi Chen, Yihe Sun, Weixin Gai |
A Fully-Pipeline Linear Systolic Architecture for Modular Multiplier in Public-Key Crypto-Systems. |
J. VLSI Signal Process. |
2003 |
DBLP DOI BibTeX RDF |
public-key crypto-system, systolic array, modular-multiplication, pipeline architecture, modular-exponentiation |
26 | Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda |
Digital Background Calibration Technique for Pipeline ADCs with Multi-Bit Stages. |
SBCCI |
2003 |
DBLP DOI BibTeX RDF |
Background Calibration, Analog-to-Digital Converter, Pipeline ADC, LMS algorithm |
26 | Michael D. Powell, T. N. Vijaykumar |
Pipeline muffling and a priori current ramping: architectural techniques to reduce high-frequency inductive noise. |
ISLPED |
2003 |
DBLP DOI BibTeX RDF |
a priori current ramping, pipeline muffling, leakage, decoupling capacitors, inductive noise |
26 | Suhyun Kim, Soo-Mook Moon, Jinpyo Park, Kemal Ebcioglu |
Unroll-Based Copy Elimination for Enhanced Pipeline Scheduling. |
IEEE Trans. Computers |
2002 |
DBLP DOI BibTeX RDF |
enhanced pipeline scheduling, unrolling, modulo variable expansion, iterated coalescing, register allocation, Software pipelining, modulo scheduling, renaming, coalescing |
26 | Herbert Grünbacher, Maziar Khosravipour |
WinDLX and MIPSim Pipeline Simulators for Teaching Computer Architecture. |
ECBS |
1996 |
DBLP DOI BibTeX RDF |
teaching computer architecture, teaching computer organisation, teaching pipelining, DLX architecture, pipeline visualisation, WinDLX, MIPSim, ECBS |
26 | Kevin P. Acken, Mary Jane Irwin, Robert Michael Owens, Amulya K. Garga |
Architectural Optimizations For A Floating Point Multiply-Accumulate Unit In A Graphics Pipeline. |
ASAP |
1996 |
DBLP DOI BibTeX RDF |
floating point multiply-accumulate unit, three-dimensional graphics engines, normalized space, virtual reality, virtual reality, parallelism, computer graphics, scientific visualization, matrix multiplication, matrix multiplications, data visualisation, floating point arithmetic, architectural optimizations, graphics pipeline |
26 | Kok Kin Kee, Salim Hariri |
Efficient communication algorithms for pipeline multicomputers. |
SC |
1994 |
DBLP DOI BibTeX RDF |
pipeline multicomputer, point-to-point routing, distributed-memory, communication algorithms |
26 | Kow C. Chang |
Stability conditions for a pipeline polling scheme in satellite communications. |
Queueing Syst. Theory Appl. |
1993 |
DBLP DOI BibTeX RDF |
cyclic-service system, pipeline polling, Stability, satellite communications, reservation scheme |
25 | Michael Callahan, Martin J. Cole, Jason F. Shepherd, Jeroen G. Stinstra, Chris R. Johnson 0001 |
A meshing pipeline for biomedical computing. |
Eng. Comput. |
2009 |
DBLP DOI BibTeX RDF |
|
25 | Young Sik Kwon, Byung-Ju Yi |
The kinematic modeling and optimal paramerization of an omni-directional pipeline robot. |
ICRA |
2009 |
DBLP DOI BibTeX RDF |
|
25 | Hyunchul Park 0001, Yongjun Park 0001, Scott A. Mahlke |
Polymorphic pipeline array: a flexible multicore accelerator with virtualized execution for mobile multimedia applications. |
MICRO |
2009 |
DBLP DOI BibTeX RDF |
programmable accelerator, virtualization, software pipelining |
25 | Tomoya Ishimori, Hideki Yamada, Yuichiro Shibata, Yasunori Osana, Masato Yoshimi, Yuri Nishikawa, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Kiyoshi Oguri |
Pipeline Scheduling with Input Port Constraints for an FPGA-Based Biochemical Simulator. |
ARC |
2009 |
DBLP DOI BibTeX RDF |
|
25 | Eric Chun, Zeshan Chishti, T. N. Vijaykumar |
Shapeshifter: Dynamically changing pipeline width and speed to address process variations. |
MICRO |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Keigo Hirakawa, Patrick J. Wolfe |
Advancing the digital camera pipeline for mobile multimedia: Key challenges from a signal processing perspective. |
ICASSP |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Horacio González-Vélez, Murray Cole |
An adaptive parallel pipeline pattern for grids. |
IPDPS |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Radoslaw Mantiuk, Dawid Pajak |
Acceleration of High Dynamic Range Imaging Pipeline Based on Multi-threading and SIMD Technologies. |
ICCS (1) |
2008 |
DBLP DOI BibTeX RDF |
multi-threading architecture, computer visualization, image processing, high dynamic range imaging, SIMD architecture, SSE |
25 | Patricio Yankilevich, Paola R. Barrero, Igor Zwir |
An Integrated Time Series Gene Expression Data Analysis Pipeline with a Fuzzy Clustering Method to Assess Expression Patterns. |
FUZZ-IEEE |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Takeshi Shiro, Masaaki Abe, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai |
A Processor Generation Method from Instruction Behavior Description Based on Specification of Pipeline Stages and Functional Units. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Hans Vandierendonck, Philippe Manet, Thibault Delavallee, Igor Loiselle, Jean-Didier Legat |
By-passing the out-of-order execution pipeline to increase energy-efficiency. |
Conf. Computing Frontiers |
2007 |
DBLP DOI BibTeX RDF |
instruction wake-up, energy-efficiency, instruction scheduling, out-of-order execution |
25 | Jatan P. Shah, Rama Sangireddy |
Higher Clock Rate at Comparable IPC Through Reduced Circuit Complexity in Instruction Format Based Pipeline Clustering. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Thomas R. Puzak, Allan Hartstein, Philip G. Emma, Viji Srinivasan, Arthur Nadas |
Pipeline spectroscopy. |
Experimental Computer Science |
2007 |
DBLP DOI BibTeX RDF |
cost of a miss, probability transition matrix, cache, convex combination |
25 | Kuan-Wei Cheng, Tzong-Yen Lin, Rong-Guey Chang |
Compiler Support for Dynamic Pipeline Scaling. |
EUC |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Thomas Lenart, Viktor Öwall |
Architectures for Dynamic Data Scaling in 2/4/8K Pipeline FFT Cores. |
IEEE Trans. Very Large Scale Integr. Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Sangyun Kim 0001, Peter A. Beerel |
Pipeline optimization for asynchronous circuits: complexity analysis and an efficient optimal algorithm. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Xiaojun Wu, Osamu Takizawa, Takashi Matsuyama |
Parallel Pipeline Volume Intersection for Real-Time 3D Shape Reconstruction on a PC Cluster. |
ICVS |
2006 |
DBLP DOI BibTeX RDF |
|
Displaying result #101 - #200 of 9295 (100 per page; Change: ) Pages: [ <<][ 1][ 2][ 3][ 4][ 5][ 6][ 7][ 8][ 9][ 10][ 11][ >>] |
|