Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
19 | Hyun-Ki Han, Min-Woo Ko, Jeong-Hyun Cho, Gyeong-Gu Kang, Seok-Tae Koh, Hong-Hyun Bae, Hyun-Sik Kim |
A Monolithic 48V-to-1V 10A Quadruple Step-Down DC-DC Converter with Hysteretic Copied On-Time 4-Phase Control and 2× Slew Rate All-Hysteretic Mode. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Technology and Circuits ![In: IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022, pp. 182-183, 2022, IEEE, 978-1-6654-9772-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Tingxu Hu, Mo Huang, Yan Lu 0002, Rui Paulo Martins |
A 4A 12-to-1 Flying Capacitor Cross-Connected DC-DC Converter with Inserted D>0.5 Control Achieving >2x Transient Inductor Current Slew Rate and 0.73× Theoretical Minimum Output Undershoot of DSD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2022, San Francisco, CA, USA, February 20-26, 2022, pp. 1-3, 2022, IEEE, 978-1-6654-2800-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Si Yuan Sim, Junmin Jiang, Cheng Huang 0004 |
A Half-Bridge GaN Driver with Real-Time Digital Calibration for VGS Ringing Regulation and Slew-Rate Optimization in 180nm BCD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022, pp. 1492-1496, 2022, IEEE, 978-1-6654-8485-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Jinhen Lee, Jianming Zhao, Yuan Gao 0011 |
A Nanowatt Comparator with Feedforward Slew Rate Enhancement and PVT-Insensitive Bias for Always-on MEMS Switch Wake-up Sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022, pp. 2405-2408, 2022, IEEE, 978-1-6654-8485-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Young-Ju Oh, Hyo-Jin Park 0002, Joo-Mi Cho, Hyeon-Ji Choi, Su-Min Park, Chan-Ho Lee, Esun Baik, Chan-Kyu Lee, Ho-Chan Ahn, Sung-Wan Hong |
A High Slew-rate Wide-range Capacitive Load Driving Buffer Amplifier with Correlated Dual Positive Feedback Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISOCC ![In: 19th International SoC Design Conference, ISOCC 2022, Gangneung-si, Republic of Korea, October 19-22, 2022, pp. 231-232, 2022, IEEE, 978-1-6654-5971-6. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Zong-Hua Tsai, Aaron C.-W. Liang, Charles H.-P. Wen |
SlewFTA: Functional Timing Analysis Considering Slew Propagation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-DAT ![In: 2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022, Hsinchu, Taiwan, April 18-21, 2022, pp. 1-4, 2022, IEEE, 978-1-6654-0921-6. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Tianxian Wu, Yuting Zhang, Yanhan Zeng |
A 0.3-μA Quiescent Current Output Capacitor-Less LDO with Dynamic Slew Rate Enhance Buffer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuit and Systems, APCCAS 2022, Shenzhen, China, November 11-13, 2022, pp. 1-5, 2022, IEEE, 978-1-6654-5073-7. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Eric J. Wyers |
Accurate Geometric Programming-Compatible Slew Rate Modeling for Two-Stage Operational Amplifier Design Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuit and Systems, APCCAS 2022, Shenzhen, China, November 11-13, 2022, pp. 185-189, 2022, IEEE, 978-1-6654-5073-7. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Yu-Yung Kao, Sheng-Hsi Hung, Hsuan-Yu Chen, Jia-Jyun Lee, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai |
Fully Integrated GaN-on-Silicon Gate Driver and GaN Switch With Temperature-Compensated Fast Turn-on Technique for Achieving Switching Frequency of 50 MHz and Slew Rate of 118.3 V/Ns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 56(12), pp. 3619-3627, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Chua-Chin Wang, Pang-Yen Lou, Tsung-Yi Tsai, Yan-You Chou, Tzung-Je Lee |
2˟VDD 500 MHz Digital Output Buffer with Optimal Driver Transistor Sizing for Slew Rate Self-adjustment and Leakage Reduction Using 28-nm CMOS Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Circuits Syst. Signal Process. ![In: Circuits Syst. Signal Process. 40(6), pp. 2824-2840, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Marino De Jesus Guzman, Nima Maghari |
Slew Rate in Self-Biased Ring Amplifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 68(8), pp. 2795-2799, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Mingyuan Ren, Mengying Qin, Bo Wang, Xiaowei Han, Changchun Dong |
A Novel Slew-Boosting Circuit for Rail-to-Rail Operational Amplifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 30(2), pp. 2150033:1-2150033:7, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Mihika Mahendra, Shweta Kumari, Maneesha Gupta, Ankur Sangal |
Low voltage high performance super class AB OTA design using SCCM and DTMOS with enhanced slew rate and DC gain. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 113, pp. 105101, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Fang-Ming Yu, Kun-Cheng Lee, Ko-Wen Jwo, Rong-Seng Chang, Jun-Yi Lin |
Low Distortion of Noise Filter Realization with 6.34 V/μs Fast Slew Rate and 120 mVp-p Output Noise Signal. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 21(3), pp. 1008, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Manjunath Kareppagoudr, Emanuel Caceres, Gabor C. Temes |
Switched-Capacitor Integrator with Slew-Rate Enhancement and Low Distortion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 64th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021, Lansing, MI, USA, August 9-11, 2021, pp. 150-153, 2021, IEEE, 978-1-6654-2461-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Ree Jin Joe, Dong Gyu Kim, Kang-Yoon Lee |
Increasing Slew rate of Charge pump by adopting Negative Feedback. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICEIC ![In: International Conference on Electronics, Information, and Communication, ICEIC 2021, Jeju, South Korea, January 31 - February 3, 2021, pp. 1-2, 2021, IEEE, 978-1-7281-9161-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Hyo-Jin Park 0002, Joo-Mi Cho, Hyunji Choi, Esun Baik, Jeeyoung Shin, Sung-Wan Hong |
A 18 µA Rail-to-Rail Class-AB Operational Amplifier with a High-Slew Miller Compensation (HSMC) Technique with 240% Settling Time Reduction in 0.18 µm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 47th ESSCIRC 2021 - European Solid State Circuits Conference, ESSCIR 2021, Grenoble, France, September 13-22, 2021, pp. 399-402, 2021, IEEE, 978-1-6654-3751-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Ziyu Xia, Jason T. Stauth |
A Two-Stage Cascaded Hybrid Switched-Capacitor DC-DC Converter with 96.9% Peak Efficiency Tolerating 0.6V/μs Input Slew Rate During Startup. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2021, San Francisco, CA, USA, February 13-22, 2021, pp. 256-258, 2021, IEEE, 978-1-7281-9549-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Joo-Mi Cho, Hyo-Jin Park 0002, Sung-Wan Hong |
A 0.93-μW Single-Stage Rail-to-Rail Class AB Buffer Amplifier Improving DC gain and Slew-Rate with Different-Ratio Current-Mirrors and Positive-Feedback Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, pp. 1-2, 2021, IEEE, 978-4-86348-780-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Gyeong-Gu Kang, Seok-Tae Koh, Woojin Jang, Jiho Lee, Seongjoo Lee, Ohjo Kwon, Keumdong Jung, Hyun-Sik Kim |
A 12-Bit Mobile OLED/μLED Display Driver IC with Cascaded Loading-Free Capacitive Interpolation DAC and 6.24V/μs-Slew-Rate Buffer Amplifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, pp. 1-2, 2021, IEEE, 978-4-86348-780-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Weifu Chen, Mingyi Chen, Yuzhi Hao, Liang Qi, Jian Zhao 0004 |
A 1-μA-Quiescent-Current Capacitor-Less LDO Regulator with Adaptive Embedded Slew-Rate Enhancement Circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021, pp. 1-5, 2021, IEEE, 978-1-7281-9201-7. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Gianluca Giustolisi, Gaetano Palumbo |
Design of Three-Stage OTAs from Settling-Time and Slew-Rate Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021, pp. 1-5, 2021, IEEE, 978-1-7281-9201-7. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Gargi Nandi, Sameer Yadav, P. N. Kondekar |
A Fast Settling, High Slew Rate CMOS Recycling Folded Cascode Operational Transconductance Amplifier (OTA) for High Speed Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCCNT ![In: 12th International Conference on Computing Communication and Networking Technologies, ICCCNT 2021, Kharagpur, India, July 6-8, 2021, pp. 1-6, 2021, IEEE, 978-1-7281-8595-8. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Tzung-Je Lee, Wen-Jian Su, Lean Karlo S. Tolentino, Chua-Chin Wang |
A 2.5-GHz 2×VDD 16-nm FinFET Digital Output Buffer with Slew Rate and Duty Cycle Self-Adjustment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuit and Systems, APCCAS 2021, Penang, Malaysia, November 22-26, 2021, pp. 153-156, 2021, IEEE, 978-1-6654-3916-9. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Kan Li, Chuanshi Yang, Ting Guo, Yuanjin Zheng |
A Multi-Loop Slew-Rate-Enhanced NMOS LDO Handling 1-A-Load-Current Step With Fast Transient for 5G Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 55(11), pp. 3076-3086, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Jaedo Kim, Seokjae Song, Jeongjin Roh |
A High Slew-Rate Enhancement Class-AB Operational Transconductance Amplifier (OTA) for Switched-Capacitor (SC) Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 8, pp. 226167-226175, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Deng-Fong Lu, Chin Hsia, Kun-Chu Lee |
An Integrated Wideband Operational Transconductance Amplifier with Complementary Slew-Rate Enhancer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 103-A(1), pp. 295-296, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
19 | Manikandan Pappiah, Bindu Boby |
Capacitor-less FVF low drop-out regulator with active feed-forward compensation and efficient slew-rate enhancer circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Circuits Devices Syst. ![In: IET Circuits Devices Syst. 14(6), pp. 853-859, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Cheuk Ho Hung, Yanqi Zheng, Jianping Guo, Ka Nang Leung |
Bandwidth and Slew Rate Enhanced OTA With Sustainable Dynamic Bias. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 67-II(4), pp. 635-639, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Luis Miguel Carvalho Freitas, Fernando Morgado Dias |
A CMOS slew-rate enhanced OTA for imaging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 72, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Chua-Chin Wang, Zong-You Hou, Yu-Lin Deng, U. Fat Chio, Wei Wang |
2-GHz 2×VDD 28-nm CMOS Digital Output Buffer with Slew Rate Auto-Adjustment Against Process and Voltage Variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 29(6), pp. 2050088:1-2050088:17, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Caffey Jindal, Rishikesh Pandey |
A class-AB flipped voltage follower cell with high symmetrical slew rate and high current sourcing/sinking capability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 48(7), pp. 1108-1123, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Ahmed Gharib Gadel-Karim, Ahmed N. Mohieldin, Faisal Hussien, Mohamed M. Aboudina |
Linearity-Enhanced Ring Amplifier Using Adaptive Slew-Rate Feed-Forward Path. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. ![In: IEEE Trans. Circuits Syst. 67-II(12), pp. 2908-2912, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Jian-An Wang, Yuan-Yao Zhao, Zhengping Zhang |
A 90-nm 640 MHz 2 × VDD Output Buffer With 41.5% Slew Rate Improvement Using PVT Compensation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 67-II(9), pp. 1524-1528, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Tzung-Je Lee, Ssu-Wei Huang, Chua-Chin Wang |
A Slew Rate Enhanced 2 x VDD I/O Buffer With Precharge Timing Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. ![In: IEEE Trans. Circuits Syst. 67-II(11), pp. 2707-2711, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Sizhen Li, Kai Yu 0008, Li-xiang Ou, Pan Zhou, Gary Zhang |
A compact hybrid envelope tracking supply modulator with wide-band high-slew-rate linear amplifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 17(10), pp. 20200121, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Alec Yen, Benjamin J. Blalock |
A High Slew Rate, Low Power, Compact Operational Amplifier Based on the Super-Class AB Recycling Folded Cascode. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 63rd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2020, Springfield, MA, USA, August 9-12, 2020, pp. 9-12, 2020, IEEE, 978-1-7281-8058-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Ola Ibrahim, Rana Hesham, Ahmed Soltan |
Controllable OTA Slew-rate for CMOS Image Sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICM ![In: 32nd International Conference on Microelectronics, ICM 2020, Aqaba, Jordan, December 14-17, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-9664-0. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | R. Ghosh, Paolo Seri, Gian Carlo Montanari |
Measuring PD under Fast Slew Rate, High Voltage and High Frequency Repetitive Voltage Impulses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIIS ![In: 15th IEEE International Conference on Industrial and Information Systems, ICIIS 2020, Rupnagar, India, November 26-28, 2020, pp. 133-137, 2020, IEEE, 978-1-7281-8524-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Kun Cai, Gang Zhang |
High-Gain PFD/Charge Pump with Gain Proportional to Slew Rate of Up/Down Signals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTA ![In: 2020 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2020, Nanjing, China, November 23-25, 2020, pp. 1-2, 2020, IEEE, 978-1-7281-8030-4. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Timo Mai, Robert Weigel |
A 5V, 20MHz Bandwidth, fully differential Operational Amplifier with 70 V/μs Slew Rate and 205 ns/30 ns enable/disable time in 180 nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISIE ![In: 29th IEEE International Symposium on Industrial Electronics, ISIE 2020, Delft, The Netherlands, June 17-19, 2020, pp. 389-393, 2020, IEEE, 978-1-7281-5635-4. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Yong Zhou, Yanqi Zheng, Ka Nang Leung |
An Output-Capacitorless Low-Dropout Regulator with High Slew Rate and Unity-Gain Bandwidth. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020, pp. 1-5, 2020, IEEE, 978-1-7281-3320-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Kan Li, Chuanshi Yang, Ting Guo, Yuanjin Zheng |
A Multi-Loop Slew-Rate Enhanced NMOS LDO Handling 1A Load Current Step with Fast Transient. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-3320-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Parisa Mahmoudidaryan, Debashis Mandal, Bertan Bakkaloglu, Sayfe Kiaei |
Wideband Hybrid Envelope Tracking Modulator With Hysteretic-Controlled Three-Level Switching Converter and Slew-Rate Enhanced Linear Amplifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 54(12), pp. 3336-3347, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Po-Yu Kuo, Sheng-Da Tsai |
An Enhanced Scheme of Multi-Stage Amplifier With High-Speed High-Gain Blocks and Recycling Frequency Cascode Circuitry to Improve Gain-Bandwidth and Slew Rate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 130820-130829, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Weicheng Liu, Can Sitik, Emre Salman, Baris Taskin, Savithri Sundareswaran, Benjamin Huang |
SLECTS: Slew-Driven Clock Tree Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 27(4), pp. 864-874, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Anindita Paul, Jaime Ramírez-Angulo, Antonio Torralba 0002 |
Analysis, Comparison, and Experimental Validation of a Class AB Voltage Follower With Enhanced Bandwidth and Slew Rate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 27(6), pp. 1353-1364, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Fatemeh Abdi, Mahnaz Janipoor Deylamani, Parviz Amiri, Mohammad Hossein Refan |
Slew Rate and Transient Response Enhancement in MOLDO with Modifying Error Amplifier Structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 28(9), pp. 1992001:1-1992001:1, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | M. Pilar Garde, Antonio Lopez-Martin, José María Algueta-Miguel, Ramón González Carvajal, Jaime Ramírez-Angulo |
Class AB amplifier with enhanced slew rate and GBW. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 47(8), pp. 1199-1210, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Ross Feller |
SLEW TEW - A Compilation of Compilation Tracks 2003-2017. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Music. J. ![In: Comput. Music. J. 43(4), pp. 91-93, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Tzung-Je Lee, Tsung-Yi Tsai, Wei Lin, U. Fat Chio, Chua-Chin Wang |
A Slew Rate Variation Compensated 2× VDD I/O Buffer Using Deterministic P/N-PVT Variation Detection Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 66-II(1), pp. 116-120, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Jun Tang 0003, Jaeseong Lee 0001, Jeongjin Roh |
Low-Power Fast-Transient Capacitor-Less LDO Regulator With High Slew-Rate Class-AB Amplifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 66-II(2), pp. 462-466, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Dawei Liu 0003, Simon J. Hollis, Bernard H. Stark |
A New Design Technique for Sub-Nanosecond Delay and 200 V/ns Power Supply Slew-Tolerant Floating Voltage Level Shifters for GaN SMPS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(3), pp. 1280-1290, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Mohammad H. Naderi, Chulhyun Park, Suraj Prakash, Martin Kinyua, Eric G. Soenen, José Silva-Martínez |
A 27.7 fJ/conv-step 500 MS/s 12-Bit Pipelined ADC Employing a Sub-ADC Forecasting Technique and Low-Power Class AB Slew Boosted Amplifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9), pp. 3352-3364, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Dae Hyun Kwon, Minkyu Kim 0003, Sung-Geun Kim, Woo-Young Choi |
A 32-Gb/s PAM-4 Quarter-Rate Clock and Data Recovery Circuit With an Input Slew-Rate Tolerant Selective Transition Detector. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 66-II(2), pp. 362-366, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | You Ching Wu, Chin Hsia, Kun-Chu Lee, Deng-Fong Lu, Yen-Chung Huang |
An Integrated OTA with Complementary Slew-rate Enhancer for Doppler Ultrasound System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCE-TW ![In: IEEE International Conference on Consumer Electronics - Taiwan, ICCE-TW 2019, Yilan, Taiwan, May 20-22, 2019, pp. 1-2, 2019, IEEE, 978-1-7281-3279-2. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Manjunath Kareppagoudr, Emanuel Caceres, Yu-Wen Kuo, Jyotindra R. Shakya, Yanchao Wang 0001, Gabor C. Temes |
Passive slew rate enhancement technique for Switched-Capacitor Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 62nd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2019, Dallas, TX, USA, August 4-7, 2019, pp. 913-916, 2019, IEEE, 978-1-7281-2788-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Shusuke Kawai, Takeshi Ueno, Kohei Onizuka |
A 4.5V/ns Active Slew-Rate-Controlling Gate Driver with Robust Discrete-Time Feedback Technique for 600V Superjunction MOSFETs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid- State Circuits Conference, ISSCC 2019, San Francisco, CA, USA, February 17-21, 2019, pp. 252-254, 2019, IEEE, 978-1-5386-8531-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Parisa Mahmoudidaryan, Debashis Mandal, Bertan Bakkaloglu, Sayfe Kiaei |
A 91%-Efficiency Envelope-Tracking Modulator Using Hysteresis-Controlled Three-Level Switching Regulator and Slew-Rate-Enhanced Linear Amplifier for LTE-80MHz Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid- State Circuits Conference, ISSCC 2019, San Francisco, CA, USA, February 17-21, 2019, pp. 428-430, 2019, IEEE, 978-1-5386-8531-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Derong Liu 0002, Bei Yu 0001, Salim Chowdhury, David Z. Pan |
TILA-S: Timing-Driven Incremental Layer Assignment Avoiding Slew Violations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(1), pp. 231-244, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | R. Udaiyakumar, Senoj Joseph, T. V. P. Sundararajan, Dhasarathan Vigneswaran, R. Maheswar 0001, Iraj S. Amiri |
Performance Analysis in Digital Circuits for Process Corner Variations, Slew-Rate and Load Capacitance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Wirel. Pers. Commun. ![In: Wirel. Pers. Commun. 103(1), pp. 99-115, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Wahyu Caesarendra, Mahardhika Pratama, Tegoeh Tjahjowidodo, Kiet Tieu, Buyung Kosasih |
Parsimonious Network based on Fuzzy Inference System (PANFIS) for Time Series Feature Prediction of Low Speed Slew Bearing Prognosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1802.09332, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
|
19 | Mohammad H. Naderi, Suraj Prakash, José Silva-Martínez |
Operational Transconductance Amplifier With Class-B Slew-Rate Boosting for Fast High-Performance Switched-Capacitor Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11), pp. 3769-3779, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Xiaoyan Gui, Kai Li, Xiaoli Wang, Li Geng |
A Dual-Path Open-Loop CMOS Slew-Rate Controlled Output Driver with low PVT Variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: IEEE 61st International Midwest Symposium on Circuits and Systems, MWSCAS 2018, Windsor, ON, Canada, August 5-8, 2018, pp. 274-277, 2018, IEEE, 978-1-5386-7392-8. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Young Min Park, Kwangsu Kim, Byoung Jin Kim, Eui-Young Chung |
Asymmetric Slew Logic Threshold Method on Near Threshold Region. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSCA ![In: Proceedings of the 7th International Conference on Software and Computer Applications, ICSCA 2018, Kuantan, Malaysia, February 08-10, 2018, pp. 317-321, 2018, ACM. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Luis Miguel Carvalho Freitas, Fernando Morgado Dias, Guy Meynants, Adi Xhakoni |
Design and Simulation of a CMOS Slew-Rate Enhanced OTA to Drive Heavy Capacitive Loads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICBEA ![In: 2018 International Conference on Biomedical Engineering and Applications, ICBEA 2018, Funchal, Portugal, July 9-12, 2018, pp. 1-6, 2018, IEEE, 978-1-5386-8058-2. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Marouf Khan, Masud H. Chowdhury |
Capacitor-less Low-Dropout Regulator (LDO) with Improved PSRR and Enhanced Slew-Rate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy, pp. 1-5, 2018, IEEE, 978-1-5386-4881-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Meysam Akbari, Omid Hashemipour, Farshad Moradi |
A High Slew Rate CMOS OTA with Dynamic Current Boosting Paths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy, pp. 1-5, 2018, IEEE, 978-1-5386-4881-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Chua-Chin Wang, Zong-You Hou, Ssu-Wei Huang |
40-nm 2×VDD Digital Output Buffer Design With DDR4-Compliant Slew Rate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: 2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018, Chengdu, China, October 26-30, 2018, pp. 279-282, 2018, IEEE, 978-1-5386-8240-1. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Chien-Pang Lu, Iris Hui-Ru Jiang |
COSAT: congestion, obstacle, and slew aware tree construction for multiple power domain design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 55th Annual Design Automation Conference, DAC 2018, San Francisco, CA, USA, June 24-29, 2018, pp. 47:1-47:6, 2018, ACM, 978-1-5386-4114-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Tzung-Je Lee, Tsung-Yi Tsai, Wei Lin, U-Fat Chio, Chua-Chin Wang |
A Dynamic Leakage and Slew Rate Compensation Circuit for 40-nm CMOS Mixed-Voltage Output Buffer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 25(11), pp. 3166-3174, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Tripurari Sharan, Vijaya Bhadauria |
Fully Differential, Bulk-Driven, Class AB, Sub-Threshold OTA With Enhanced Slew Rates and Gain. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 26(1), pp. 1750001:1-1750001:25, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Fatemeh Abdi, Mahnaz Janipoor Deylamani, Parviz Amiri |
Slew Rate and Transient Response Enhancement in MOLDO with Modifying Error Amplifier Structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 26(12), pp. 1750197:1-1750197:17, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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19 | Syed Arsalan Jawed, Ali Asghar, Khubaib Khan, Shahbaz Abbasi, Muhammad Naveed 0004, Yasir Siddiqi, Waqas Siddiqi |
A configurable 2-Gbps LVDS transceiver in 150-nm CMOS with pre-emphasis, equalization, and slew rate control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 45(10), pp. 1369-1381, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Deng-Shian Wang, Yu-Hsun Su, Chua-Chin Wang |
A readout circuit with cell output slew rate compensation for 5T single-ended 28 nm CMOS SRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 70, pp. 107-116, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | P. Karuppanan, Soumya Ranjan Ghosh, Kamran Khan, Pavan Kumar Bikki |
A Fully Differential Operational Amplifier with Slew Rate Enhancer and Adaptive Bias for Ultra Low Power. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Low Power Electron. ![In: J. Low Power Electron. 13(1), pp. 67-75, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Chua-Chin Wang, Zong-You Hou, Kai-Wei Ruan |
2×VDD 40-nm CMOS Output Buffer With Slew Rate Self-Adjustment Using Leakage Compensation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 64-II(7), pp. 812-816, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Punith R. Surkanti, Aditya A. Patii, Sri Harsh Pakala, Paul M. Furth |
High bandwidth class-AB amphfier with high slew rate and fast current sensing for envelope tracking applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017, Boston, MA, USA, August 6-9, 2017, pp. 1220-1223, 2017, IEEE, 978-1-5090-6389-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Carlos Aristoteles De la Cruz-Blas, M. Pilar Garde, Antonio J. López-Martín |
Super class AB transconductor with slew-rate enhancement using QFG MOS techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECCTD ![In: 2017 European Conference on Circuit Theory and Design, ECCTD 2017, Catania, Italy, September 4-6, 2017, pp. 1-4, 2017, IEEE, 978-1-5386-3974-0. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Mingyu Liu, Donglai Zhang, Xiaoning Shen |
Full-differential paralleled high slew rate linear current sink and applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IECON ![In: IECON 2017 - 43rd Annual Conference of the IEEE Industrial Electronics Society, Beijing, China, October 29 - November 1, 2017, pp. 1180-1185, 2017, IEEE, 978-1-5386-1127-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Ali Farshidi, Logan Rakai, Laleh Behjat |
An efficient optimal clock network buffer sizing with slew consideration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: 30th IEEE Canadian Conference on Electrical and Computer Engineering, CCECE 2017, Windsor, ON, Canada, April 30 - May 3, 2017, pp. 1-4, 2017, IEEE, 978-1-5090-5538-8. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Yue Jing |
High Slew-Rate Adaptive Biasing Hybrid Envelope Tracking Supply Modulator for LTE Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2017 |
RDF |
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19 | Ning Sun 0002, Yongchun Fang, He Chen 0003, Biao Lu, Yiming Fu |
Slew/Translation Positioning and Swing Suppression for 4-DOF Tower Cranes With Parametric Uncertainties: Design and Hardware Experimentation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Ind. Electron. ![In: IEEE Trans. Ind. Electron. 63(10), pp. 6407-6418, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Jianping Guo, Marco Ho, Ka Nang Leung, Guangxiang Li |
Digitally-assisted constant-on-time dynamic-biasing technique for bandwidth and slew-rate enhancement in ultra-low-power low-dropout regulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 44(2), pp. 504-513, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Pawan Sharma, Saurabh Khandelwal, Shyam Akashe |
FinFET Design Considerations Based on Schmitt Trigger with Slew Rate and Gain-Bandwidth Product Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Wirel. Pers. Commun. ![In: Wirel. Pers. Commun. 87(1), pp. 83-97, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Sung-Wan Hong, Gyu-Hyeong Cho |
A Pseudo Single-Stage Amplifier With an Adaptively Varied Medium Impedance Node for Ultra-High Slew Rate and Wide-Range Capacitive-Load Drivability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(10), pp. 1567-1578, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Dawei Liu 0003, Simon J. Hollis, Harry C. P. Dymond, Neville McNeill, Bernard H. Stark |
Design of 370-ps Delay Floating-Voltage Level Shifters With 30-V/ns Power Supply Slew Tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 63-II(7), pp. 688-692, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Minghao Lin, Heming Sun, Shinji Kimura |
Power-efficient and slew-aware three dimensional gated clock tree synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: 2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, pp. 1-6, 2016, IEEE, 978-1-5090-3561-8. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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19 | Saikrishna Ganta, Alfredo Tomasini, Ajay Taparia, Taehee Cho, Mandar Kulkarni, Ozan Erdogan |
A 12 bit, 2-MS/s, 0.016-mm2 column-parallel readout cyclic ADC, having 50% reduced slew rate requirement due to feed-forward spike eliminator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, Lausanne, Switzerland, September 12-15, 2016, pp. 173-176, 2016, IEEE, 978-1-5090-2972-3. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Debjit Sinha, Vladimir Zolotov, Jin Hu, Sheshashayee K. Raghunathan, Adil Bhanji, Christine M. Casey |
Generation and use of statistical timing macro-models considering slew and load variability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 35th International Conference on Computer-Aided Design, ICCAD 2016, Austin, TX, USA, November 7-10, 2016, pp. 98, 2016, ACM, 978-1-4503-4466-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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19 | Karim M. Megawer, Faisal A. Hussien, Mohamed M. Aboudina, Ahmed Nader Mohieldin |
An adaptive slew rate and dead zone ring amplifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montréal, QC, Canada, May 22-25, 2016, pp. 305-308, 2016, IEEE, 978-1-4799-5341-7. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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19 | Tsung-Yi Tsai, Yan-You Chou, Chua-Chin Wang |
A method of leakage reduction and slew-rate adjustment in 2×VDD output buffer for 28 nm CMOS technology and above. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICICDT ![In: International Conference on IC Design and Technology, ICICDT 2016, Ho Chi Minh, Vietnam, June 27-29, 2016, pp. 1-4, 2016, IEEE, 978-1-5090-0827-8. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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19 | Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins, Franco Maloberti |
Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier With Enhancements of DC Gain, GBW and Slew Rate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 50(10), pp. 2353-2366, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Yici Cai, Chao Deng, Qiang Zhou 0001, Hailong Yao, Feifei Niu, Cliff N. Sze |
Obstacle-Avoiding and Slew-Constrained Clock Tree Synthesis With Efficient Buffer Insertion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 23(1), pp. 142-155, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Chee-Cheow Lim, Nai Shyan Lai, Gim Heng Tan, Harikrishnan Ramiah |
A low-power fast transient output capacitor-free adaptively biased LDO based on slew rate enhancement for SoC applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 46(8), pp. 740-749, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Carmelo Zuccarotto, Anna Richelli, Zsolt Miklós Kovács-Vajna |
Design of a Low Voltage High Symmetrical Slew Rate Opamp Based on Self Cascode in UMC 0.18 μm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Low Power Electron. ![In: J. Low Power Electron. 11(4), pp. 498-503, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Ashis Maity, Amit Patra |
Dynamic Slew Enhancement Technique for Improving Transient Response in an Adaptively Biased Low-Dropout Regulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 62-II(7), pp. 626-630, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Elizabeth Gibney |
Software predicts slew of fiendish crystal structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Nat. ![In: Nat. 527(7576), pp. 20-21, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Wahyu Caesarendra, Jong Myeong Lee, Jung Min Ha, Byeong-Keun Choi |
Slew bearing early damage detection based on multivariate state estimation technique and sequential probability ratio test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AIM ![In: IEEE International Conference on Advanced Intelligent Mechatronics, AIM 2015, Busan, South Korea, July 7-11, 2015, pp. 1161-1166, 2015, IEEE, 978-1-4673-9107-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
19 | Chongli Cai, Degang Chen 0001 |
A slew-rate enhancement technique for fully differential amplifier without inducing Trojan state. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: IEEE 58th International Midwest Symposium on Circuits and Systems, MWSCAS 2015, Fort Collins, CO, USA, August 2-5, 2015, pp. 1-4, 2015, IEEE, 978-1-4673-6558-1. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|