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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 4301 publication records. Showing 4296 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
21 | Jong-wan Seo, Myong-Chul Shin |
A study on an ASIC design technique for digital protective relays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 3910-3913, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Yuan-Sun Chu, Po-Feng Lin, Jia-Huang Lin, Hui-Kai Su, Ming-Jen Chen |
ASIC design of fast IP-lookup for next generation IP router. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 3825-3828, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Sreeram Chandrasekar, Gaurav Kumar Varshney, V. Visvanathan |
A Comprehensive Methodology for Noise Characterization of ASIC Cell Libraries. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 530-535, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Shubhajit Roy Chowdhury, C. Pramanik, Hiranmay Saha |
ASIC Design of the Linearisation Circuit of a PTC Thermistor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 866-869, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Chakka Siva Sai Prasanna, N. Sudha, V. Kamakoti 0001 |
A Principal Component Neural Network-Based Face Recognition System and Its ASIC Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 795-798, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Peter Zipf, Claude Stötzler, Manfred Glesner |
A Configurable Pipelined State Machine as a Hybrid ASIC and Configurable Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), Emerging Trends in VLSI Systems Design, 19-20 February 2004, Lafayette, LA, USA, pp. 266-267, 2004, IEEE Computer Society, 0-7695-2097-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Kris Tiri, Ingrid Verbauwhede |
A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 246-251, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Guido Bertoni, Marco Macchetti, Luca Negri, Pasqualina Fragneto |
Power-efficient ASIC synthesis of cryptographic sboxes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004, pp. 277-281, 2004, ACM, 1-58113-853-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
S-box implementation, low power logic, cryptography |
21 | Siddika Berna Örs, Frank K. Gürkaynak, Elisabeth Oswald, Bart Preneel |
Power-Analysis Attack on an ASIC AES implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITCC (2) ![In: International Conference on Information Technology: Coding and Computing (ITCC'04), Volume 2, April 5-7, 2004, Las Vegas, Nevada, USA, pp. 546-552, 2004, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
AES, power analysis attack |
21 | N. Sudha |
An ASIC Implementation of Kohonen's Map Based Color Image Compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 677-680, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Nitin Deo, Behrooz Zahiri, Ivo Bolsens, Jason Cong, Bhusan Gupta, Philip Lopresti, Christopher B. Reynolds, Chris Rowen, Ray Simar |
What happened to ASIC?: Go (recon)figure? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 185, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Dongsheng Wang 0012, Peter Suaris, Nan-Chi Chou |
A Practical ASIC Methdology for Flexible Clock Tree Synthesis with Routing Blockages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 13th International Workshop, PATMOS 2003, Torino, Italy, September 10-12, 2003, Proceedings, pp. 511-519, 2003, Springer, 3-540-20074-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
21 | Emmanuel Zervakis, Dimitris Loukas, Nikos Haralabidis, Arximidis Pavlidis |
Development of a CMOS low-noise analog front-end ASIC for X-ray imaging applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 764-767, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
21 | Theo J. Powell, Wu-Tung Cheng, Joseph Rayhawk, Omer Samman, Paul Policke, Sherry Lai |
BIST for Deep Submicron ASIC Memories with High Performance Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 386-392, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
21 | Yoshihito Nishizaki, Osamu Nakayama, Chiaki Matsumoto, Yoshitaka Kimura, Toshimi Kobayashi, Hiroyuki Nakamura |
Testing DSM ASIC With Static, \DeltaIDDQ, And Dynamic Test Suite: Implementation And Results. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 85-94, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
21 | Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira 0001 |
Design and Test of a Certifiable ASIC for a Safety-Critical Gas Burner Control System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 18(3), pp. 285-294, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
fault simulation, safety-critical, self-checking |
21 | Dae Woon Kang, Yong-Bin Kim |
Design flow of robust routed power distribution for low power ASIC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 181-184, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Tony Han, Sri Parameswaran |
SWASAD: An ASIC Design for High Speed DNA Sequence Matching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 541-546, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Sanjeev Patel |
Development of ASIC Chip-Set for High-End Network Processing Application-A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 789-794, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Zhenyu Liu, Zhimei Zhou, Yueqiu Han |
Tracking radar digital matched-filter ASIC design and its error analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS (1) ![In: IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002, pp. 491-496, 2002, IEEE, 0-7803-7690-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Lionel Bening, Harry Foster |
Optimizing Multiple EDA Tools within the ASIC Design Flow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 18(4), pp. 46-55, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | Oleg Maslennikov |
Systematic Generation of Executing Programs for Processor Elements in Parallel ASIC or FPGA-Based Systems and Their Transformation into VHDL-Descriptions of Processor Element Control Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPAM ![In: Parallel Processing and Applied Mathematics, 4th International Conference, PPAM 2001 Naleczow, Poland, September 9-12, 2001, Revised Papers, pp. 272-279, 2001, Springer, 3-540-43792-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | L. Louis Zhang, Brent Beacham, Massoud R. Hashemi, Paul Chow, Alberto Leon-Garcia |
A Scheduler ASIC for a Programmable Packet Switch. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 20(1), pp. 42-48, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
21 | Ji-Soong Park, Chul-Hong Park, Sang-Uhk Rhie, Yoo-Hyon Kim, Moon-Hyun Yoo, Jeong-Taek Kong, Hyung-Woo Kim, Sun-Il Yoo |
An Efficient Rule-Based OPC Approach Using a DRC Tool for 0.18mum ASIC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 1st International Symposium on Quality of Electronic Design (ISQED 2000), 20-22 March 2000, San Jose, CA, USA, pp. 81-86, 2000, IEEE Computer Society, 0-7695-0525-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
CD, rule extraction, OPC, critical area, DRC |
21 | Prabir Dasgupta, Santanu Chattopadhyay, Indranil Sengupta 0001 |
An ASIC for Cellular Automata Based Message Authentication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 13th International Conference on VLSI Design (VLSI Design 2000), 4-7 January 2000, Calcutta, India, pp. 538-, 2000, IEEE Computer Society, 0-7695-0487-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
21 | William J. Dally, Andrew Chang 0001 |
The role of custom design in ASIC Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 643-647, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
21 | Peter Koch 0001 |
A Project-oriented Master Programme in "DSP Algorithms and ASIC Architectures". ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: IEEE International Conference on Microelectronic Systems Education, MSE 1999, Arlington, Virginia, USA, July 19-21, 1999, pp. 32-33, 1999, IEEE Computer Society, 0-7695-0312-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
21 | Massimo Buzzoni, Dario Cardini, Roberto Gallino, Roberto Romagnese |
ATM Traffic Management Systems: ASIC Fast Prototyping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the Tenth IEEE International Workshop on Rapid System Prototyping (RSP 1999), Clearwater, Florida, USA, June 16-18, 1999, pp. 74-80, 1999, IEEE Computer Society, 0-7695-0246-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
VHDL macrocells, FPGAs, Prototyping, ATM, Traffic Management |
21 | Scott Davis, Jim Braatz, Jay Clement, Diane Honda |
Advanced instrument controller ASIC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 478-480, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
21 | Wilfred Corrigan |
ASIC Challenges: Emerging from a Primordial Soup. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 15(3), pp. 4-7, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
21 | Jacobo Riesco, Juan Carlos Diaz, Luis A. Merayo, José Luis Conesa, Carlos Santos, Eduardo Juárez Martínez |
On the way to the 2.5 Gbits/s ATM network ATM multiplexer demultiplexer ASIC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ED&TC ![In: European Design and Test Conference, ED&TC '97, Paris, France, 17-20 March 1997, pp. 218-222, 1997, IEEE Computer Society, 0-8186-7786-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
21 | Ming-Dou Ker, Chung-Yu Wu, Tao Cheng, Hun-Hsien Chang |
Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 4(3), pp. 307-321, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
21 | Michaël F. X. B. van Swaaij, Francky Catthoor, Hugo De Man |
Nonlinear transformations for high level regular array ASIC synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 4(4), pp. 259-268, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
21 | Michaël F. X. B. van Swaaij, Jan Rosseel, Francky Catthoor, Hugo De Man |
Synthesis of ASIC regular arrays for real-time image processing systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 3(3), pp. 183-192, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
21 | Stephen Walters |
Computer-Aided Prototyping for ASIC-Based Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 8(2), pp. 4-10, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
21 | Michael J. Flynn, Robert I. Winner |
ASIC microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 22nd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1989, Dublin, Ireland, August 14-16, 1989, pp. 237-243, 1989, ACM/IEEE, 0-89791-324-8. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
21 | Michael Rumsey, John Sackett |
An ASIC Methodology for Mixed Analog-Digital Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 26th ACM/IEEE Design Automation Conference, Las Vegas, Nevada, USA, June 25-29, 1989., pp. 618-621, 1989, ACM Press. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
21 | Youssef Saab, Vasant B. Rao |
An Evolution-Based Approach to Partitioning ASIC Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 26th ACM/IEEE Design Automation Conference, Las Vegas, Nevada, USA, June 25-29, 1989., pp. 767-770, 1989, ACM Press. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
21 | Steven S. Leung, Michael A. Shanblatt |
A Conceptual Framework for Designing ASIC Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28 - July 1, 1987., pp. 592-595, 1987, IEEE Computer Society Press / ACM. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
15 | Martin Rozkovec, Ondrej Novák |
Structural test of programmed FPGA circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009, April 15-17, 2009, Liberec, Czech Republic, pp. 136-139, 2009, IEEE Computer Society, 978-1-4244-3341-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
15 | Christopher Kennedy, Arash Reyhani-Masoleh |
High-speed CRC computations using improved state-space transformations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EIT ![In: 2009 IEEE International Conference on Electro/Information Technology, EIT 2009, Windsor, Ontario, Canada, June 7-9, 2009, pp. 9-14, 2009, IEEE, 978-1-4244-3355-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
15 | Mark Horowitz |
Why design must change: rethinking digital design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA, pp. 267, 2009, ACM, 978-1-60558-798-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
15 | Nan Wu 0003, Mei Wen, Wei Wu, Ju Ren 0002, Huayou Su, Changqing Xun, Chunyuan Zhang |
Streaming HD H.264 encoder on programmable processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Multimedia ![In: Proceedings of the 17th International Conference on Multimedia 2009, Vancouver, British Columbia, Canada, October 19-24, 2009, pp. 371-380, 2009, ACM, 978-1-60558-608-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
1080P HD, H.264 encoder, real-time, stream, programmable |
15 | Sumit Ahuja, Deepak Mathaikutty, Gaurav Singh 0006, Joe Stetzer, Sandeep K. Shukla, Ajit Dingankar |
Power estimation methodology for a high-level synthesis framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 541-546, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
15 | Kazuo Sakiyama, Tatsuya Yagi, Kazuo Ohta |
Fault Analysis Attack against an AES Prototype Chip Using RSL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CT-RSA ![In: Topics in Cryptology - CT-RSA 2009, The Cryptographers' Track at the RSA Conference 2009, San Francisco, CA, USA, April 20-24, 2009. Proceedings, pp. 429-443, 2009, Springer, 978-3-642-00861-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Random Switching Logic, Clock-based Attack, AES, Fault Analysis |
15 | Vijay Khawshe, Kapil Vyas, Renu Rangnekar, Prateek Goyal, Vijay Krishna, Kashinath Prabhu, Pravin Kumar Venkatesan, Leneesh Raghavan, Rajkumar Palwai, M. Thrivikraman, Kunal Desai, Abhijit Abhyankar |
A 2.4Gbps-4.8Gbps XDR-DRAM I/O (XIO) Link. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009, pp. 373-378, 2009, IEEE Computer Society, 978-0-7695-3506-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
15 | Anmol Mathur, Qi Wang |
Power Reduction Techniques and Flows at RTL and System Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009, pp. 28-29, 2009, IEEE Computer Society, 978-0-7695-3506-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
15 | Sang-Kyo Han, SeongHoon Woo, Mun-Ho Jeong, Bum-Jae You |
Improved-Quality Real-Time Stereo Vision Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009, pp. 287-292, 2009, IEEE Computer Society, 978-0-7695-3506-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
15 | Patrick de la Hamette, Gerhard Tröster |
Architecture and applications of the FingerMouse: a smart stereo camera for wearable computing HCI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Pers. Ubiquitous Comput. ![In: Pers. Ubiquitous Comput. 12(2), pp. 97-110, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Mobile embedded vision, HCI, Wearable computing, Stereo vision, Hand tracking, Foreground segmentation |
15 | Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne |
Efficient synthesis of compressor trees on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 138-143, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Cao Liang, Xinming Huang 0001 |
SmartCell: A power-efficient reconfigurable architecture for data streaming applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SiPS ![In: Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2008, October 8-10, 2008, Washington, D.C. Metro Area, USA, pp. 257-262, 2008, IEEE, 978-1-4244-2924-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Alan Kennedy, Xiaojun Wang 0001, Bin Liu 0001 |
Energy efficient packet classification hardware accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-8, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Deepak Sreedharan, Ali Akoglu |
A hybrid processing element based reconfigurable architecture for hashing algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-8, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
15 | J. P. Grossman, Cliff Young, Joseph A. Bank, Kenneth M. Mackenzie, Doug Ierardi, John K. Salmon, Ron O. Dror, David E. Shaw |
Simulation and embedded software development for Anton, a parallel machine with heterogeneous multicore ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 125-130, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Anton, simulation, embedded software, special-purpose hardware |
15 | Michelle Brown, Kenneth W. Hsu |
A novel 5.46 mW H.264/AVC video stream parser IC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: 21st Annual IEEE International SoC Conference, SoCC 2008, September 17-20, 2008, Radisson Hotel, Newport Beach, CA, USA, Proceedings, pp. 197-200, 2008, IEEE, 978-1-4244-2596-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
15 | John R. Feehrer, Paul Rotker, Milton Shih, Paul Gingras, Peter Yakutis, Stephen Phillips, John Heath, Sebastian Turullols |
Coherency Hub Design for Multi-Node Victoria Falls Server Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hot Interconnects ![In: 16th Annual IEEE Symposium on High Performance Interconnects (HOTI 2008), 26-28 August 2008, Stanford, CA, USA, pp. 43-50, 2008, IEEE Computer Society, 978-0-7695-3380-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multi-threaded processor cores, multi-node CMT systems, serial interconnects, packet switching, cache coherency |
15 | Chao Huang, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha |
Generation of Heterogeneous Distributed Architectures for Memory-Intensive Applications Through High-Level Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 15(11), pp. 1191-1204, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Satish Sivaswamy, Kia Bazargan |
Variation-aware routing for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, FPGA 2007, Monterey, California, USA, February 18-20, 2007, pp. 71-79, 2007, ACM, 978-1-59593-600-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
statistical timing analysis, FPGA routing |
15 | Gopinath Balakrishnan, Mei Yang, Yingtao Jiang, Yoohwan Kim |
Performance Analysis of Error Control Codes for Wireless Sensor Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Fourth International Conference on Information Technology: New Generations (ITNG 2007), 2-4 April 2007, Las Vegas, Nevada, USA, pp. 876-879, 2007, IEEE Computer Society, 978-0-7695-2776-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Adrian Stoica, Didier Keymeulen, Ricardo Salem Zebulum, Mohammad M. Mojarradi, Srinivas Katkoori, Taher Daud |
Adaptive and Evolvable Analog Electronics for Space Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICES ![In: Evolvable Systems: From Biology to Hardware, 7th International Conference, ICES 2007, Wuhan, China, September 21-23, 2007, Proceedings, pp. 379-390, 2007, Springer, 978-3-540-74625-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Adaptive Hardware, Field Programmable Arrays |
15 | Lili Zhou, Cherry Wakayama, Robin Panda, Nuttorn Jangkrajarng, Bo Hu, C.-J. Richard Shi |
Implementing a 2-Gbs 1024-bit 1/2-rate low-density parity-check code decoder in three-dimensional integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings, pp. 194-201, 2007, IEEE, 1-4244-1258-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Hans Kristian Otnes Berge, Philipp Häfliger |
High-Speed Serial AER on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 857-860, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | X. Cano, Sebastià A. Bota, Ricardo Graciani Diaz, David Gascon, A. Herms, Albert Comerma, Jaume Segura 0001, Lluís Garrido |
Heavy Ion Test Results in a CMOS triple Voting Register for a High-Energy Physics Experiment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 8-11 July 2007, Heraklion, Crete, Greece, pp. 183-184, 2007, IEEE Computer Society, 0-7695-2918-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Anatoly O. Melnyk, Andriy Salo |
Automatic generation of ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), August 5-8, 2007, University of Edinburgh, Scotland, United Kingdom, pp. 311-317, 2007, IEEE Computer Society, 0-7695-2866-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Shih-Wei Liao, Shih-Hao Hung, Chia-Heng Tu, Jen-Hao Chen |
Scalable Lossless High Definition Image Coding on Multicore Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing, International Conference, EUC 2007, Taipei, Taiwan, December 17-20, 2007, Proceedings, pp. 742-753, 2007, Springer, 978-3-540-77091-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Multicore SoC, Image Decompress, Embedded System, Parallelization, Image Compress, JPEG2000, Lossless, Digital Cinema |
15 | Huai-Yi Hsu, Jih-Chiang Yeo, An-Yeu Wu |
Multi-Symbol-Sliced Dynamically Reconfigurable Reed-Solomon Decoder Design Based on Unified Finite-Field Processing Element. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(5), pp. 489-500, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Amit Kumar Gupta, Saeid Nooshabadi, David Taubman, Michael Dyer |
Realizing Low-Cost High-Throughput General-Purpose Block Encoder for JPEG2000. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. Video Technol. ![In: IEEE Trans. Circuits Syst. Video Technol. 16(7), pp. 843-858, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | David H. Goldberg, Andreas G. Andreou, Pedro Julián, Philippe O. Pouliquen, Laurence Riddle, Rich Rosasco |
VLSI implementation of an energy-aware wake-up detector for an acoustic surveillance sensor network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Sens. Networks ![In: ACM Trans. Sens. Networks 2(4), pp. 594-611, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Wake-up, acoustic surveillance, sensor networks, power management, periodicity, VLSI implementation, vehicle detection |
15 | Götz Kappen, Tobias G. Noll |
Application specific instruction processor based implementation of a GNSS receiver on an FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE Designers' Forum ![In: Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 58-63, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-0-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Ari Kulmala, Timo D. Hämäläinen, Marko Hännikäinen |
Reliable GALS Implementation of MPEG-4 Encoder with Mixed Clock FIFO on Standard FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-6, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Pil Woo Chun, Lev Kirischian |
A Framework for a Dynamically Reconfigurable System in a Parallel Multi-Tasking Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-2, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Owen Callanan, David Gregg, Andy Nisbet, Mike Peardon |
High Performance Scientific Computing Using FPGAs with IEEE Floating Point and Logarithmic Arithmetic for Lattice QCD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-6, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Tjerk Bijlsma, Pascal T. Wolkotte, Gerard J. M. Smit |
An optimal architecture for a DDC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | George Economakos |
High-level synthesis with reconfigurable datapath components. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Mustafa Gök, Çaglar Yilmaz |
Hardware Designs for Local Alignment of Protein Sequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCIS ![In: Computer and Information Sciences - ISCIS 2006, 21th International Symposium, Istanbul, Turkey, November 1-3, 2006, Proceedings, pp. 277-285, 2006, Springer, 3-540-47242-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Axel Reimer, Arne Schulz, Wolfgang Nebel |
Modelling macromodules for high-level dynamic power estimation of FPGA-based digital designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006, pp. 151-154, 2006, ACM, 1-59593-462-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
FPGA power estimation, RT-level power modeling, high-level power estimation |
15 | Paul Gruijters, Bertrand Vandewiele |
Algorithm Partitioning and SoC Design for OFDM Communication Systems Using Multiple Application Specific Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISM ![In: Eigth IEEE International Symposium on Multimedia (ISM 2006), 11-13 December 2006, San Diego, CA, USA, pp. 481-487, 2006, IEEE Computer Society, 0-7695-2746-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Michael D. Linderman, Teresa H. Meng |
A low power merge cell processor for real-time spike sorting in implantable neural prostheses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Yuan-Sun Chu, Hui-Kai Su, Po-Feng Lin, Ming-Jen Chen |
High speed routing lookup IC design for IPv6. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Yu-Jung Huang, Yang-Shih Lin, Kuang-Yu Hung, Kuo-Chen Lin |
Efficient Implementation of AES IP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 1418-1421, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Kui Wang, Lian Duan, Xu Cheng |
ExtensiveSlackBalance: an approach to make front-end tools aware of clock skew scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 951-954, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
back-annotation, skew scheduling, logic synthesis, clock skew |
15 | Paul Villarrubia |
Physical design tools for hierarchy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2005 International Symposium on Physical Design, ISPD 2005, San Francisco, California, USA, April 3-6, 2005, pp. 184, 2005, ACM, 1-59593-021-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Mohammed Javed Absar, Pol Marchal, Francky Catthoor |
Data-Access Optimization of Embedded Systems Through Selective Inlining Transformation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESTIMedia ![In: Proceedings of the 2005 3rd Workshop on Embedded Systems for Real-Time Multimedia, ESTIMedia 2005, September 22-23, 2005, New York Metropolitan Area, USA, pp. 75-80, 2005, IEEE Computer Society, 0-7803-9347-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Ruchir Puri, David S. Kung 0001, Leon Stok |
Minimizing power with flexible voltage islands. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 21-24, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Jung-Ho Kim, Dong Sam Ha, Jeffrey H. Reed |
A new reconfigurable modem architecture for 3G multi-standard wireless communication systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 1051-1054, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Subhrajit Bhattacharya, John A. Darringer, Daniel L. Ostapko, Youngsoo Shin |
A Mask Reuse Methodology for Reducing System-on-a-Chip Cost. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 482-487, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Gaurav Kumar Varshney, Sreeram Chandrasekar |
An Efficient Methodology for Noise Characterization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 330-335, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Pierre G. Paulin |
DATE Panel: Chips of the Future: Soft, Crunchy or Hard? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 844-851, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Klaus Winkelmann, Hans-Joachim Trylus, Dominik Stoffel, Görschwin Fey |
Cost-Efficient Block Verification for a UMTS Up-Link Chip-Rate Coprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 162-167, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Nikhil Jayakumar, Sunil P. Khatri |
A metal and via maskset programmable VLSI design methodology using PLAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 590-594, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Bill Eklow |
What Do You Mean My Board Test Stinks? ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 1423, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Sandip Kundu, T. M. Mak, Rajesh Galivanche |
Trends in manufacturing test methods and their implications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 679-687, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Seetharaman Ramachandran, S. Srinivasan 0001 |
Design and FPGA Implementation of a Video Scalar with on-chip reduced memory utilization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), Architectures, Methods and Tools, 3-5 September 2003, Belek-Antalya, Turkey, pp. 206-213, 2003, IEEE Computer Society, 0-7695-2003-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Patrick Lysaght |
Future Design Tools for Platform FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2003, Sao Paulo, Brazil, September 8-11, 2003, pp. 275-, 2003, IEEE Computer Society, 0-7695-2009-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Youhei Zenda, Koji Nakamae, Hiromu Fujioka |
Cost Optimum Embedded DRAM Design by Yield Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTDT ![In: 11th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2003), 28-29 July 2003, San Jose, CA, USA, pp. 20-, 2003, IEEE Computer Society, 0-7695-2004-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Patrick R. Schulz, Ulrich Brüning 0001, Gunter Strube |
SEED2002 Support of Educational course for Electronic Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: 2003 International Conference on Microelectronics Systems Education, MSE 2003, Educating Tomorrow's Microsystems Designers, Anaheim, CA, USA, June 1-2, 2003, pp. 53-54, 2003, IEEE Computer Society, 0-7695-1973-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Chen Chang, Kimmo Kuusilinna, Brian C. Richards, Allen Chen, Nathan Chan, Robert W. Brodersen, Borivoje Nikolic |
Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA, pp. 148-, 2003, IEEE Computer Society, 0-7695-1943-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Ya-Lan Tsao, Ming Hsuan Tan, Jun-Xian Teng, Shyh-Jye Jou |
Parameterized and low power DSP core for embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 265-268, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Terry Tao Ye, Giovanni De Micheli |
Physical Planning for On-Chip Multiprocessor Networks and Switch Fabrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 14th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2003), 24-26 June 2003, The Hague, The Netherlands, pp. 97-107, 2003, IEEE Computer Society, 0-7695-1992-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Nicolas Sklavos 0001, Alexander A. Moldovyan, Odysseas G. Koufopavlou |
Encryption and Data Dependent Permutations: Implementation Cost and Performance Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MMM-ACNS ![In: Computer Network Security, Second International Workshop on Mathematical Methods, Models, and Architectures for Computer Network Security, MMM-ACNS 2003, St. Petersburg, Russia, September 21-23, 2003, Proceedings, pp. 337-348, 2003, Springer, 3-540-40797-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
DDP Transformations, CIKS-1, Block Cipher, Hardware Implementations, SPECTR-H64 |
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