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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 1754 occurrences of 998 keywords
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Results
Found 2330 publication records. Showing 2330 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
21 | Keith M. Carrig, Albert M. Chu, Frank D. Ferraiolo, John G. Petrovick, P. Andrew Scott, Richard J. Weiss |
A Clock Methodology for High-Performance Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 16(2-3), pp. 217-224, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
21 | Andreas Unger, Eberhard Zehendner |
Tuning the GNU Instruction Scheduler to Superscalar Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 23rd EUROMICRO Conference '97, New Frontiers of Information Technology, 1-4 September 1997, Budapest, Hungary, pp. 275-282, 1997, IEEE Computer Society, 0-8186-8129-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
21 | Vivek Tiwari, Ryan Donnelly, Sharad Malik, Ricardo Gonzalez |
Dynamic Power Management for Microprocessors: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 185-192, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
21 | Janusz Sosnowski, A. Kusmierczyk |
Pseudorandom Testing of Microprocessors an Instruction/Data Flow Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDCC ![In: Dependable Computing - EDCC-2, Second European Dependable Computing Conference, Taormina, Italy, October 2-4, 1996, Proceedings, pp. 246-263, 1996, Springer, 3-540-61772-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
21 | Kenneth M. Wilson, Kunle Olukotun, Mendel Rosenblum |
Increasing Cache Port Efficiency for Dynamic Superscalar Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 23rd Annual International Symposium on Computer Architecture, Philadelphia, PA, USA, May 22-24, 1996, pp. 147-157, 1996, ACM, 0-89791-786-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
21 | Doug Burger, James R. Goodman, Alain Kägi |
Memory Bandwidth Limitations of Future Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 23rd Annual International Symposium on Computer Architecture, Philadelphia, PA, USA, May 22-24, 1996, pp. 78-89, 1996, ACM, 0-89791-786-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
21 | Shantanu Ganguly, Shervin Hojat |
Clock distribution design and verification for PowerPC microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1995, San Jose, California, USA, November 5-9, 1995, pp. 58-61, 1995, IEEE Computer Society / ACM, 0-8186-7213-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
PowerPC |
21 | El-Sayed A. Talkhan, Aly M. H. Ahmed, Aly E. Salama |
Microprocessors functional testing techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(3), pp. 316-318, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
21 | John Whiting, Sandy Newman |
Microprocessors in CRT terminals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS National Computer Conference ![In: American Federation of Information Processing Societies: 1975 National Computer Conference, 19-22 May 1975, Anaheim, CA, USA, pp. 41-45, 1975, AFIPS Press, 978-1-4503-7919-9. The full citation details ...](Pics/full.jpeg) |
1975 |
DBLP DOI BibTeX RDF |
|
21 | Dan Knights, Todd Mytkowicz, Peter F. Sweeney, Michael C. Mozer, Amer Diwan |
Blind Optimization for Exploiting Hardware Features. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CC ![In: Compiler Construction, 18th International Conference, CC 2009, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009, York, UK, March 22-29, 2009. Proceedings, pp. 251-265, 2009, Springer, 978-3-642-00721-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
21 | Fang Lu, Lei Wang 0004, Xiaobing Feng 0002, Zhiyuan Li 0001, Zhaoqing Zhang |
Exploiting idle register classes for fast spill destination. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 22nd Annual International Conference on Supercomputing, ICS 2008, Island of Kos, Greece, June 7-12, 2008, pp. 319-326, 2008, ACM, 978-1-60558-158-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
spilling cost, data transfer |
21 | Tommy Bojan, Igor Frumkin, Robert Mauri |
Intel First Ever Converged Core Functional Validation Experience: Methodologies, Challenges, Results and Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 85-90, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Matthew Curtis-Maury, Karan Singh, Sally A. McKee, Filip Blagojevic, Dimitrios S. Nikolopoulos, Bronis R. de Supinski, Martin Schulz 0001 |
Identifying energy-efficient concurrency levels using machine learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: Proceedings of the 2007 IEEE International Conference on Cluster Computing, 17-20 September 2007, Austin, Texas, USA, pp. 488-495, 2007, IEEE Computer Society, 978-1-4244-1387-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Yi-Ping You, Chingren Lee, Jenq Kuen Lee |
Compilers for leakage power reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 11(1), pp. 147-164, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Compilers for low power, power-gating mechanisms, leakage-power reduction |
21 | Jaime H. Moreno |
Chip-level integration: the new frontier for microprocessor architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2006: Proceedings of the 18th Annual ACM Symposium on Parallelism in Algorithms and Architectures, Cambridge, Massachusetts, USA, July 30 - August 2, 2006, pp. 328, 2006, ACM, 1-59593-452-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
chip-level integration, microprocessor architecture |
21 | Kostadin Damevski, Steven G. Parker |
Imprecise Exceptions in Distributed Parallel Components. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2004 Parallel Processing, 10th International Euro-Par Conference, Pisa, Italy, August 31-September 3, 2004, Proceedings, pp. 108-116, 2004, Springer, 3-540-22924-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Yu-Fai Fung, Muhammet Fikret Ercan, Wai-leung Cheung, Gujit Singh |
Avenues for High Performance Computation on a PC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSA (2) ![In: Computational Science and Its Applications - ICCSA 2004, International Conference, Assisi, Italy, May 14-17, 2004, Proceedings, Part II, pp. 246-251, 2004, Springer, 3-540-22056-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Theo Ungerer, Borut Robic, Jurij Silc |
A survey of processors with explicit multithreading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Comput. Surv. ![In: ACM Comput. Surv. 35(1), pp. 29-63, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
interleaved multithreading, simultaneous multithreading, Blocked multithreading |
21 | Ing-Jer Huang, Ping-Huei Xie |
Application of instruction analysis/scheduling techniques to resource allocation of superscalar processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 10(1), pp. 44-54, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Praveen Parvathala, Kaila Maneparambil, William Lindsay |
FRITS - A Microprocessor Functional BIST Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 590-598, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Jack W. Davidson, Sanjay Jinturkar |
Memory Access Coalescing: A technique for Eliminating Redundant memory Accesses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN'94 Conference on Programming Language Design and Implementation (PLDI), Orlando, Florida, USA, June 20-24, 1994, pp. 186-195, 1994, ACM, 0-89791-662-X. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
21 | Bruce E. Stock, Miguel A. Ulloa |
Development of a microprocessor support facility for large organizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS National Computer Conference ![In: American Federation of Information Processing Societies: 1980 National Computer Conference, 19-22 May 1980, Anaheim, California, USA, pp. 473-478, 1980, AFIPS Press, 978-1-4503-7923-6. The full citation details ...](Pics/full.jpeg) |
1980 |
DBLP DOI BibTeX RDF |
|
17 | Christophe Dubach, Timothy M. Jones 0001, Michael F. P. O'Boyle |
An Empirical Architecture-Centric Approach to Microarchitectural Design Space Exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 60(10), pp. 1445-1458, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
Microprocessors and microcomputers, machine learning, modeling techniques, performance analysis and design aids |
17 | Krste Asanovic, Ralph Wittig |
Guest Editors' Introduction: Hot Chips 21. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 30(2), pp. 5-6, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
parallel computing, multicore, microprocessors, hardware, accelerators, MEMS |
17 | Zhimin Chen 0002, Richard Neil Pittman, Alessandro Forin |
Combining multicore and reconfigurable instruction set extensions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010, pp. 33-36, 2010, ACM, 978-1-60558-911-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
extensible microprocessors, reconfigurable instruction set extensions, embedded, multi-core |
17 | Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bird, Krste Asanovic, David A. Patterson 0001 |
A case for FAME: FPGA architecture model execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 37th International Symposium on Computer Architecture (ISCA 2010), June 19-23, 2010, Saint-Malo, France, pp. 290-301, 2010, ACM, 978-1-4503-0053-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
simulation, fpga, microprocessors |
17 | Raj Amirtharajah, John R. Mashey |
Guest Editors' Introduction: Hot Chips 19. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 28(2), pp. 7-9, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
wireless HD, fault tolerance, mobile computing, low-power, GPU, computer architecture, microprocessors, mainframe computing, Hot Chips 19 |
17 | Sung Woo Chung, Kevin Skadron |
On-Demand Solution to Minimize I-Cache Leakage Energy with Maintaining Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 57(1), pp. 7-24, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Low-power design, Microprocessors, Cache memories, Energy-aware systems |
17 | Toshinori Sato, Shingo Watanabe |
Instruction Scheduling for Variation-Originated Variable Latencies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 361-364, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
variable latency adder, long latency adder, instruction criticality, microprocessors, parameter variations |
17 | David H. Albonesi |
Editor in Chief's Message: Truly "hot" chips - Do we still care? ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 27(2), pp. 4-5, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
high-performance microprocessors, power management, power-aware architectures, multicore chips |
17 | John Kubiatowicz, Howard Sachs |
Guest Editors' Introduction: Hot Chips 18. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 27(2), pp. 7-9, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
communications, embedded systems, networking, power management, microprocessors, multicore systems |
17 | Robert P. Colwell |
The Pentium Chronicles: Introduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 39(1), pp. 49-54, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Professional conduct, P6 microarchitecture, Project management, Microprocessors |
17 | Linda Dailey Paulson |
News Briefs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 39(1), pp. 24-26, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
AMD, chip-making technology, sports technology, Subdue program, Data mining, optical networks, microprocessors, pattern analysis, Intel, sensor technology |
17 | Poonacha Kongetira, Kathirgamar Aingaran, Kunle Olukotun |
Niagara: A 32-Way Multithreaded Sparc Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 25(2), pp. 21-29, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Microprocessors and microcomputers, Shared memory, Multithreaded processors |
17 | Jon Beecroft, David Addison, David Hewson, Moray McLaren, Duncan Roweth, Fabrizio Petrini, Jarek Nieplocha |
QsNetII: Defining High-Performance Network Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 25(4), pp. 34-47, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Microprocessors and microcomputers, Network connectivity chips, Communication Protocols, Supercomputers, Clusters of Workstations |
17 | Steve Leibson, James Kim |
Configurable Processors: A New Era in Chip Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 38(7), pp. 51-59, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
nanometer silicon lithography, microprocessors, multiprocessor systems, MPSoCs, configurable processors |
17 | Rakesh Kumar 0002, Dean M. Tullsen, Norman P. Jouppi, Parthasarathy Ranganathan |
Heterogeneous Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 38(11), pp. 32-38, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Multicore microprocessors, Multiprocessors, Chip multiprocessors, CMP, Heterogeneity, System architectures, Power-aware computing |
17 | Linda Dailey Paulson |
Technology News: Will Hard Drives Finally Stop Shrinking? ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 38(5), pp. 14-16, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
minidrives, microprocessors, flash memory |
17 | Linda Dailey Paulson |
News Briefs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 38(7), pp. 24-26, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Globus Alliance, Global Grid Forum, ransomware, essay-grading software, predictive model-building, self-replicating robots, grid computing, robotics, standards, software, microprocessors, Web security, hackers |
17 | Mario Diaz-Nava, Patrick Blouet, Philippe Teninge, Marcello Coppola, Tarek Ben Ismail, Samuel Picchiottino, Robin Wilson |
An Open Platform for Developing Multiprocessor SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 38(7), pp. 60-67, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
hardware emulation platform, computing nodes, HW/SW development, microprocessors, multiprocessor systems, MPSoCs, network interfaces |
17 | Ahmed Amine Jerraya, Hannu Tenhunen, Wayne H. Wolf |
Guest Editors' Introduction: Multiprocessor Systems-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 38(7), pp. 36-40, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
SoCs, microprocessors, multiprocessor systems, MPSoCs, chip design, VLSI technology |
17 | Ioannis Panagopoulos, Christos Pavlatos, George K. Papakonstantinou |
A hardware extension of the RISC microprocessor for Attribute Grammar evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2004 ACM Symposium on Applied Computing (SAC), Nicosia, Cyprus, March 14-17, 2004, pp. 897-904, 2004, ACM, 1-58113-812-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
RISC microprocessors, Attribute Grammars, declarative programs |
17 | Rajat Gupta |
Digital Design: The components of a new paradigm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 877-, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
design for testability, logic design, Design methodology, microprocessors, digital integrated circuits |
17 | Magdy S. Abadir, Ken Albin, John Havlicek, Narayanan Krishnamurthy, Andrew K. Martin |
Formal Verification Successes at Motorola. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 22(2), pp. 117-123, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
verification, microprocessors, formal, properties |
17 | Rajeev Balasubramonian, David H. Albonesi, Alper Buyuktosunoglu, Sandhya Dwarkadas |
A Dynamically Tunable Memory Hierarchy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(10), pp. 1243-1258, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
High performance microprocessors, energy and performance of on-chip caches, memory hierarchy, reconfigurable architectures |
17 | Harald Yndestad |
MIPROC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
History of Nordic Computing ![In: History of Nordic Computing, IFIP WG9.7 First Working Conference on the History of Nordic Computing (HiNC1), June 16-18, 2003, Trondheim, Norway, pp. 289-296, 2003, Springer, 0-387-24167-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
computer hardware, MIPROC, Microprocessors |
17 | Kevin Skadron, Tarek F. Abdelzaher, Mircea R. Stan |
Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), Boston, Massachusettes, USA, February 2-6, 2002, pp. 17-28, 2002, IEEE Computer Society, 0-7695-1525-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
thermal modeling and management, formal feedback control theory, performance, power, microprocessors |
17 | Lawrence T. Clark, Neil Deutscher, Shay Demmons, Franco Ricci |
Standby power management for a 0.18µm microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002, pp. 7-12, 2002, ACM, 1-58113-475-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
body effect, low power, microprocessors |
17 | Wael El-Essawy, David H. Albonesi, Balaram Sinharoy |
A microarchitectural-level step-power analysis tool. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002, pp. 263-266, 2002, ACM, 1-58113-475-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Ldi/dt, step-power, microprocessors, clock-gating, architectural simulation, inductive noise |
17 | William C. Athas, Lynn Youngs, Andrew Reinhart |
Compact models for estimating microprocessor frequency and power. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002, pp. 313-318, 2002, ACM, 1-58113-475-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
VLSI, low-power, microprocessors, ASIC, power estimation, curve-fitting, delay modeling |
17 | Rory McInerney, Kurt Leeper, Troy Hill, Heming Chan, Bulent Basaran, Lance McQuiddy |
Methodology for repeater insertion management in the RTL, layout, floorplan and fullchip timing databases of the Itanium microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2000 International Symposium on Physical Design, ISPD 2000, San Diego, CA, USA, April 9-12, 2000, pp. 99-104, 2000, ACM, 1-58113-191-7. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
RC delay, routing, timing, estimation, microprocessors, floorplan, repeaters |
17 | William C. Athas |
Practical considerations of clock-powered logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000, Rapallo, Italy, July 25-27, 2000, pp. 173-178, 2000, ACM, 1-58113-190-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
ER-CMOS, adiabatic charging, clock-powered logic, energy-recovery CMOS, supply-voltage scaling, microprocessors |
17 | Ruby B. Lee |
Subword Permutation Instructions for Two-Dimensional Multimedia Processing in MicroSIMD Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 12th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2000), 10-12 July 2000, Boston, MA, USA, pp. 3-14, 2000, IEEE Computer Society, 0-7695-0716-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
microSIMD, multimedia, microprocessors, computer arithmetic, permutations, processors, digital signal processors, Instruction Set Architecture, fine-grain parallelism, subword parallelism, media processors |
17 | Alan J. Drake, Todd D. Basso, Spencer M. Gold, Keith L. Kraver, Phiroze N. Parakh, Claude R. Gauthier, P. Sean Stetson, Richard B. Brown |
CGaAs PowerPC FXU. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 730-735, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
design methodology, microprocessors, testing methodology, Gallium Arsenide |
17 | Lucian Codrescu, Mondira Deb Pant, Tarek M. Taha, John Eble, D. Scott Wills, James D. Meindl |
Exploring Microprocessor Architectures for Gigascale Integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 18th Conference on Advanced Research in VLSI (ARVLSI '99), 21-24 March 1999, Atlanta, GA, USA, pp. 242-255, 1999, IEEE Computer Society, 0-7695-0056-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Billion Transistor, Future Tecnologies, Architecture, Microprocessors |
17 | Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino |
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 19-21 February 1998, Lafayette, LA, USA, pp. 8-12, 1998, IEEE Computer Society, 0-8186-8409-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Low-Power Design, Microprocessors |
17 | Stephen B. Furber, Jim D. Garside, Steve Temple, Jianwei Liu, Paul Day, N. C. Paver |
AMULET2e: An Asynchronous Embedded Controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '97), 7-10 April 1997, Eindhoven, The Netherlands, pp. 290-, 1997, IEEE Computer Society, 0-8186-7922-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Low power, Microprocessors, Asynchronous design, Embedded control |
17 | Kathryn S. McKinley, Steve Carr 0001, Chau-Wen Tseng |
Improving Data Locality with Loop Transformations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Program. Lang. Syst. ![In: ACM Trans. Program. Lang. Syst. 18(4), pp. 424-453, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
loop distribution, loop permutation, loop reversal, simulation, Cache, microprocessors, compiler optimization, data locality, loop transformations, loop fusion |
17 | Pai H. Chou, Ross B. Ortega, Gaetano Borriello |
The Chinook hardware/software co-synthesis system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSS ![In: Proceedings of the 8th International Symposium on System Synthesis (ISSS 1995), September 13-15, 1995, Cannes, France, pp. 22-27, 1995, ACM, 0-89791-771-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
Chinook hardware/software co-synthesis system, custom logic, design co-simulation, design time constraints, embedded controller design, error-prone tasks, function migration, interface hardware, interface software, system components integration, real-time systems, software tools, logic design, microprocessors, logic CAD, microcontrollers, computer-aided design tools |
17 | Michael F. Deering, Scott R. Nelson |
Leo: a system for cost effective 3D shaded graphics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGGRAPH ![In: Proceedings of the 20th Annual Conference on Computer Graphics and Interactive Techniques, SIGGRAPH 1993, Anaheim, CA, USA, August 2-6, 1993, pp. 101-108, 1993, ACM, 0-89791-601-8. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
antialiased lines, floating-point microprocessors, gouraud shading, parallel graphics algorithms, rendering, 3D graphics hardware |
17 | Veljko M. Milutinovic, Mark Bettinger, Walter A. Helbig |
Multiplier/Shifter Design Tradeoffs in a 32-bit Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 38(6), pp. 874-881, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
full barrel shifter, large register file, GaAs microprocessor, logic design, microprocessors, microprocessor chips, design tradeoffs, 32 bits, single chip, bit-serial multiplier |
17 | John L. Hennessy |
VLSI Processor Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 33(12), pp. 1221-1246, 1984. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP DOI BibTeX RDF |
instruction issue, processor implementation, VLSI, pipelining, microprocessors, processor architecture, Computer organization, memory mapping, instruction set design |
17 | George W. Cox, William M. Corwin, Konrad K. Lai, Fred J. Pollack |
Interprocess Communication and Processor Dispatching on the Intel 432 ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 1(1), pp. 45-66, 1983. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
dispatching and scheduling, object-based microprocessors, Internet, microarchitecture, interprocess communication |
17 | Alexander R. Bazelow, Jaan Raamot |
On the Microprocessor Solution of Ordinary Differential Equations Using Integer Arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 32(2), pp. 204-207, 1983. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
coupled microprocessors, incremental calculation, Algorithm, errors, differential equation, numerical method, integer arithmetic, contour following |
17 | Richard R. Shively |
Architecture of a Programmable Digital Signal Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 31(1), pp. 16-22, 1982. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP DOI BibTeX RDF |
signal processors, concurrent subprocessors, real-time, Architecture, microprocessors |
17 | Tomlinson Gene Rauscher, Phillip M. Adams |
Microprogramming: A Tutorial and Survey of Recent Developments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 29(1), pp. 2-20, 1980. The full citation details ...](Pics/full.jpeg) |
1980 |
DBLP DOI BibTeX RDF |
microprogramming applications, Bit slice microprocessors, dynamic microprogramming, microprogrammability |
17 | James E. Allchin, Arthur M. Keller, Gio Wiederhold |
FLASH: A Language-Independent, Portable File Access System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMOD Conference ![In: Proceedings of the 1980 ACM SIGMOD International Conference on Management of Data, Santa Monica, California, USA, May 14-16, 1980., pp. 151-156, 1980, ACM Press. The full citation details ...](Pics/full.jpeg) |
1980 |
DBLP DOI BibTeX RDF |
ISAM, Indexed sequential, VSAM, concurrent update, multiple indexes, multiple language, databases, microprocessors, portable, files |
14 | |
Retraction notice to "real-time monitoring of the athlete's musculoskeletal health based on an embedded processor" [Microprocessors and Microsystems 81 (2021) 103742]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 104, pp. 104997, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | |
Retraction notice to 'Medical IoT system platform and elderly patients' femoral shaft fracture nursing': [Microprocessors and Microsystems 82 (2021) 103868]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 104, pp. 105004, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | |
Retraction notice to "An Improved Multilayer Perceptron Approach for Detecting Sugarcane Yield Production in IoT based Smart Agriculture" [Microprocessors and Microsystems 82 (2021) 103822]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 104, pp. 105002, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | |
Retraction notice to "Design of Sino-Japanese cross border e-commerce platform based on FPGA and data mining " [Microprocessors and Microsystems 80 (2021) 103360]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 104, pp. 105003, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | |
Retraction notice to "Design of Embedded Digital Image Processing System Based on Zynq" [Microprocessors and Microsystems 83 (2021) 104005]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 104, pp. 105000, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | |
Retraction notice to "Intelligent control for new topological structure of Z-Source inverter based on ARM" [Microprocessors and Microsystems 81 (2021) 103735]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 104, pp. 105001, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | |
Retraction notice to "Optimization of Storage Location Assignment in Automated Warehouse" [Microprocessors and Microsystems 80 (2021)103356]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 104, pp. 104995, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | |
Retraction notice to "FPGA implementation of PMSG based AC conversion using soft switching twin-mode PWM/FPGA control for high power IM application" [Microprocessors and Microsystems 75 (2020) 103044]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 104, pp. 104977, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | |
Retraction notice to "Searching and Learning English Translation Long Text Information Based on Heterogeneous Multiprocessors and Data Mining" [Microprocessors and Microsystems 82 (2021) 103895]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 104, pp. 104999, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | |
Retraction notice to "Business English visualization system based on video surveillance and the internet of things" [Microprocessors and Microsystems 80 (2021) 103639]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 104, pp. 104996, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | Pablo R. Bodmann, George Papadimitriou 0001, Rubens Luiz Rech Junior, Dimitris Gizopoulos, Paolo Rech |
Soft Error Effects on Arm Microprocessors: Early Estimations Versus Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 56(7), pp. 4-6, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | |
Retraction notice to "Applications of internet of things (IOT) to improve the stability of a grid connected power system using interline power flow controller" [Microprocessors and Microsystems 76 (2020) 103038]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 103, pp. 104941, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | |
Retraction notice to "Application of Machine Learning and Big Data in Doubly Fed Induction Generator based Stability Analysis of Multi Machine System using Substantial Transformative Optimization Algorithm" [Microprocessors and Microsystems 73 (2020) 102971]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 103, pp. 104942, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Anson Ho, Ege Erdil, Tamay Besiroglu |
Limits to the Energy Efficiency of CMOS Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2312.08595, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | José Rodrigo Azambuja, Fernando Sousa, Lucas Rosa, Fernanda Lima Kastensmidt |
Evaluating the Efficiency of Software-only Techniques to Detect SEU and SET in Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2309.16876, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Haibin Lv, Enrico Natalizio, Houbing Song, Shehzad Ashraf 0001 |
Guest Editorial Medical Image Analysis Embedded on Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Biomed. Health Informatics ![In: IEEE J. Biomed. Health Informatics 27(3), pp. 1152-1153, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Nikolaos Ioannis Deligiannis, Tobias Faller, Iacopo Guglielminetti, Riccardo Cantoro, Bernd Becker 0001, Matteo Sonza Reorda |
Automatic Identification of Functionally Untestable Cell-Aware Faults in Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATS ![In: 32nd IEEE Asian Test Symposium, ATS 2023, Beijing, China, October 14-17, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-0310-0. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Kai Feng, Jianjie Wang, Min Tang |
An Accurate Deep Learning-Based Thermal Reconstruction Technique for Microprocessors Using Embedded Sensors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTA ![In: IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2023, Hefei, China, October 27-29, 2023, pp. 174-175, 2023, IEEE, 979-8-3503-4428-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Miroslav N. Velev |
Automatic Formal Verification of RISC-V Pipelined Microprocessors with Fault Tolerance by Spatial Redundancy at a High Level of Abstraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
iFM ![In: iFM 2023 - 18th International Conference, iFM 2023, Leiden, The Netherlands, November 13-15, 2023, Proceedings, pp. 193-213, 2023, Springer, 978-3-031-47704-1. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Dheeraj N. Naraharisetti, Ramesh K. Karne, Joel Weymouth, Alexander L. Wijesinha |
Obsolescence in Operating Systems and Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SERA ![In: 21st IEEE/ACIS International Conference on Software Engineering Research, Management and Applications, SERA 2023, Orlando, FL, USA, May 23-25, 2023, pp. 110-115, 2023, IEEE, 979-8-3503-4588-9. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Alessandro Palumbo, Luca Cassano, Pedro Reviriego, Marco Ottavi |
Improving the Detection of Hardware Trojan Horses in Microprocessors via Hamming Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023, Juan-Les-Pins, France, October 3-5, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-1500-4. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Alessandro Palumbo, Marco Ottavi, Luca Cassano |
Built-in Software Obfuscation for Protecting Microprocessors against Hardware Trojan Horses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023, Juan-Les-Pins, France, October 3-5, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-1500-4. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Anson Ho, Ege Erdil, Tamay Besiroglu |
Limits to the Energy Efficiency of CMOS Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICRC ![In: IEEE International Conference on Rebooting Computing, ICRC 2023, San Diego, CA, USA, December 5-6, 2023, pp. 1-10, 2023, IEEE, 979-8-3503-8204-4. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Jonathan Certes |
Méthodes et modèles pour la vérification formelle de l'attestation à distance sur microprocesseur. (Method and models for formal verification of remote attestation on microprocessors). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2023 |
RDF |
|
14 | Xiangyu Mao, Yan Lu 0002, Rui Paulo Martins |
A Scalable High-Current High-Accuracy Dual-Loop Four-Phase Switching LDO for Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 57(6), pp. 1841-1853, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Pablo Bodmann, George Papadimitriou 0001, Rubens Luiz Rech Junior, Dimitris Gizopoulos, Paolo Rech |
Soft Error Effects on Arm Microprocessors: Early Estimations versus Chip Measurements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 71(10), pp. 2358-2369, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Jinwei Zhang, Sheriff Sadiqbatcha, Michael O'Dea, Hussam Amrouch, Sheldon X.-D. Tan |
Full-Chip Power Density and Thermal Map Characterization for Commercial Microprocessors Under Heat Sink Cooling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(5), pp. 1453-1466, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Matthew P. Manary, Sean P. Willems |
Data Set: 187 Weeks of Customer Forecasts and Orders for Microprocessors from Intel Corporation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Manuf. Serv. Oper. Manag. ![In: Manuf. Serv. Oper. Manag. 24(1), pp. 682-689, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Aleksa Damljanovic, Annachiara Ruospo, Ernesto Sánchez 0001, Giovanni Squillero |
Machine learning for hardware security: Classifier-based identification of Trojans in pipelined microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Appl. Soft Comput. ![In: Appl. Soft Comput. 116, pp. 108068, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Luca Cassano, Mattia Iamundo, Tomas Antonio Lopez, Alessandro Nazzari, Giorgio Di Natale |
DETON: DEfeating hardware Trojan horses in microprocessors through software ObfuscatioN. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Syst. Archit. ![In: J. Syst. Archit. 129, pp. 102592, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Luca Cassano, Elia Lazzeri, Nikita Litovchenko, Giorgio Di Natale |
On the optimization of Software Obfuscation against Hardware Trojans in Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2022, Prague, Czech Republic, April 6-8, 2022, pp. 172-177, 2022, IEEE, 978-1-6654-9431-1. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Michael Pöhnl, Alban Tamisier, Tobias Blass |
A Middleware Journey from Microcontrollers to Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2022 Design, Automation & Test in Europe Conference & Exhibition, DATE 2022, Antwerp, Belgium, March 14-23, 2022, pp. 282-286, 2022, IEEE, 978-3-9819263-6-1. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Nathaniel Bleier, Calvin Lee 0004, Francisco Rodriguez, Antony Sou, Scott White, Rakesh Kumar 0002 |
FlexiCores: low footprint, high yield, field reprogrammable flexible microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18 - 22, 2022, pp. 831-846, 2022, ACM, 978-1-4503-8610-4. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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