Search results for "time-to-market"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
6	Etienne Closse, Michel Poize, Jacques Pulou, Joseph Sifakis, Patrick Venier, Daniel Weil, Sergio Yovine	TAXYS: A Tool for the Development and Verification of Real-Time Embedded Systems.	CAV	2001	DBLP DOI BibTeX RDF
6	Pao-Ann Hsiung	Formal synthesis and code generation of embedded real-time software.	CODES	2001	DBLP DOI BibTeX RDF	embedded real-time software, scheduling, Petri Nets, code generation
6	Shubhankar Basu, Balaji Kommineni, Ranga Vemuri	Variation-Aware Macromodeling and Synthesis of Analog Circuits Using Spline Center and Range Method and Dynamically Reduced Design Space.	VLSI Design	2009	DBLP DOI BibTeX RDF
6	Jozef Hooman, Teun Hendriks	Model-Based Run-Time Error Detection.	MoDELS (Workshops)	2007	DBLP DOI BibTeX RDF	models, reliability, embedded systems, error detection, run-time verification
6	Shih-Wei Liao, Shih-Hao Hung, Chia-Heng Tu, Jen-Hao Chen	Scalable Lossless High Definition Image Coding on Multicore Platforms.	EUC	2007	DBLP DOI BibTeX RDF	Multicore SoC, Image Decompress, Embedded System, Parallelization, Image Compress, JPEG2000, Lossless, Digital Cinema
6	Ian Kuon, Aaron Egier, Jonathan Rose	Design, layout and verification of an FPGA using automated tools.	FPGA	2005	DBLP DOI BibTeX RDF	FPGA, programmable logic, PLD, automatic layout
6	Fabiano Hessel, Vitor M. da Rosa, Igor M. Reis, Ricardo Planner, César A. M. Marcon, Altamiro Amadeu Susin	Abstract RTOS Modeling for Embedded Systems.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
6	Pao-Ann Hsiung, Trong-Yen Lee, Win-Bin See, Jih-Ming Fu, Sao-Jie Chen	VERTAF: An Object-Oriented Application Framework for Embedded Real-Time Systems.	Symposium on Object-Oriented Real-Time Distributed Computing	2002	DBLP DOI BibTeX RDF	object-oriented, formal verification, code generation, software component, embedded real-time systems
6	Ernst Kesseler	Deploying Networked Real-Time Simulation, Putting the Virtual Enterprise to Work Some Aerospace Experiences.	HICSS	2002	DBLP DOI BibTeX RDF
5	Mehrdad Reshadi, Prabhat Mishra 0001, Nikil D. Dutt	Hybrid-compiled simulation: An efficient technique for instruction-set architecture simulation.	ACM Trans. Embed. Comput. Syst.	2009	DBLP DOI BibTeX RDF	interpretive simulation, partial evaluation, instruction set architecture, Compiled simulation
5	Ana Carina M. Almeida, Renata M. C. R. Souza, Gibeon Aquino, Silvio Romero de Lemos Meira	Effort Drivers Estimation for Brazilian Geographically Distributed Software Development.	SEAFOOD	2009	DBLP DOI BibTeX RDF	Effort Driver, Estimation, Distributed Software Development
5	Yoshiyuki Nakamura, Thomas Clouqueur, Kewal K. Saluja, Hideo Fujiwara	Diagnosing At-Speed Scan BIST Circuits Using a Low Speed and Low Memory Tester.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
5	Elias Teodoro Silva Jr., Flávio Rech Wagner, Edison Pignaton de Freitas, Carlos Eduardo Pereira	Hardware support in a middleware for distributed and real-time embedded applications.	SBCCI	2006	DBLP DOI BibTeX RDF	real-time systems, middleware, energy efficiency, MPSoCs, embedded applications
5	Brian Lee 0001, Donal O'Mahony	Policy Based Charging in Multimedia Networks.	MMNS	2005	DBLP DOI BibTeX RDF
5	Hua Xiang 0001, Kai-Yuan Chao, Martin D. F. Wong	Exact Algorithms for Coupling Capacitance Minimization by Adding One Metal Layer.	ISQED	2005	DBLP DOI BibTeX RDF	Layer migration, Max-cut, Capacitance coupling
5	Yu Huang 0005, Wu-Tung Cheng, Cheng-Ju Hsieh, Huan-Yung Tseng, Alou Huang, Yu-Ting Hung	Efficient Diagnosis for Multiple Intermittent Scan Chain Hold-Time Faults.	Asian Test Symposium	2003	DBLP DOI BibTeX RDF
5	Mehrdad Reshadi, Prabhat Mishra 0001, Nikil D. Dutt	Instruction set compiled simulation: a technique for fast and flexible instruction set simulation.	DAC	2003	DBLP DOI BibTeX RDF	instruction abstraction, interpretive simulation, instruction set architectures, compiled simulation
5	Jeonghun Cho, Jinhwan Kim, Yunheung Paek	A Study on Data Allocation of On-Chip Dual Memory Banks.	Interaction between Compilers and Computer Architectures	2002	DBLP DOI BibTeX RDF
5	Keith S. Vallerio, Niraj K. Jha	Task graph transformation to aid system synthesis.	ISCAS (4)	2002	DBLP DOI BibTeX RDF
5	Josef Weingärtner	Product Family Engineering and Testing in the Medical Domain - Validation Aspects.	PFE	2001	DBLP DOI BibTeX RDF
5	Rahul Chaubey, J. K. Suresh	Integration vs. Development : An Engineering Approach to Building Web Applications.	Australian Software Engineering Conference	2001	DBLP DOI BibTeX RDF
5	Peter O. Müller, Christian Stich, Christian Zeidler	Components @ Work: Component Technology for Embedded Systems.	EUROMICRO	2001	DBLP DOI BibTeX RDF
5	Mohammed El Shobaki	Verification of Embedded Real-Time Systems Using Hardware/Software Cosimulation.	EUROMICRO	1998	DBLP DOI BibTeX RDF
5	Ananta K. Majhi, Vishwani D. Agrawal	Mixed-Signal Test.	VLSI Design	1998	DBLP DOI BibTeX RDF	a survey of mixed-signal testing, tools and methods for mixed-signal test, Analog test
5	Pramodchandran N. Variyam, Abhijit Chatterjee	Test generation for comprehensive testing of linear analog circuits using transient response sampling.	ICCAD	1997	DBLP DOI BibTeX RDF	Implicit functional testing, Transient testing, Linear Analog Circuits
5	Louise T. Lemaire	GAMMA: a fast prototype design, build, and test process.	DAC	1985	DBLP DOI BibTeX RDF
5	Nan Wu 0003, Mei Wen, Wei Wu, Ju Ren 0002, Huayou Su, Changqing Xun, Chunyuan Zhang	Streaming HD H.264 encoder on programmable processors.	ACM Multimedia	2009	DBLP DOI BibTeX RDF	1080P HD, H.264 encoder, real-time, stream, programmable
5	Dounia Habhouba, Alain Desrochers, Soumaya Cherkaoui	Agent-based assistance for engineering change management: An implementation prototype.	CSCWD	2009	DBLP DOI BibTeX RDF
5	Laura M. Castro, Miguel A. Francisco, Víctor M. Gulías	A Practical Methodology for Integration Testing.	EUROCAST	2009	DBLP DOI BibTeX RDF
5	Unmesh D. Bordoloi, Huynh Phung Huynh, Samarjit Chakraborty, Tulika Mitra	Evaluating design trade-offs in customizable processors.	DAC	2009	DBLP DOI BibTeX RDF	multi-objective design space exploration, pareto-optimal curve, processor customization, ASIP
5	Lucas C. Cordeiro, Carlos Mar, Eduardo Valentin, Fabiano Cruz, Daniel Patrick, Raimundo S. Barreto, Vicente Lucena	An agile development methodology applied to embedded control software under stringent hardware constraints.	ACM SIGSOFT Softw. Eng. Notes	2008	DBLP DOI BibTeX RDF	embedded agile development, health care, agile methodologies, platform-based design, real-time software, organizational patterns
5	R. Boumen, Ivo S. M. de Jong, J. W. H. Vermunt, Joanna M. van de Mortel-Fronczak, Jacobus E. Rooda	Risk-Based Stopping Criteria for Test Sequencing.	IEEE Trans. Syst. Man Cybern. Part A	2008	DBLP DOI BibTeX RDF
5	Yongjin Ahn, Keesung Han, Ganghee Lee, Hyunjik Song, Jun-hee Yoo, Kiyoung Choi, Xingguang Feng	SoCDAL: System-on-chip design AcceLerator.	ACM Trans. Design Autom. Electr. Syst.	2008	DBLP DOI BibTeX RDF	application-to-architecture mapping, static hardware/software estimation, simulation, scheduling, specification, design-space exploration, worst-case execution time, Codesign, transaction-level model, synchronous dataflow, multiprocessor system-on-chip, process networks
5	Konstantin Beznosov, Brian Chess	Security for the Rest of Us: An Industry Perspective on the Secure-Software Challenge.	IEEE Softw.	2008	DBLP DOI BibTeX RDF
5	Guillermo Talavera, Murali Jayapala, Jordi Carrabina, Francky Catthoor	Address Generation Optimization for Embedded High-Performance Processors: A Survey.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	optimization, embedded, address generation
5	Lucas C. Cordeiro, Carlos Mar, Eduardo Valentin, Fabiano Cruz, Daniel Patrick, Raimundo S. Barreto, Vicente Lucena	A Platform-Based Software Design Methodology for Embedded Control Systems: An Agile Toolkit.	ECBS	2008	DBLP DOI BibTeX RDF	Embedded Agile Development, Agile methodologies, Platform-Based Design, Real-time Software
5	Rama Gurram, Brian Mo, Ralf Gueldemeister	A Web Based Mashup Platform for Enterprise 2.0.	WISE Workshops	2008	DBLP DOI BibTeX RDF	OpenAjax, SOA, Architecture, Metadata, Web 2.0, Ajax, Platform, REST, Widgets, Lightweight, DIY, RIA, Enterprise Mashup, Gadgets
5	Fábio Rodrigues de la Rocha, Rômulo Silva de Oliveira	An environment for the rapid development of embedded file systems.	SAC	2008	DBLP DOI BibTeX RDF	embedded system, file system, development tool
5	George Economakos	Efficient implementation of biomedical hardware using open source descriptions and behavioral synthesis.	BIBE	2008	DBLP DOI BibTeX RDF
5	Kari Liukkunen, Matti Eteläperä, Markku Oivo, Juha-Pekka Soininen, Mika Pellikka	Virtual Prototypes in Developing Mobile Software Applications and Devices.	PROFES	2008	DBLP DOI BibTeX RDF	mobile software applications, user interfaces, user experiences, virtual prototypes, virtual platform, Usability requirements
5	Zhaogang Shu, Di Li 0001, Yueming Hu 0002, Feng Ye, Suhua Xiao, Jiafu Wan	From Models to Code: Automatic Development Process for Embedded Control System.	ICNSC	2008	DBLP DOI BibTeX RDF
5	Fergal McCaffery, Minna Pikkarainen, Ita Richardson	Ahaa --agile, hybrid assessment method for automotive, safety critical smes.	ICSE	2008	DBLP DOI BibTeX RDF	assessment methods, automotive spice, software process improvement, cmmi, safety-critical, agile practices
5	Lucas C. Cordeiro, Raimundo S. Barreto, Rafael Barcelos, Meuse N. Oliveira Jr., Vicente Lucena, Paulo Romero Martins Maciel	TXM: an agile HW/SW development methodology for building medical devices.	ACM SIGSOFT Softw. Eng. Notes	2007	DBLP DOI BibTeX RDF	embedded agile development, health care, agile methodologies, platform-based design, real-time software, organizational patterns
5	Luiz Kawakami, André Knabben, Douglas Rechia, Denise Gasques Bastos, Otavio Pereira, Ricardo Pereira e Silva, Luiz C. V. dos Santos	An Object-Oriented Framework for Improving Software Reuse on Automated Testing of Mobile Phones.	TestCom/FATES	2007	DBLP DOI BibTeX RDF	Software metrics, Software reusability, Software verification
5	Bita Gorjiara, Daniel Gajski	FPGA-friendly code compression for horizontal microcoded custom IPs.	FPGA	2007	DBLP DOI BibTeX RDF	dictionary-based compression, microcoded architectures, no-instruction-set computer, FPGA, memory optimization
5	Júlio C. B. de Mattos, Luigi Carro	Object and method exploration for embedded systems applications.	SBCCI	2007	DBLP DOI BibTeX RDF	object-oriented, design space exploration, embedded software
5	A. C. H. Ng, Jan-Willem Weijers, Miguel Glassee, Thomas Schuster, Bruno Bougard, Liesbet Van der Perre	ESL design and HW/SW co-verification of high-end software defined radio platforms.	CODES+ISSS	2007	DBLP DOI BibTeX RDF	verification, emulation, SDR, hardware/software co-design, ESL
5	Walid A. Najjar	Compiling code accelerators for FPGAs.	CASES	2007	DBLP DOI BibTeX RDF	FPGA code acceleration
5	Ewerson Carvalho, Ney Calazans, Fernando Moraes 0001	Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs.	IEEE International Workshop on Rapid System Prototyping	2007	DBLP DOI BibTeX RDF
5	Nei-Chiung Perng, Shih-Hao Hung	Task Scheduling for Context Minimization in Dynamically Reconfigurable Platforms.	EUC	2007	DBLP DOI BibTeX RDF
5	Ernesto Wandeler, Lothar Thiele, Marcel Verhoef, Paul Lieverse	System architecture evaluation using modular performance analysis: a case study.	Int. J. Softw. Tools Technol. Transf.	2006	DBLP DOI BibTeX RDF
5	André C. Nácul, Tony Givargis	Synthesis of time-constrained multitasking embedded software.	ACM Trans. Design Autom. Electr. Syst.	2006	DBLP DOI BibTeX RDF	Code serialization, multitasking, software synthesis, real-time embedded software
5	Michael Hübner 0001, Christian Schuck, Matthias Kühnle, Jürgen Becker 0001	New 2-Dimensional Partial Dynamic Reconfiguration Techniques for Real-time Adaptive Microelectronic Circuits.	ISVLSI	2006	DBLP DOI BibTeX RDF
5	Johan Andersson, Joel Huselius, Christer Norström, Anders Wall	Extracting Simulation Models from Complex Embedded Real-Time Systems.	ICSEA	2006	DBLP DOI BibTeX RDF
5	Patrick Leteinturier	Automotive semi-conductor trend & challenges.	DATE	2006	DBLP DOI BibTeX RDF
5	Waseem Ahmed, Doug Myers	Faster exploration of high level design alternatives using UML for better partitions.	DATE	2006	DBLP DOI BibTeX RDF
5	Samarjit Chakraborty	Flexible modelling and performance debugging of real-time embedded multimedia systems.	ACM Multimedia	2006	DBLP DOI BibTeX RDF	performance analysis, debugging, multimedia systems
5	Glauco Borges Valim dos Santos, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis	Channel based routing in channel-less circuits.	ISCAS	2006	DBLP DOI BibTeX RDF
5	Rasit Onur Topaloglu	Early, Accurate and Fast Yield Estimation through Monte Carlo-Alternative Probabilistic Behavioral Analog System Simulations.	VTS	2006	DBLP DOI BibTeX RDF
5	David Atienza, Pablo García Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias	A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip.	DAC	2006	DBLP DOI BibTeX RDF	thermal studies, FPGA, emulation, MPSoC
5	Luciano Lavagno, Claudio Passerone, Vishal Shah, Yosinori Watanabe	A Time Slice Based Scheduler Model for System Level Design.	DATE	2005	DBLP DOI BibTeX RDF
5	Veit Rueckel, Alexander Koch 0002, Klaus Feldmann, Harald Meerkamm	Process Data Management for the Shortening of the Whole Product Creation Process.	CSCWD (Selected papers)	2005	DBLP DOI BibTeX RDF
5	Byeongdo Kang, Young-Jik Kwon, Roger Y. Lee	A Design and Test Technique for Embedded Software.	SERA	2005	DBLP DOI BibTeX RDF	Software Test, Software Design, Embedded Software
5	Sreeram Chandrasekar, V. Visvanathan, Gaurav Kumar Varshney	Application of DC Transfer Characteristics in the Elimination of Redundant Vectors for Transient Noise Characterization of Static CMOS Circuits.	VLSI Design	2005	DBLP DOI BibTeX RDF
5	Pierluigi Daglio, David Iezzi, Danilo Rimondi, Carlo Roma, Salvatore Santapa	Building the Hierarchy from a Flat Netlist for a Fast and Accurate Post-Layout Simulation with Parasitic Components.	DATE	2004	DBLP DOI BibTeX RDF
5	Daniel Ménard, Olivier Sentieys	DSP Code Generation with Optimized Data Word-Length Selection.	SCOPES	2004	DBLP DOI BibTeX RDF
5	Américo Sampaio, Alexandre M. L. de Vasconcelos, Pedro R. Falcone Sampaio	XWebProcess: Agile Software Development for Web Applications.	ICWE	2004	DBLP DOI BibTeX RDF
5	Lieven Eeckhout, Hans Vandierendonck, Koenraad De Bosschere	Designing Computer Architecture Research Workloads.	Computer	2003	DBLP DOI BibTeX RDF
5	Armita Peymandoust, Tajana Simunic, Giovanni De Micheli	Complex instruction and software library mapping for embedded software using symbolic algebra.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2003	DBLP DOI BibTeX RDF
5	Antonella Di Stefano, Marco Fargetta, Emiliano Tramontana	Computational Reflection for Embedded Java Systems.	OTM Workshops	2003	DBLP DOI BibTeX RDF
5	Jan Henry Nyström, Philip W. Trinder, David J. King	Evaluating distributed functional languages for telecommunications software.	Erlang Workshop	2003	DBLP DOI BibTeX RDF
5	Keith S. Vallerio, Niraj K. Jha	Task Graph Extraction for Embedded System Synthesis.	VLSI Design	2003	DBLP DOI BibTeX RDF
5	Huaxin Zhang, Eleni Stroulia	Babel: An XML-Based Application Integration Framework.	CAiSE	2002	DBLP DOI BibTeX RDF
5	Subramanian Rajagopalan, Sreeranga P. Rajan, Sharad Malik, Sandro Rigo, Guido Araujo, Koichiro Takayama	A retargetable VLIW compiler framework for DSPs withinstruction-level parallelism.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
5	Frank van der Linden 0001	Introduction.	PFE	2001	DBLP DOI BibTeX RDF
5	Andrew B. Kahng	Design technology productivity in the DSM era (invited talk).	ASP-DAC	2001	DBLP DOI BibTeX RDF
5	Elena Trichina, Alexander Tiountchik	Scalable Algorithm for Montgomery Multiplication and Its Implementation on the Coarse-Grain Reconfigurable Chip.	CT-RSA	2001	DBLP DOI BibTeX RDF
5	John C. Lach, William H. Mangione-Smith, Miodrag Potkonjak	Efficient error detection, localization, and correction for FPGA-based debugging.	DAC	2000	DBLP DOI BibTeX RDF
5	Wolfgang Fleisch	Applying Use Cases for the Requirements Validation of Component-Based Real-Time Software.	ISORC	1999	DBLP DOI BibTeX RDF
5	Dolores R. Wallace	Enhancing Competitiveness via a Public Fault & Failure Data Repository .	HASE	1998	DBLP DOI BibTeX RDF	World Wide Web, reliability, software quality, Data analysis, failure, fault, data collection
5	Toon Gijbels, Francky Catthoor, Luc Van Eycken, André Oosterlinck, Hugo De Man	An application-specific architecture for the RBN-coder with efficient memory organization.	J. VLSI Signal Process.	1993	DBLP DOI BibTeX RDF
5	Wenchao Li 0001, Alessandro Forin, Sanjit A. Seshia	Scalable specification mining for verification and diagnosis.	DAC	2010	DBLP DOI BibTeX RDF	error localization, verification, formal specification, debugging, diagnosis, assertions, post-silicon validation
5	Nicola Bombieri, Franco Fummi, Graziano Pravadelli	Abstraction of RTL IPs into embedded software.	DAC	2010	DBLP DOI BibTeX RDF	RTL IP reuse, embedded software generation
5	Rattikorn Hewett, Phongphun Kijsanayothin	On modeling software defect repair time.	Empir. Softw. Eng.	2009	DBLP DOI BibTeX RDF	Defect report analysis, Data mining, Software testing, Quality assurance, Testing management
5	Shenghua Liu, Guoqiang Chen, Tom Tong Jing, Lei He 0001, Tianpei Zhang, Robi Dutta, Xianlong Hong	Substrate Topological Routing for High-Density Packages.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2009	DBLP DOI BibTeX RDF
5	Anne E. Haxthausen	A Domain-Specific Framework for Automated Construction and Verification of Railway Control Systems.	SAFECOMP	2009	DBLP DOI BibTeX RDF
5	Barbara M. Chapman, Lei Huang 0006, Eric Biscondi, Eric Stotzer, Ashish Shrivastava, Alan Gatherer	Implementing OpenMP on a high performance embedded multicore MPSoC.	IPDPS	2009	DBLP DOI BibTeX RDF
5	Juan Antonio Holgado Terriza, Jaime Viúdez-Aivar	A flexible Java framework for embedded systems.	JTRES	2009	DBLP DOI BibTeX RDF	Java, embedded systems, framework, flexibility, microcontroller
5	Shihheng Tsai, Chung-Yang Huang	A false-path aware formal static timing analyzer considering simultaneous input transitions.	DAC	2009	DBLP DOI BibTeX RDF	critical path selection, multiple input transitioning, formal method, static timing analysis, false path
5	Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn	FPGA-based accelerator for the verification of leading-edge wireless systems.	DAC	2009	DBLP DOI BibTeX RDF	wireless communications, bit error rate
5	Ali Koudri, Joël Champeau, Denis Aulagnier, Philippe Soulard	MoPCoM/MARTE Process Applied to a Cognitive Radio System Design and Analysis.	ECMDA-FA	2009	DBLP DOI BibTeX RDF
5	Tarek M. Taha, D. Scott Wills	An Instruction Throughput Model of Superscalar Processors.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF	Modeling techniques, Pipeline processors, Modeling of computer architecture
5	Bastian Ristau, Torsten Limberg, Gerhard P. Fettweis	A Mapping Framework for Guided Design Space Exploration of Heterogeneous MP-SoCs.	DATE	2008	DBLP DOI BibTeX RDF
5	Ping Pan, Ling Jin, Chun Ying, Jin Hua Liu	Template based rapid service creation environment for service delivery platform.	NOMS	2008	DBLP DOI BibTeX RDF
5	Zhonglei Wang, Wolfgang Haberl, Andreas Herkersdorf, Martin Wechs	A Simulation Approach for Performance Validation during Embedded Systems Design.	ISoLA	2008	DBLP DOI BibTeX RDF
5	Ahmad Sghaier, Shawki Areibi, Robert D. Dony	IEEE802.16-2004 OFDM functions implementation on FPGAS with design exploration.	FPL	2008	DBLP DOI BibTeX RDF
5	Serino Angellotti, Stefano Monti, Walter Nesci, Alessandro Peciarolo, Giovanni Prodi, Claudio Schellino, Massimo Seminara, Rainer Wuestenhagen	Control IP's Sharing: From Configurable Mechatronic Control to Autosar SW-C Package. A New Model Business Scenario across Automotive OEMs and Component Supplier and the New Roles of SW IP's Supplier and SW IP's Integrator.	COMPSAC	2008	DBLP DOI BibTeX RDF	X-PRO, Mechatronic, AUTOSAR
5	Mohammed Issam Younis, Kamal Zuhairi Zamli, Nor Ashidi Mat Isa	IRPS - An Efficient Test Data Generation Strategy for Pairwise Testing.	KES (1)	2008	DBLP DOI BibTeX RDF
5	Neunghoe Kim, Taek Lee, Dong-hyun Lee, Keun Lee, Hoh Peter In	Customer Value-based HW/SW Partitioning Decision in Embedded Systems.	SNPD	2008	DBLP DOI BibTeX RDF	Partitioning Decision, Embedded Systems, Customer Value
5	Ilya Wagner, Valeria Bertacco	Reversi: Post-silicon validation system for modern microprocessors.	ICCD	2008	DBLP DOI BibTeX RDF