Search results for "verification"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
26	Moshe Y. Vardi	Automata-Theoretic Model Checking Revisited.	Haifa Verification Conference	2008	DBLP DOI BibTeX RDF
26	Omer Bar-Ilan, Oded Fuhrmann, Shlomo Hoory, Ohad Shacham, Ofer Strichman	Linear-Time Reductions of Resolution Proofs.	Haifa Verification Conference	2008	DBLP DOI BibTeX RDF
26	Ziv Nevo	User-Friendly Model Checking: Automatically Configuring Algorithms with RuleBase/PE.	Haifa Verification Conference	2008	DBLP DOI BibTeX RDF
26	Edmund M. Clarke, Alexandre Donzé, Axel Legay	Statistical Model Checking of Mixed-Analog Circuits with an Application to a Third Order Delta-Sigma Modulator.	Haifa Verification Conference	2008	DBLP DOI BibTeX RDF
26	Thomas Noll 0001, Bastian Schlich	Delayed Nondeterminism in Model Checking Embedded Systems Assembly Code.	Haifa Verification Conference	2007	DBLP DOI BibTeX RDF
26	David N. Jansen, Joost-Pieter Katoen, Marcel Oldenkamp, Mariëlle Stoelinga, Ivan S. Zapreev	How Fast and Fat Is Your Probabilistic Model Checker? An Experimental Performance Comparison.	Haifa Verification Conference	2007	DBLP DOI BibTeX RDF
26	Janees Elamkulam, Ziv Glazberg, Ishai Rabinovitz, Gururaja Kowlali, Satish Chandra Gupta, Sandeep Kohli, Sai Dattathrani, Claudio Paniagua Macia	Detecting Design Flaws in UML State Charts for Embedded Software.	Haifa Verification Conference	2006	DBLP DOI BibTeX RDF
26	Shoham Ben-David, Dana Fisman, Sitvanit Ruah	The Safety Simple Subset.	Haifa Verification Conference	2005	DBLP DOI BibTeX RDF
26	Roman Gershman, Ofer Strichman	HaifaSat: A New Robust SAT Solver.	Haifa Verification Conference	2005	DBLP DOI BibTeX RDF
26	Laurent Granvilliers, Vladik Kreinovich, Norbert Th. Müller	Novel Approaches to Numerical Software with Result Verification.	Numerical Software with Result Verification	2003	DBLP DOI BibTeX RDF
26	Manfred Broy	A Functional Calculus for Specification and Verification of Nondeterministic Interactive Systems.	Verification: Theory and Practice	2003	DBLP DOI BibTeX RDF
26	Patrick Cousot	Verification by Abstract Interpretation.	Verification: Theory and Practice	2003	DBLP DOI BibTeX RDF
26	Randal E. Bryant	Verification of Synchronous Circuits by Symbolic Logic Simulation.	Hardware Specification, Verification and Synthesis	1989	DBLP DOI BibTeX RDF
26	Alexandre Bronstein, Carolyn L. Talcott	Formal Verification of Synchronous Circuits based on String-Functional Semantics: The 7 Paillet Circuits in Boyer-Moore.	Automatic Verification Methods for Finite State Systems	1989	DBLP DOI BibTeX RDF
26	David L. Dill	Timing Assumptions and Verification of Finite-State Concurrent Systems.	Automatic Verification Methods for Finite State Systems	1989	DBLP DOI BibTeX RDF
26	Gérard Boudol, Valérie Roy, Robert de Simone, Didier Vergamini	Process Calculi, from Theory to Practice: Verification Tools.	Automatic Verification Methods for Finite State Systems	1989	DBLP DOI BibTeX RDF
26	Ingo Feinerer, Gernot Salzer	A comparison of tools for teaching formal software verification.	Formal Aspects Comput.	2009	DBLP DOI BibTeX RDF	Formal software verification, Frege Program Prover, Key system, Perfect developer, Prototype verification system
26	Jean Souyris, Virginie Wiels, David Delmas, Hervé Delseny	Formal Verification of Avionics Software Products.	FM	2009	DBLP DOI BibTeX RDF	avionics software, verification, formal verification, static analysis, Abstract Interpretation, safety, development process
26	Jong Hyuk Byun, Chang Beom Choi, Tag Gon Kim	Verification of the DEVS model implementation using aspect embedded DEVS.	SpringSim	2009	DBLP BibTeX RDF	aspect oriented programming based verification, discrete event simulator verification, DEVS formalism
26	Edison Mera, Pedro López-García 0001, Manuel V. Hermenegildo	Integrating Software Testing and Run-Time Checking in an Assertion Verification Framework.	ICLP	2009	DBLP DOI BibTeX RDF	static/dynamic debugging, program verification, unit testing, assertions, run-time verification
26	Donato Impedovo, Giuseppe Pirlo, Mario Refice	Handwritten Signature and Speech: Preliminary Experiments on Multiple Source and Classifiers for Personal Identity Verification.	IWCF	2008	DBLP DOI BibTeX RDF	Biometry, Signature Verification, Speaker Verification, Personal Authentication, Multi-expert system
26	Alper Sen 0001, Vijay K. Garg	Formal Verification of Simulation Traces Using Computation Slicing.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	Simulation, formal verification, temporal logic, partial order, runtime verification, lattice theory
26	Maciej J. Ciesielski, Priyank Kalla, Serkan Askar	Taylor Expansion Diagrams: A Canonical Representation for Verification of Data Flow Designs.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	Register transfer level—design aids, arithmetic and logic structures—verification, symbolic and algebraic manipulation, verification
26	Daniel Große, Ulrich Kühne, Rolf Drechsler	HW/SW co-verification of embedded systems using bounded model checking.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	hardware/software co-verification, embedded systems, formal verification, SystemC, bounded model checking, PSL
26	Tamarah Arons, Jozef Hooman, Hillel Kugler, Amir Pnueli, Mark van der Zwaag	Deductive Verification of UML Models in TLPVS.	UML	2004	DBLP DOI BibTeX RDF	Deductive Verification, UML, Semantics, Formal Verification, Temporal Logic, State Machines, PVS
26	Michael L. Behm, John M. Ludden, Yossi Lichtenstein, Michal Rimon, Michael Vinov	Industrial experience with test generation languages for processor verification.	DAC	2004	DBLP DOI BibTeX RDF	test generation, functional verification, processor verification
26	Ta-Chung Chang, Vikram Iyengar, Elizabeth M. Rudnick	A Biased Random Instruction Generation Environment for Architectural Verification of Pipelined Processors.	J. Electron. Test.	2000	DBLP DOI BibTeX RDF	architectural verification, biased random instruction generation, correctness checking, design error coverage, design verification, coverage metrics
26	Natalia Sidorova, Martin Steffen	Verification of a wireless ATM medium-access protocol.	APSEC	2000	DBLP DOI BibTeX RDF	medium-access protocol verification, modular structure, SDL specification, abstraction techniques, system debugging, untimed properties, time-dependent properties, model checking, formal specification, formal verification, wireless LAN, asynchronous transfer mode, access protocols, state space reduction, wireless ATM
26	Hiromi Hiraishi	Verification of deadlock free property of high level robot control.	Asian Test Symposium	2000	DBLP DOI BibTeX RDF	deadlock free property, high level robot control, verification algorithm, task control architecture, concurrent robot control processes, symbolic model verifier, symbolic model checking algorithm, robots, formal verification, logic testing, concurrency control, message passing, symbol manipulation, safety properties, liveness properties
26	Axel Dold, Vincent Vialard	Formal Verification of a Compiler Back-End Generic Checker Program.	Ershov Memorial Conference	1999	DBLP DOI BibTeX RDF	checker-based program verification, generic specification, formal verification
26	Rathish Jayabharathi, Kyung Tek Lee, Jacob A. Abraham	A Novel Solution for Chip-Level Functional Timing Verification.	VTS	1997	DBLP DOI BibTeX RDF	Chip-level Functional Timing Verification, Formal Verification techniques, Critical Path Analysis
26	Toshinori Suzuki, Sol M. Shatz, Tadao Murata	A Protocol Modeling and Verification Approach Based on a Specification Language and Petri Nets.	IEEE Trans. Software Eng.	1990	DBLP DOI BibTeX RDF	conversion rules, automated modeling, input/output behavior, linguistic specifications, LAPD protocol, verification, Petri nets, Petri nets, protocols, program verification, specification language, specification languages, communication protocols, timed Petri net
26	Marc Parizeau, Réjean Plamondon	A Comparative Analysis of Regional Correlation, Dynamic Time Warping, and Skeletal Tree Matching for Signature Verification.	IEEE Trans. Pattern Anal. Mach. Intell.	1990	DBLP DOI BibTeX RDF	regional correlation, skeletal tree matching, signal matching algorithms, verification error rates, script types, handwritten passwords, signal representation spaces, character recognition, character recognition, computerised pattern recognition, trees (mathematics), dynamic time warping, signature verification, correlation methods
26	Dipankar Sarkar 0001, S. C. De Sarkar	A Set of Inference Rules for Quantified Formula Handling and Array Handling in Verification of Programs Over Integers.	IEEE Trans. Software Eng.	1989	DBLP DOI BibTeX RDF	quantified formula handling, array handling, undecidability problem, automated verifier, quantified formulas, bound-extension rule, bound-modification, theorem proving, program verification, program verification, first-order logic, inference mechanisms, decidability, inference rules, integer arithmetic
26	Gaurav Singh 0006, Sandeep K. Shukla	Verifying Compiler Based Refinement of BluespecTM.	SPIN	2008	DBLP DOI BibTeX RDF	Bluespec System Verilog (BSV), Formal Verification, Hardware Designs, SPIN Model Checker
26	Amos Korman, Shay Kutten, David Peleg	Proof labeling schemes.	PODC	2005	DBLP DOI BibTeX RDF	proof labels, self stabilization, distributed networks, property verification
25	Saurabh Srivastava 0001, Sumit Gulwani, Jeffrey S. Foster	From program verification to program synthesis.	POPL	2010	DBLP DOI BibTeX RDF	proof-theoretic program synthesis, verification
25	Michael Emmi, Rupak Majumdar, Roman Manevich	Parameterized verification of transactional memories.	PLDI	2010	DBLP DOI BibTeX RDF	parameterized verification, transactional memory
25	Kyriakos Mouratidis, Dimitris Sacharidis, HweeHwa Pang	Partially materialized digest scheme: an efficient verification method for outsourced databases.	VLDB J.	2009	DBLP DOI BibTeX RDF	Query result verification, Authentication in outsourced databases
25	André Platzer, Jan-David Quesel, Philipp Rümmer	Real World Verification.	CADE	2009	DBLP DOI BibTeX RDF	hybrid systems, software verification, decision procedures, Real-closed fields
25	Limor Fix	Fifteen Years of Formal Property Verification in Intel.	25 Years of Model Checking	2008	DBLP DOI BibTeX RDF	formal property verification, Model checking, formal specification
25	Nicole F. Velasquez, Alexandra Durcikova	Sysadmins and the need for verification information.	CHIMIT	2008	DBLP DOI BibTeX RDF	usability, verification, information seeking, system administrator
25	Benno Stein 0001, Nedim Lipka, Sven Meyer zu Eissen	Meta Analysis within Authorship Verification.	DEXA Workshops	2008	DBLP DOI BibTeX RDF	Authorship Verification, Plagiarism Analysis, Meta Learning
25	Sarvani S. Vakkalanka, Michael Delisi, Ganesh Gopalakrishnan, Robert M. Kirby	Scheduling considerations for building dynamic verification tools for MPI.	PADTAD	2008	DBLP DOI BibTeX RDF	model checking, MPI, message passing, distributed programming, partial order reduction, dynamic verification
25	Chuang-Chien Chiu, Chou-Min Chuang, Chih-Yu Hsu	A Novel Personal Identity Verification Approach Using a Discrete Wavelet Transform of the ECG Signal.	MUE	2008	DBLP DOI BibTeX RDF	Biometric identification system, Discrete Wavelet Transform, Electrocardiogram, Identity Verification
25	Maher Lamari	Towards an automated test generation for the verification of model transformations.	SAC	2007	DBLP DOI BibTeX RDF	MDA (Model Driven Architecture), input test models, model transformation, test case generation, automated verification
25	Jung Hee Cheon, Jeong Hyun Yi	Fast Batch Verification of Multiple Signatures.	Public Key Cryptography	2007	DBLP DOI BibTeX RDF	sparse exponent, elliptic curve, exponentiation, Koblitz curve, Batch verification, non-adjacent form, Frobenius map
25	Saeed Jalili, Mehdi MirzaAghaei	RVERL: Run-time Verification of Real-time and Reactive Programs using Event-based Real-Time Logic Approach.	SERA	2007	DBLP DOI BibTeX RDF	Runtime Verification (RV), Real-time and Reactive Program, Event-based Real-Time Logic (ERL), Aspect- Oriented Approach
25	Se-Hoon Kim, Kie-Sung Oh, Hyung-Il Choi	Off-Line Verification System of the Handwrite Signature or Text, Using a Dynamic Programming.	ICCSA (1)	2007	DBLP DOI BibTeX RDF	Verification, Dynamic Programming, Signature, Handwrite, Mahalanobis Distance, DTW, Off-line
25	Jen-Chieh Ou, Daniel G. Saab, Qiang Qiang, Jacob A. Abraham	Reducing verification overhead with RTL slicing.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	verification, test, CAD
25	Adrian E. Seigler, Gary A. Van Huben, Hari Mony	Formal Verification of Partial Good Self-Test Fencing Structures.	FMCAD	2007	DBLP DOI BibTeX RDF	fencing, formal verification, self test
25	Lubos Brim, Ivana Cerná, Pavlína Vareková, Barbora Zimmerová	Component-interaction automata as a verification-oriented component-based system specification.	ACM SIGSOFT Softw. Eng. Notes	2006	DBLP DOI BibTeX RDF	Component-based specification languages, component-interaction automata, team automata, verification, ADLs, I/O automata, interface automata, component interaction
25	Armando Sánchez-Peña, Pedro P. Carballo, Luz García 0001, Antonio Núñez	VIPACES, Verification Interface Primitives for the Development of AXI Compliant Elements and Systems.	DSD	2006	DBLP DOI BibTeX RDF	AMBA 3 AXI, VIPACES, Virtual Components, Verification, Test, System-on-Chip (SoC), IP, DCT, Emulation, SystemC, Environment, TLM, IDCT, VIP
25	Jinjun Chen, Yun Yang 0001	Key research issues in grid workflow verification and validation.	ACSW	2006	DBLP BibTeX RDF	grid workflow systems, grid workflow validation, grid workflow verification
25	Byungkwan Park, Daesung Moon, Yongwha Chung, Jin-Won Park	Impact of Embedding Scenarios on the Smart Card-Based Fingerprint Verification.	WISA	2006	DBLP DOI BibTeX RDF	Performance Evaluation, Smart Card, Fingerprint Verification
25	Vikram Iyengar, Mark Johnson, Theo Anemikos, Bob Bassett, Mike Degregorio, Rudy Farmer, Gary Grise, Phil Stevens, Mark Taylor 0001, Frank Woytowich	Performance verification of high-performance ASICs using at-speed structural test.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	ASICs, structural test, performance verification, at-speed
25	David Brier, Raj S. Mitra	Use of C/C++ models for architecture exploration and verification of DSPs.	DAC	2006	DBLP DOI BibTeX RDF	simulation, verification, formal, RTL, C/C++
25	Saurav Gorai, Saptarshi Biswas, Lovleen Bhatia, Praveen Tiwari, Raj S. Mitra	Directed-simulation assisted formal verification of serial protocol and bridge.	DAC	2006	DBLP DOI BibTeX RDF	serial protocol, model checking, formal verification
25	Mukul R. Prasad, Armin Biere, Aarti Gupta	A survey of recent advances in SAT-based formal verification.	Int. J. Softw. Tools Technol. Transf.	2005	DBLP DOI BibTeX RDF	Model checking, Verification, ATPG, SAT, QBF
25	Hong Ling, Jiangbo Zhou	Research on workflow process structure verification.	ICEBE	2005	DBLP DOI BibTeX RDF	process structure, verification, workflow, process
25	Ambar A. Gadkari, S. Ramesh 0001, Rubin A. Parekhji	CESC: a visual formalism for specification and verification of SoCs.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	verification, specification, visual languages, system-level design
25	Sandeep S. Kulkarni, Borzoo Bonakdarpour, Ali Ebnenasir	Mechanical Verification of Automatic Synthesis of Fault-Tolerant Programs.	LOPSTR	2004	DBLP DOI BibTeX RDF	Addition of faulttolerance, Fault-tolerance, Program transformation, Theorem proving, Program synthesis, PVS, Mechanical verification
25	Yuichi Nakamura 0002, Kohei Hosokawa, Ichiro Kuroda, Ko Yoshikawa, Takeshi Yoshimura	A fast hardware/software co-verification method for system-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication.	DAC	2004	DBLP DOI BibTeX RDF	C/C++ simulator, FPGA emulation, co-verification
25	Frank Cornelissen, Catholijn M. Jonker, Jan Treur	Compositional Verification of Knowledge-Based Task Models and Problem-Solving Methods.	Knowl. Inf. Syst.	2003	DBLP DOI BibTeX RDF	Diagnostic reasoning model, Formal compositional modeling, Knowledge-based systems, Compositional verification
25	Lars-Åke Fredlund, Dilian Gurov, Thomas Noll 0001, Mads Dam, Thomas Arts, Gennady Chugunov	A verification tool for ERLANG.	Int. J. Softw. Tools Technol. Transf.	2003	DBLP DOI BibTeX RDF	Formal methods, Theorem proving, Software verification
25	Skander Kort, Sofiène Tahar, Paul Curzon	Hierarchical formal verification using a hybrid tool.	Int. J. Softw. Tools Technol. Transf.	2003	DBLP DOI BibTeX RDF	HOL (higher-order logic), MDG (multiway decision graphs), Hybrid tools, Hierarchical verification
25	Douglas A. Stuart, Monica Brockmeyer, Aloysius K. Mok, Farnam Jahanian	Simulation-Verification: Biting at the State Explosion Problem.	IEEE Trans. Software Eng.	2001	DBLP DOI BibTeX RDF	Modechart, simulation, Real-time systems, verification, formal methods, specification, requirements analysis, timing constraints
25	Fong Pong, Michel Dubois 0001	Formal Automatic Verification of Cache Coherence in Multiprocessors with Relaxed Memory Models.	IEEE Trans. Parallel Distributed Syst.	2000	DBLP DOI BibTeX RDF	relaxed memory consistency models, delayed consistency, symbolic state model, verification, Shared-memory multiprocessor
25	Paolo Traverso, Piergiorgio Bertoli	Mechanized result verification: an industrial application.	Int. J. Softw. Tools Technol. Transf.	2000	DBLP DOI BibTeX RDF	Mechanized result verification, Online/offline checking, Validation, Decomposition, Safety critical software
25	Nevin Heintze, Joxan Jaffar, Razvan Voicu	A Framework for Combining Analysis and Verification.	POPL	2000	DBLP DOI BibTeX RDF	program analysis, abstract interpretation, program verification
25	Frédéric Jurie	Hypothesis Verification in Model-Based Object Recognition with a Gaussian Error Method.	ECCV (2)	1998	DBLP DOI BibTeX RDF	Pose Verification, Model-Based Recognition
25	Mark D. Aagaard, Carl-Johan H. Seger	The formal verification of a pipelined double-precision IEEE floating-point multiplier.	ICCAD	1995	DBLP DOI BibTeX RDF	ANSI/IEEE Std 754-1985, model checking, theorem proving, floating-point arithmetic, Hardware verification
25	Satoshi Yamane	Formal Timing Verification Techniques for Distributed System .	FTDCS	1995	DBLP DOI BibTeX RDF	language inclusion algorithm, formal specification, timing verification, timed automaton
25	Jonathan M. Silverman	Reflections on the Verification of the Security of an Operating System Kernel.	SOSP	1983	DBLP DOI BibTeX RDF	Confinement channels, Operating system kernal, Verification, Specification, Information flow, Multilevel security
25	Tomas Kalibera, Pavel Parízek, Ghaith Haddad, Gary T. Leavens, Jan Vitek	Challenge benchmarks for verification of real-time programs.	PLPV	2010	DBLP DOI BibTeX RDF	java, verification, real-time
25	Howard Barringer, Klaus Havelund, David E. Rydeheard, Alex Groce	Rule Systems for Runtime Verification: A Short Tutorial.	RV	2009	DBLP DOI BibTeX RDF	Java, temporal logic, Python, AspectJ, Runtime verification, log file analysis, code instrumentation, rule systems
25	Peter Ochsenschläger, Jürgen Repp, Roland Rieke, Ulrich Nitsche	The SH-Verification Tool - Abstraction-Based Verification of Co-operating Systems.	Formal Aspects Comput.	1998	DBLP DOI BibTeX RDF	Simple language homomorphisms, Asynchronous product automata, Approximate satisfaction of safety and liveness properties, Model checking, Verification tools
25	Jeffrey J. Joyce	Totally Verified Systems: Linking Verified Software to Verified Hardware.	Hardware Specification, Verification and Synthesis	1989	DBLP DOI BibTeX RDF	machine-assisted theorem proving, safety-critical systems, higher-order logic, hardware verification, compiler correctness
25	Klaus Havelund, Arne Skou, Kim Guldstrand Larsen, Kristian Lund	Formal modeling and analysis of an audio/video protocol: an industrial case study using UPPAAL.	RTSS	1997	DBLP DOI BibTeX RDF	audio/video protocol, real-life protocol, real-time considerations, real-time verification tool, error trace, software engineering, formal verification, formal modeling, automatic verification, industrial case study, UPPAAL, assembler code
25	Peter Wohl, John A. Waicukauski	Using ATPG for clock rules checking in complex scan design.	VTS	1997	DBLP DOI BibTeX RDF	clock rules checking, complex scan designs, structured DFT, automated design-rules-checking, robust set of rules, clock-rule-violation detection, fast clock verification, large microprocessor design, topological circuit analysis, zero delay, user controlled verification, capture ability, port contention, cone tracing, equivalent sources, ATPG, race conditions, computer testing, timing verification
25	Wael M. Elseaidy, Rance Cleaveland	A tool for modeling and verifying real-time systems.	ICECCS	1995	DBLP DOI BibTeX RDF	real-time systems verification, verification environment, graphical design la, Modechart, textually based language, Temporal CCS, system minimization, active structural control systems, real-time systems, formal verification, software tools, visual languages, equivalence checking, modeling tool
25	William E. Howden, Bruce Wieand	QDA-A Method for Systematic Informal Program Analysis.	IEEE Trans. Software Eng.	1994	DBLP DOI BibTeX RDF	QDA, systematic informal program analysis, program properties, Quick Defect Analysis, comments analysis, abstract program model, hypothesis-driven method, operational flight program, formal specification, formal verification, specification, program verification, program verification, programming theory, program debugging, program diagnostics, program validity, code reading
24	Janick Bergeron, Harry Foster, Andrew Piziali, Raj Shekher Mitra, Catherine Ahlschlager, Doron Stein	Building a verification test plan: trading brute force for finesse.	DAC	2006	DBLP DOI BibTeX RDF	verification test plan, formal verification, coverage, design verification, functional simulation
24	Cindy Eisner	Formal verification of software source code through semi-automatic modeling.	Softw. Syst. Model.	2005	DBLP DOI BibTeX RDF	Program verification, Software verification, Functional verification, Software model checking
24	Liwu Li 0001	Fast In-Place Verification of Data Dependencies.	IEEE Trans. Knowl. Data Eng.	1993	DBLP DOI BibTeX RDF	in-place verification, space-optimal sequential, satisfaction problem, fast space-optimal sorting techniques, sequential implementations, I/O transfers, in-place FD, MVD verification, relation modification, parallel algorithms, parallel algorithms, relational databases, program verification, data dependencies, tuples, relational database systems, multivalued dependencies, space optimality
24	Fu-Ching Yang, Wen-Kai Huang, Jing-Kun Zhong, Ing-Jer Huang	Automatic Verification of External Interrupt Behaviors for Microprocessor Design.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
24	Kelvin Ng	Challenges in using system-level models for RTL verification.	DAC	2008	DBLP DOI BibTeX RDF	simulation, equivalence checking, system-level model, RTL models
24	Youssef Hanna, Hridesh Rajan, Wensheng Zhang 0001	Slede: a domain-specific verification framework for sensor network security protocol implementations.	WISEC	2008	DBLP DOI BibTeX RDF	intruder generation, sensor networks, model checking, security protocols
24	Aysu Betin-Can, Tevfik Bultan, Mikael Lindvall, Benjamin Lux, Stefan Topp	Eliminating synchronization faults in air traffic control software via design for verification with concurrency controllers.	Autom. Softw. Eng.	2007	DBLP DOI BibTeX RDF	Model checking, Synchronization, Design patterns, Interfaces, Concurrent programming
24	Fei Liu 0006, Ming Yang 0015, Guobing Sun	Verification of Human Decision Models in Military Simulations.	Asia International Conference on Modelling and Simulation	2007	DBLP DOI BibTeX RDF
24	Changhan Park, Joon Ki Paik, Taewoong Choi, Soonhyob Kim, Young-Ouk Kim, Jaechan Namkung	Multi-Modal Human Verification Using Face and Speech.	ICVS	2006	DBLP DOI BibTeX RDF
24	Joonhyuk Yoo, Manoj Franklin	The Filter Checker: An Active Verification Management Approach.	DFT	2006	DBLP DOI BibTeX RDF
24	Panagiotis Manolios, Sudarshan K. Srinivasan	Refinement Maps for Efficient Verification of Processor Models.	DATE	2005	DBLP DOI BibTeX RDF
24	Yasushi Umezawa, Takeshi Shimizu	A Formal Verification Methodology for Checking Data Integrity.	DATE	2004	DBLP DOI BibTeX RDF
24	Hamid Shojaei, Habib Ghayoumi	Techniques for Formal Verification of Digital Systems: A System Approach.	DSD	2004	DBLP DOI BibTeX RDF
24	Jinjun Chen, Yun Yang 0001, Tsong Yueh Chen	Dynamic Verification of Temporal Constraints on-the-fly for Workflow Systems.	APSEC	2004	DBLP DOI BibTeX RDF
24	Ansgar Fehnker, Franjo Ivancic	Benchmarks for Hybrid Systems Verification.	HSCC	2004	DBLP DOI BibTeX RDF
24	Ming Zhu, Jinian Bian, Weimin Wu	Model Optimization Techniques in a Verification Platform for Classified Properties.	ICESS	2004	DBLP DOI BibTeX RDF
24	Kausik Datta, Partha Pratim Das	Assertion Based Verification Using HDVL.	VLSI Design	2004	DBLP DOI BibTeX RDF
24	Koji Ara, Kei Suzuki	A Proposal for Transaction-Level Verification with Component Wrapper Language.	DATE	2003	DBLP DOI BibTeX RDF