Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
20 | Gianpiero Cabodi, Sergio Nocco, Stefano Quer |
Are BDDs still alive within sequential verification? ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 7(2), pp. 129-142, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Approximate-reachability, Model checking, Binary Decision Diagrams, Satisfiability solvers |
20 | Bahareh Badban, Jaco van de Pol |
Zero, successor and equality in BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. Pure Appl. Log. ![In: Ann. Pure Appl. Log. 133(1-3), pp. 101-123, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
20 | Mukul S. Bansal, V. Ch. Venkaiah |
A note on finding a maximum clique in a graph using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Australas. J Comb. ![In: Australas. J Comb. 32, pp. 253-258, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
20 | Shin-ichi Minato |
VSOP (Valued-Sum-of-Products) Calculator for Knowledge Processing Based on Zero-Suppressed BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Federation over the Web ![In: Federation over the Web - International Workshop, Dagstuhl Castle, Germany, May 1-6, 2005. Revised Selected Papers, pp. 40-58, 2005, Springer, 978-3-540-31018-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
20 | Stephen Plaza, Valeria Bertacco |
STACCATO: disjoint support decompositions from BDDs through symbolic kernels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 276-279, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
20 | Moi Riba, Jatindra Kumar Deka |
Variable Ordering of BDDs using Genetic Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IICAI ![In: Proceedings of the 2nd Indian International Conference on Artificial Intelligence, Pune, India, December 20-22, 2005, pp. 198-208, 2005, IICAI, 0-9727412-1-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
20 | Jaan Raik, Raimund Ubar, Sergei Devadze, Artur Jutman |
Efficient Single-Pattern Fault Simulation on Structurally Synthesized BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDCC ![In: Dependable Computing - EDCC-5, 5th European Dependable Computing Conference, Budapest, Hungary, April 20-22, 2005, Proceedings, pp. 332-344, 2005, Springer, 3-540-25723-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
20 | Rolf Drechsler, Junhao Shi, Görschwin Fey |
Synthesis of fully testable circuits from BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(3), pp. 440-443, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
20 | Ingo Wegener |
BDDs--design, analysis, complexity, and applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Discret. Appl. Math. ![In: Discret. Appl. Math. 138(1-2), pp. 229-251, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
20 | Saravanan Padmanaban, Spyros Tragoudas |
Using BDDs and ZBDDs for Efficient Identification of Testable Path Delay Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 50-55, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
20 | Thomas Eschbach, Rolf Drechsler, Bernd Becker 0001 |
Placement and routing optimization for circuits derived from BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 229-232, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
20 | Rüdiger Ebendt |
Heuristic and exact optimization of reduced ordered binary decision diagrams (BDDs). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2004 |
RDF |
|
20 | Mario Hilgemeier, Nicole Drechsler, Rolf Drechsler |
Minimizing the number of one-paths in BDDs by an evolutionary algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Congress on Evolutionary Computation ![In: Proceedings of the IEEE Congress on Evolutionary Computation, CEC 2003, Canberra, Australia, December 8-12, 2003, pp. 1724-1731, 2003, IEEE, 0-7803-7804-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
20 | Ganapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting Cheng, Li-C. Wang |
A comparison of BDDs, BMC, and sequential SAT for model checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HLDVT ![In: Eighth IEEE International High-Level Design Validation and Test Workshop 2003, San Francisco, CA, USA, November 12-14, 2003, pp. 157-162, 2003, IEEE Computer Society, 0-7803-8236-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
20 | Norbert Th. Müller |
Real Numbers and BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCA ![In: Computability and Complexity in Analysis, CCA 2002, ICALP 2002 Satellite Workshop, Málaga, Spain, July 12-13, 2002, pp. 139-153, 2002, Elsevier. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
20 | Mitchell A. Thornton, Rolf Drechsler, Wolfgang Günther 0001 |
Logic Circuit Equivalence Checking Using Haar Spectral Coefficients and Partial BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 14(1), pp. 53-64, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
20 | Wolfgang Günther 0001, Rolf Drechsler |
Minimization of free BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 32(1-2), pp. 41-59, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
20 | Yusuke Matsunaga |
An Efficient Algorithm Finding Simple Disjoint Decompositions Using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(12), pp. 2715-2724, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
|
20 | Rajarshi Mukherjee, Jawahar Jain, Koichiro Takayama, Jacob A. Abraham, Donald S. Fussell, Masahiro Fujita |
Efficient Combinational Verification Using Overlapping Local BDDs and a Hash Table. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 21(1), pp. 95-101, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
20 | Nikos Gorogiannis, Mark Ryan 0001 |
Implementation of Belief Change Operators Using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Stud Logica ![In: Stud Logica 70(1), pp. 131-156, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
20 | Fadi A. Aloul, Maher N. Mneimneh, Karem A. Sakallah |
Search-Based SAT Using Zero-Suppressed BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France, pp. 1082, 2002, IEEE Computer Society, 0-7695-1471-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
20 | Felipe S. Marques 0001, Vinícius P. Correia, A. Prado, Marcelo Lubaszewski, André Inácio Reis |
Testability Properties of BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2002, Porto Alegre, Brazil, September 9-14, 2002, pp. 83-88, 2002, IEEE Computer Society, 0-7695-1807-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
|
20 | Görschwin Fey, Rolf Drechsler |
Minimizing the Number of Paths in BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2002, Porto Alegre, Brazil, September 9-14, 2002, pp. 359-364, 2002, IEEE Computer Society, 0-7695-1807-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
|
20 | Koichi Takahashi, Masami Hagiya |
Searching for Mutual Exclusion Algorithms Using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Progress in Discovery Science ![In: Progress in Discovery Science, Final Report of the Japanese Discovery Science Project, pp. 1-18, 2002, Springer, 3-540-43338-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
20 | Jorgiano Vidal, David Déharbe, Dominique Borrione |
Improving Static Ordering of BDDs for Reachability Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWLS ![In: 11th IEEE/ACM International Workshop on Logic & Synthesis, IWLS 2002, June 4-7, 2002, New Orleans, Louisiana, USA., pp. 73-77, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
|
20 | Ronald H. Hardin, Robert P. Kurshan, Sandeep K. Shukla, Moshe Y. Vardi |
A New Heuristic for Bad Cycle Detection Using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 18(2), pp. 131-140, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Sérgio Vale Aguiar Campos, Edmund M. Clarke |
The Verus language: representing time efficiently with BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theor. Comput. Sci. ![In: Theor. Comput. Sci. 253(1), pp. 95-118, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Janett Mohnke, Paul Molitor, Sharad Malik |
Application of BDDs in Boolean matching techniques for formal logic combinational verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 3(2), pp. 207-216, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Permutation independent comparison of Boolean functions, Signature of Boolean variables, Formal verification |
20 | Koichi Masukura, Minoru Tomisaka, Tomohiro Yoneda |
Verification of asynchronous circuits based on zero-suppressed BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Syst. Comput. Jpn. ![In: Syst. Comput. Jpn. 32(2), pp. 43-54, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Sérgio Queiroz de Medeiros, David Déharbe |
BDDmeter - Uma Ferramenta para Visualização Dinâmica de BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBES ![In: Proceedings of the 15th Brazilian Symposium on Software Engineering, SBES 2001, Rio de Janeiro, RJ, Brazil, October 3-5, 2001., pp. 350-355, 2001, SBC. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Katarzyna Radecka, Zeljko Zilic, Karim Khordoc |
Combinational verification by simulations, SAT and BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: Proceedings of the 2001 8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001, Malta, September 2-5, 2001, pp. 1627-1630, 2001, IEEE, 0-7803-7057-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Dirk Beyer 0001 |
Efficient Reachability Analysis and Refinement Checking of Timed Automata Using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHARME ![In: Correct Hardware Design and Verification Methods, 11th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2001, Livingston, Scotland, UK, September 4-7, 2001, Proceedings, pp. 86-91, 2001, Springer, 3-540-42541-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Real-time systems, Formal verification, Timed Automata |
20 | Rupesh S. Shelar, Sachin S. Sapatnekar |
Recursive Bipartitioning of BDDs for Performance Driven Synthesis of Pass Transistor Logic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2001, San Jose, CA, USA, November 4-8, 2001, pp. 449-452, 2001, IEEE Computer Society, 0-7803-7249-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah |
Faster SAT and Smaller BDDs via Common Function Structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2001, San Jose, CA, USA, November 4-8, 2001, pp. 443-448, 2001, IEEE Computer Society, 0-7803-7249-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Aarti Gupta, Zijiang Yang 0006, Pranav Ashar, Lintao Zhang, Sharad Malik |
Partition-Based Decision Heuristics for Image Computation Using SAT and BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2001, San Jose, CA, USA, November 4-8, 2001, pp. 286-292, 2001, IEEE Computer Society, 0-7803-7249-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Bernd Finkbeiner |
Language Containment Checking with Nondeterministic BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TACAS ![In: Tools and Algorithms for the Construction and Analysis of Systems, 7th International Conference, TACAS 2001 Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2001 Genova, Italy, April 2-6, 2001, Proceedings, pp. 24-38, 2001, Springer, 3-540-41865-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Alfonso San Miguel Aguirre, Moshe Y. Vardi |
Random 3-SAT and BDDs: The Plot Thickens Further. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CP ![In: Principles and Practice of Constraint Programming - CP 2001, 7th International Conference, CP 2001, Paphos, Cyprus, November 26 - December 1, 2001, Proceedings, pp. 121-136, 2001, Springer, 3-540-42863-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Amit Prakash, Adnan Aziz |
OC-3072 packet classification using BDDs and pipelined SRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hot Interconnects ![In: The Ninth Symposium on High Performance Interconnects, HOTI '01, Stanford, CA, USA, August 22-24, 2001, pp. 15-20, 2001, IEEE Computer Society, 0-7695-1357-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Wolfgang Günther 0001, Rolf Drechsler |
On the computational power of linearly transformed BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Process. Lett. ![In: Inf. Process. Lett. 75(3), pp. 119-125, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
20 | Martin Sauerhoff |
An Improved Hierarchy Result for Partitioned BDDs ![Search on Bibsonomy](Pics/bibsonomy.png) |
Electron. Colloquium Comput. Complex. ![In: Electron. Colloquium Comput. Complex. TR00, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP BibTeX RDF |
|
20 | André Inácio Reis, A. Prado, Marcelo Lubaszewski |
Testability Properties of Vertex Precedent BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2000, Manaus, Brazil, September 18-24, 2000, pp. 15-20, 2000, IEEE Computer Society, 0-7695-0843-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP BibTeX RDF |
|
20 | Ramesh Bharadwaj, Steve Sims |
Salsa: Combining Constraint Solvers with BDDs for Automatic Invariant Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TACAS ![In: Tools and Algorithms for Construction and Analysis of Systems, 6th International Conference, TACAS 2000, Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000, Berlin, Germany, March 25 - April 2, 2000, Proceedings, pp. 378-394, 2000, Springer, 3-540-67282-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
20 | Viresh Paruthi, Andreas Kuehlmann |
Equivalence Checking Combining a Structural SAT-Solver, BDDs, and Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000, pp. 459-464, 2000, IEEE Computer Society, 0-7695-0801-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
20 | Stefan Edelkamp |
Heuristic Search Planning with BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PuK ![In: Proceedings of the 14th Workshop `New Results in Planning, Scheduling and Design` (PuK2000), Berlin, 21-22 August 2000, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP BibTeX RDF |
|
20 | Rolf Drechsler, Wolfgang Günther 0001 |
Optimization of sequential verification by history-based dynamic minimization of BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings, pp. 737-740, 2000, IEEE. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
20 | Umberto Souza da Costa, David Déharbe, Anamaria Martins Moreira |
Variable Ordering of BDDs with Parallel Genetic Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDPTA ![In: Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA 2000, June 24-29, 2000, Las Vegas, Nevada, USA, 2000, CSREA Press. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP BibTeX RDF |
|
20 | Sérgio Vale Aguiar Campos, Marcio Teixeira, Marius Minea, Andreas Kuehlmann, Edmund M. Clarke |
Model Checking Semi-Continuous Time Models Using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SMC@FLoC ![In: First International Workshop on Symbolic Model Checking, SMC 1999, associated to FLoC'99, the 1999 Federated Logic Conference, Trento, Italy, July 6, 1999, pp. 75-87, 1999, Elsevier. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
20 | Patrice Godefroid, David E. Long |
Symbolic Protocol Verification with Queue BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 14(3), pp. 257-271, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
20 | Markus Siegle |
Compositional Representation and Reduction of Stochastic Labelled Transition Systems based on Decision Node BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MMB ![In: MMB '99, Messung, Modellierung und Bewertung von Rechen- und Kommunikationssystemen, Vorträge der 10. GI/NTG-Fachtagung, 22.-24. September 1999, Trier, pp. 173-185, 1999, VDE Verlag GmbH, Berlin, Offenbach, 3-8007-2472-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP BibTeX RDF |
|
20 | Armin Biere, Alessandro Cimatti, Edmund M. Clarke, Masahiro Fujita, Yunshan Zhu |
Symbolic Model Checking Using SAT Procedures instead of BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 36th Conference on Design Automation, New Orleans, LA, USA, June 21-25, 1999., pp. 317-320, 1999, ACM Press. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
20 | Olaf Schröer, Ingo Wegener |
The Theory of Zero-Suppressed BDDs and the Number of Knight's Tours. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 13(3), pp. 235-253, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
20 | Gianpiero Cabodi, Stefano Quer, Paolo Camurati |
Memory Optimization in Function and Set Manipulation with BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Softw. Pract. Exp. ![In: Softw. Pract. Exp. 28(1), pp. 99-120, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
20 | Harry Preuß, Anand Srivastav |
Blockwise Variable Orderings for Shared BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MFCS ![In: Mathematical Foundations of Computer Science 1998, 23rd International Symposium, MFCS'98, Brno, Czech Republic, August 24-28, 1998, Proceedings, pp. 636-644, 1998, Springer, 3-540-64827-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
20 | Reiner Lichtenecker, Klaus Gotthardt, Janusz Zalewski |
Automated Verification of Communication Protocols Using CCS and BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS/SPDP Workshops ![In: Parallel and Distributed Processing, 10 IPPS/SPDP'98 Workshops Held in Conjunction with the 12th International Parallel Processing Symposium and 9th Symposium on Parallel and Distributed Processing, Orlando, Florida, USA, March 30 - April 3, 1998, Proceedings, pp. 1057-1066, 1998, Springer, 3-540-64359-1. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
20 | G. L. J. M. Janssen |
Implementation of Propositional Temporal Logics Using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TABLEAUX ![In: Automated Reasoning with Analytic Tableaux and Related Methods, International Conference, TABLEAUX '98, Oisterwijk, The Netherlands, May 5-8, 1998, Proceedings, pp. 40-41, 1998, Springer, 3-540-64406-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
20 | Wilsin Gosti, Alberto L. Sangiovanni-Vincentelli, Tiziano Villa, Alexander Saldanha |
An Exact Input Encoding Algorithm for BDDs Representing FSMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 19-21 February 1998, Lafayette, LA, USA, pp. 294-300, 1998, IEEE Computer Society, 0-8186-8409-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
input encoding, finite state machines, binary decision diagrams, multi-valued decision diagrams |
20 | Wolfgang Günther 0001, Rolf Drechsler |
Linear Transformations and Exact Minimization of BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 19-21 February 1998, Lafayette, LA, USA, pp. 325-330, 1998, IEEE Computer Society, 0-8186-8409-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
FPGA, synthesis, BDD, linear transformation, variable ordering, spectral transformation |
20 | Shin-ichi Minato, Fabio Somenzi |
Arithmetic Boolean Expression Manipulator Using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 10(2/3), pp. 221-242, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
20 | Gueesang Lee |
Logic synthesis for cellular architecture FPGAs using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, Nippon Convention Center, Chiba, Japan, January 28-31, 1997, pp. 253-258, 1997, IEEE, 0-7803-3663-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
20 | F. Bianchi, Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Roberto Ansaloni |
Boolean Function Manipulation on a Parallel System Using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCN ![In: High-Performance Computing and Networking, International Conference and Exhibition, HPCN Europe 1997, Vienna, Austria, April 28-30, 1997, Proceedings, pp. 916-928, 1997, Springer, 3-540-62898-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
20 | David Déharbe, Anamaria Martins Moreira |
Using induction and BDDs to model check invariants. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHARME ![In: Advances in Hardware Design and Verification, IFIP WG 10.5 International Conference on Correct Hardware Design and Verification Methods, 16-18 October 1997, Montréal, Québec, Canada, pp. 203-213, 1997, Chapman & Hall, 0-412-81330-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP BibTeX RDF |
|
20 | Somesh Jha, Yuan Lu 0004, Marius Minea, Edmund M. Clarke |
Equivalence Checking Using Abstract BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, ICCD '97, Austin, Texas, USA, October 12-15, 1997, pp. 332-337, 1997, IEEE Computer Society, 0-8186-8206-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
20 | Sérgio Vale Aguiar Campos, Edmund M. Clarke |
The Verus Language: Representing Time Efficiently with BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARTS ![In: Transformation-Based Reactive Systems Development, 4th International AMAST Workshop on Real-Time Systems and Concurrent and Distributed Software, ARTS'97, Palma, Mallorca, Spain, May 21-23, 1997, Proceedings, pp. 64-78, 1997, Springer, 3-540-63010-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
20 | Jan Friso Groote |
Hiding Propositional Constants in BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 8(1), pp. 91-96, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
20 | Zeljko Zilic, Zvonko G. Vranesic |
Using BDDs to Design ULMs for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 1996 Fourth International Symposium on Field Programmable Gate Arrays, FPGA 1996, Monterey, CA, USA, February 11-13, 1996, pp. 24-30, 1996, ACM, 0-89791-773-1. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
20 | Patrice Godefroid, David E. Long |
Symbolic Protocol Verification With Queue BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LICS ![In: Proceedings, 11th Annual IEEE Symposium on Logic in Computer Science, New Brunswick, New Jersey, USA, July 27-30, 1996, pp. 198-206, 1996, IEEE Computer Society, 0-8186-7463-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
20 | Shin-ichi Minato |
Generation of BDDs from hardware algorithm descriptions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1996, San Jose, CA, USA, November 10-14, 1996, pp. 644-649, 1996, IEEE Computer Society / ACM, 0-8186-7597-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
LSI CAD, logic synthesis, BDD, design verification, hardware algorithm |
20 | Detlef Sieling, Ingo Wegener |
Graph Driven BDDs - A New Data Structure for Boolean Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theor. Comput. Sci. ![In: Theor. Comput. Sci. 141(1&2), pp. 283-310, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
20 | Bernd Becker 0001, Rolf Drechsler, Ralph Werchner |
On the Relation between BDDs and FDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Comput. ![In: Inf. Comput. 123(2), pp. 185-197, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
20 | Stacy A. Doyle, Joanne Bechta Dugan |
Dependability Assessment using Binary Decision Diagrams (BDDs). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FTCS ![In: Digest of Papers: FTCS-25, The Twenty-Fifth International Symposium on Fault-Tolerant Computing, Pasadena, California, USA, June 27-30, 1995, pp. 249-258, 1995, IEEE Computer Society, 0-8186-7079-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
20 | S. Minato |
Implicit manipulation of polynomials using zero-suppressed BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ED&TC ![In: 1995 European Design and Test Conference, ED&TC 1995, Paris, France, March 6-9, 1995, pp. 449-457, 1995, IEEE Computer Society, 0-8186-7039-8. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
20 | Shinya Ishihara, Shin-ichi Minato |
Manipulation of regular expressions under length constraints using zero-suppressed-BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29 - September 1, 1995, 1995, ACM, 0-89791-766-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
20 | Giacomo Buonanno, Fabrizio Ferrandi, Donatella Sciuto |
Data Path Testability Analysis Based on BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30 - May 3, 1995, pp. 2012-2014, 1995, IEEE, 0-7803-2570-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP BibTeX RDF |
|
20 | Bernd Becker 0001, Rolf Drechsler, Ralph Werchner |
On the Relation Betwen BDDs and FDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATIN ![In: LATIN '95: Theoretical Informatics, Second Latin American Symposium, Valparaíso, Chile, April 3-7, 1995, Proceedings, pp. 72-83, 1995, Springer, 3-540-59175-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
20 | Bernard Plessier, Gary D. Hachtel, Fabio Somenzi |
Extended BDDs: Trading off Canonicity for Structure in Verification Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 4(2), pp. 167-185, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
20 | James R. Bitner, Jawahar Jain, Magdy S. Abadir, Jacob A. Abraham, Donald S. Fussell |
Efficient Algorithmic Circuit Verification Using Indexed BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FTCS ![In: Digest of Papers: FTCS/24, The Twenty-Fourth Annual International Symposium on Fault-Tolerant Computing, Austin, Texas, USA, June 15-17, 1994, pp. 266-275, 1994, IEEE Computer Society, 0-8186-5520-8. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
20 | Jordan Gergov, Christoph Meinel |
Boolean Manipulation with Free BDDs: An Application in Combinational Logic Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IFIP Congress (1) ![In: Technology and Foundations - Information Processing '94, Volume 1, Proceedings of the IFIP 13th World Computer Congress, Hamburg, Germany, 28 August - 2 September, 1994, pp. 309-314, 1994, North-Holland, 0-444-81989-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP BibTeX RDF |
|
20 | Shin-ichi Minato |
Calculation of Unate Cube Set Algebra Using Zero-Suppressed BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 31st Conference on Design Automation, San Diego, California, USA, June 6-10, 1994., pp. 420-424, 1994, ACM Press, 0-7803-1836-6. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
20 | Alan J. Hu, Gary York, David L. Dill |
New Techniques for Efficient Verification with Implicitly Conjoined BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 31st Conference on Design Automation, San Diego, California, USA, June 6-10, 1994., pp. 276-282, 1994, ACM Press, 0-7803-1836-6. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
20 | Thomas R. Shiple, Ramin Hojati, Alberto L. Sangiovanni-Vincentelli, Robert K. Brayton |
Heuristic Minimization of BDDs Using Don't Cares. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 31st Conference on Design Automation, San Diego, California, USA, June 6-10, 1994., pp. 225-231, 1994, ACM Press, 0-7803-1836-6. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
20 | Reinhard Enders, Thomas Filkorn, Dirk Taubner |
Generating BDDs for Symbolic Model Checking in CCS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Distributed Comput. ![In: Distributed Comput. 6(3), pp. 155-164, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
20 | Klaus Schneider 0001, Ramayya Kumar, Thomas Kropf |
Hardware-Verification using First Order BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHDL ![In: Computer Hardware Description Languages and their Applications, Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications - CHDL '93, sponsored by IFIP WG10.2 and in cooperation with IEEE COMPSOC, Ottawa, Ontario, Canada, 26-28 April, 1993, pp. 45-62, 1993, North-Holland, 0-444-81641-0. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP BibTeX RDF |
|
20 | Insup Lee 0001, Sanguthevar Rajasekaran |
Fast Parallel Algorithms for Model Checking Using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: The Seventh International Parallel Processing Symposium, Proceedings, Newport Beach, California, USA, April 13-16, 1993., pp. 444-448, 1993, IEEE Computer Society, 0-8186-3442-1. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
20 | Shin-ichi Minato |
Zero-Suppressed BDDs for Set Manipulation in Combinatorial Problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 30th Design Automation Conference. Dallas, Texas, USA, June 14-18, 1993., pp. 272-277, 1993, ACM Press, 0-89791-577-1. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
20 | Lech Józwiak, Hein Mijland |
On the use of OR-BDDs for test generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microprogramming ![In: Microprocess. Microprogramming 35(1-5), pp. 159-166, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
20 | Jerry R. Burch |
Using BDDs to Verify Multipliers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 28th Design Automation Conference, San Francisco, California, USA, June 17-21, 1991., pp. 408-412, 1991, ACM, 0-89791395-7. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
20 | Hervé J. Touati, Hamid Savoj, Bill Lin 0001, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
Implicit State Enumeration of Finite State Machines Using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1990, Santa Clara, CA, USA, November 11-15, 1990. Digest of Technical Papers, pp. 130-133, 1990, IEEE Computer Society, 0-8186-2055-2. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
19 | Andy Jinqing Yu, Gianfranco Ciardo, Gerald Lüttgen |
Decision-diagram-based techniques for bounded reachability checking of asynchronous systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 11(2), pp. 117-131, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Edge-valued decision diagrams, Petri net, Formal verification, BDDs, Reachability analysis, Bounded model checking, Asynchronous design, ADDs |
19 | Martin Bravenboer, Yannis Smaragdakis |
Strictly declarative specification of sophisticated points-to analyses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OOPSLA ![In: Proceedings of the 24th Annual ACM SIGPLAN Conference on Object-Oriented Programming, Systems, Languages, and Applications, OOPSLA 2009, October 25-29, 2009, Orlando, Florida, USA, pp. 243-262, 2009, ACM, 978-1-60558-766-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
DOOP, datalog, bdds, points-to analysis, declarative |
19 | Tertia Hörne, John A. van der Poll |
Planning as model checking: the performance of ProB vs NuSMV. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAICSIT ![In: Proceedings of the 2008 Annual Conference of the South African Institute of Computer Scientists and Information Technologists on IT Research in Developing Countries, SAICSIT 2008, Wilderness, South Africa, October 6-8, 2008, pp. 114-123, 2008, ACM, 978-1-60558-286-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
tableaux theorem proving, model checking, planning, satisfiability, BDDs, constraint logic programming |
19 | Leomar S. da Rosa Jr., André Inácio Reis, Renato P. Ribas, Felipe de Souza Marques, Felipe Ribeiro Schneider |
A comparative study of CMOS gates with minimum transistor stacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2007, Copacabana, Rio de Janeiro, Brazil, September 3-6, 2007, pp. 93-98, 2007, ACM, 978-1-59593-816-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
PTL, unateness, BDDs, technology mapping, switch theory, logical effort, CMOS gates |
19 | Orna Grumberg, Tamir Heyman, Assaf Schuster |
A work-efficient distributed algorithm for reachability analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 29(2), pp. 157-175, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Distributed reachability, Distributed BDDs, Symbolic model checking |
19 | Anuj Goel, Khurram Sajid, Hai Zhou 0001, Adnan Aziz, Vigyan Singhal |
BDD Based Procedures for a Theory of Equality with Uninterpreted Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 22(3), pp. 205-224, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
logic of equality, BDDs, uninterpreted functions |
19 | Shoham Ben-David, Orna Grumberg, Tamir Heyman, Assaf Schuster |
Scalable distributed on-the-fly symbolic model checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 4(4), pp. 496-504, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Distributed, Memory, BDDs, Counterexample |
19 | Rolf Drechsler, Junhao Shi, Görschwin Fey |
MuTaTe: an efficient design for testability technique for multiplexor based circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003, pp. 80-83, 2003, ACM, 1-58113-677-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
multiplexor based circuits, design for testability, logic synthesis, BDDs, decision diagrams |
19 | Peter Dybjer, Qiao Haiyan, Makoto Takeyama |
Verifying Haskell Programs by Combining Testing and Proving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
QSIC ![In: 3rd International Conference on Quality Software (QSIC 2003), 6-7 November 2003, Dallas, TX, USA, pp. 272-279, 2003, IEEE Computer Society, 0-7695-2015-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
BDDs and Haskell, program verification, random testing, type theory, proof-assistants |
19 | Alan Mishchenko, Tsutomu Sasao |
Large-scale SOP minimization using decomposition and functional properties. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 149-154, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
SOP minimization, disjoint-support decomposition, orthodox functions, BDDs, divide-and-conquer strategy |
19 | Sasha Novakovsky, Shy Shyman, Ziyad Hanna |
High capacity and automatic functional extraction tool for industrial VLSI circuit designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, ICCAD 2002, San Jose, California, USA, November 10-14, 2002, pp. 520-525, 2002, ACM / IEEE Computer Society, 0-7803-7607-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Formal Equivalence Verification (FEV), Hardware Description Languages (HDL), Switch Level Analysis, functional abstraction, satisfiability procedures, synthesis, Design For Testability (DFT), logic simulation, Binary Decision Diagrams (BDDs) |
19 | Philipp Woelfel |
On the Complexity of Integer Multiplication in Branching Programs with Multiple Tests and in Read-Once Branching Programs with Limited Nondeterminism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCC ![In: Proceedings of the 17th Annual IEEE Conference on Computational Complexity, Montréal, Québec, Canada, May 21-24, 2002, pp. 80-89, 2002, IEEE Computer Society, 0-7695-1468-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Lower Bounds, BDDs, Nondeterminism, Branching Programs, Integer Multiplication |
19 | Fadi A. Aloul, Brian D. Sierawski, Karem A. Sakallah |
Satometer: how much have we searched? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 737-742, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
conflict diagnosis, search progress, search space coverage, SAT, BDDs, CNF, backtrack search, ZBDDs |