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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 964 occurrences of 527 keywords
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Results
Found 604 publication records. Showing 604 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Partha Biswas, Girish Venkataramani |
Comprehensive isomorphic subtree enumeration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 177-186, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
subtree isomorphism, subtree matching algorithm, embedded systems |
1 | Ben Lickly, Isaac Liu, Sungjun Kim, Hiren D. Patel, Stephen A. Edwards, Edward A. Lee |
Predictable programming on a precision timed architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 137-146, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
pipeline, memory hierarchy, timing predictability |
1 | Seyed-Hosein Attarzadeh-Niaki, Alessandro Cevrero, Philip Brisk, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne |
Design space exploration for field programmable compressor trees. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 207-216, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
design space exploration (dse), field programmable compressor tree (fpct) |
1 | Mohammed G. Khatib, Pieter H. Hartel |
Power management of MEMS-based storage devices for mobile systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 245-254, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
probe-based storage, power management, energy, MEMS |
1 | Yousra Alkabani, Farinaz Koushanfar |
Active control and digital rights management of integrated circuit IP cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 227-234, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
active IP control, security, IP protection |
1 | Erik R. Altman (eds.) |
Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008 ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![ACM The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP BibTeX RDF |
|
1 | Ajay Nair, Roman L. Lysecky |
Non-intrusive dynamic application profiler for detailed loop execution characterization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 23-30, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
nonintrusive, embedded systems, profiling, dynamic optimization |
1 | Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau |
Control flow optimization in loops using interval analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 157-166, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
algorithmic code transformation, compiler loop optimization, interval analysis |
1 | Houman Homayoun, Mohammad A. Makhzan, Alexander V. Veidenbaum |
Multiple sleep mode leakage control for cache peripheral circuits in embedded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 197-206, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multiple sleep mode, peripheral circuits, cache, embedded processor, leakage power |
1 | Oreste Villa, Gianluca Palermo, Cristina Silvano |
Efficiency and scalability of barrier synchronization on NoC based many-core architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 81-90, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
scalability, synchronization, efficiency, Multicore, NoC, barrier, Manycore |
1 | Alastair David Reid, Krisztián Flautner, Edmund Grimley-Evans, Yuan Lin 0002 |
SoC-C: efficient programming abstractions for heterogeneous multicore systems on chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 95-104, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
energy efficiency, embedded, parallel language |
1 | Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose |
VESPA: portable, scalable, and flexible FPGA-based vector processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 61-70, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
SPREE, VESPA, VIRAM, FPGA, custom, SIMD, vector, ASIP, microarchitecture, application specific, soft processor |
1 | Christophe Dubach, Timothy M. Jones 0001, Michael F. P. O'Boyle |
Exploring and predicting the architecture/optimising compiler co-design space. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 31-40, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
architecture/compiler co-design, performance prediction, design-space exploration |
1 | Michael B. Henry, Syed Imtiaz Haider, Leyla Nazhandali |
A low-power parallel design of discrete wavelet transform using subthreshold voltage technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 235-244, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
low power, parallel, wavelet, subthreshold |
1 | Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason A. Blome, Scott A. Mahlke |
StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 1-10, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
reliability, architecture, pipeline, multicore |
1 | José Baiocchi, Bruce R. Childers, Jack W. Davidson, Jason Hiser |
Reducing pressure in bounded DBT code caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 109-118, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
footprint reduction, system-on-chip, code generation, dynamic binary translation |
1 | Yu Sun 0006, Wei Zhang 0002 |
Efficient code caching to improve performance and energy consumption for java applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 119-126, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
code caching, code generation, java virtual machine, instruction cache, JIT compiler |
1 | Bill Athas |
Power on demand for mobile computing devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 79, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
1 | Amir Hormati, Manjunath Kudlur, Scott A. Mahlke, David F. Bacon, Rodric M. Rabbah |
Optimus: efficient realization of streaming applications on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 41-50, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
optimization, FPGA, embedded systems, compiler, streaming, heterogeneous |
1 | Melhem Tawk, Khaled Z. Ibrahim, Smaïl Niar |
Multi-granularity sampling for simulating concurrent heterogeneous applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 217-226, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
simulation sampling, multiprocessor system-on-chip, simulation acceleration |
1 | Florent Bouchez, Alain Darte, Fabrice Rastello |
Advanced conservative and optimistic register coalescing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 147-156, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
coloring number, greedy-k-colorable graph, register allocation, chordal graph, register coalescing |
1 | Chen Huang 0005, Frank Vahid |
Dynamic coprocessor management for FPGA-enhanced compute platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 71-78, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
coprocessing, online algorithms., FPGAs, dynamic optimization, acceleration, runtime configuration |
1 | Paolo Bonzini, Giovanni Ansaloni, Laura Pozzi |
Compiling custom instructions onto expression-grained reconfigurable architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 51-60, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
horizontal microprogramming, compilers, instruction set extensions, coarse-grained reconfigurable architectures, data-flow architectures |
1 | Wolfgang Puffitsch |
Decoupled root scanning in multi-processor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 91-98, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
real-time, garbage collection, multi-processor |
1 | Ajay Kumar Verma, Philip Brisk, Paolo Ienne |
Rethinking custom ISE identification: a new processor-agnostic method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 125-134, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
ISE identification, custom processors, maximal cluster |
1 | Angel Dominguez, Nghi Nguyen, Rajeev Barua |
Recursive function data allocation to scratch-pad memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 65-74, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
profile dependance, embedded systems, compiler, memory allocation, recursive functions, scratch-pad memory |
1 | Andrea Marongiu, Luca Benini, Mahmut T. Kandemir |
Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 145-149, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
code parallelization, MPSoCs, barrier synchronization |
1 | Ravishankar Rao, Sarma B. K. Vrudhula |
Performance optimal processor throttling under thermal constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 257-266, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
leakage dependence on temperature, power, thermal management, thermal model, throttling |
1 | Rahul Nagpal, Arvind Madan, Bharadwaj Amrutur, Y. N. Srikant |
INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 238-247, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
interconnect, energy modeling, energy-aware scheduling, clustered VLIW processors |
1 | Huynh Phung Huynh, Joon Edward Sim, Tulika Mitra |
An efficient framework for dynamic reconfiguration of instruction-set customization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 135-144, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
dynamic reconfiguration, instruction-set extensions, temporal partitioning, customizable processors |
1 | Hugo Venturini, Frédéric Riss, Jean-Claude Fernandez, Miguel Santana |
Non-transparent debugging for software-pipelined loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 23-32, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
non-transparent debugging, compiler, software-pipelining, debugger |
1 | Luis A. Plana, Doug A. Edwards, Sam Taylor, Luis A. Tarazona, Andrew Bardsley |
Performance-driven syntax-directed synthesis of asynchronous processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 43-47, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
handshake components, syntax-directed synthesis, asynchronous circuits |
1 | Stefan Schäckeler, Weijia Shang |
Stack size reduction of recursive programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 48-52, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
stack size reduction, embedded systems, recursion |
1 | Yuan Lin 0002, Manjunath Kudlur, Scott A. Mahlke, Trevor N. Mudge |
Hierarchical coarse-grained stream compilation for software defined radio. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 115-124, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
MPSoC compilation, dataflow programming model, software defined radio, modulo scheduling |
1 | Karthik Ramani, Al Davis |
Application driven embedded system design: a face recognition case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 103-114, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
embedded systems, compilers, face recognition, workload characterization, instruction scheduling, domain specific architectures |
1 | Walid A. Najjar |
Compiling code accelerators for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 1-2, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
FPGA code acceleration |
1 | Ben L. Titzer, Jens Palsberg |
Vertical object layout and compression for fixed heaps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 170-178, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
heap optimization, object layout, pointer compression, program data compression, reference compression, vertical object layout, microcontrollers |
1 | Trevor N. Mudge |
Multicore architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 208, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
multicore |
1 | Rakesh Reddy, Peter Petrov |
Eliminating inter-process cache interference through cache reconfigurability for real-time and low-power embedded multi-tasking systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 198-207, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
real-time embedded systems, cache interference |
1 | Hoeseok Yang, Sungchan Kim, Hae-woo Park, Jinwoo Kim, Soonhoi Ha |
Performance evaluation and optimization of dual-port SDRAM architecture for mobile embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 53-57, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
dual-port SDRAM, mobile embedded system, memory architecture |
1 | Ahmad Zmily, Christos Kozyrakis |
A low power front-end for embedded processors using a block-aware instruction set. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 267-276, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
instruction re-ordering, low power front-end, software hints, tagless instruction cache, unified instruction cache and BTB, instruction prefetching |
1 | Chengmo Yang, Alex Orailoglu |
Light-weight synchronization for inter-processor communication acceleration on embedded MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 150-154, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
synchronization, interprocessor communication |
1 | Kevin K. O'Brien |
Techniques for code and data management in the local stores of the cell processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 63-64, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
invited talk |
1 | Carmen Badea, Alexandru Nicolau, Alexander V. Veidenbaum |
A simplified java bytecode compilation system for resource-constrained embedded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 218-228, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
superoperators, embedded systems, java virtual machine, adaptive optimization, profile-guided optimization |
1 | Taewhan Kim, Pascal Sainrat, Steven S. Lumetta, Nacho Navarro (eds.) |
Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007 ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![ACM The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
1 | Christopher Zimmer 0001, Stephen Roderick Hines, Prasad A. Kulkarni, Gary S. Tyson, David B. Whalley |
Facilitating compiler optimizations through the dynamic mapping of alternate register structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 165-169, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
register queues, compiler optimizations, software pipelining |
1 | Florian Brandner, Dietmar Ebner, Andreas Krall |
Compiler generation from structural architecture descriptions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 13-22, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
ADL, architecture description, retargetable compiler |
1 | Jaw-Wei Chi, Chia-Lin Yang, Yi-Jung Chen, Jian-Jia Chen |
Cache leakage control mechanism for hard real-time systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 248-256, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
cache leakage control policy, hard real-time system |
1 | Doosan Cho, Ilya Issenin, Nikil D. Dutt, Jonghee W. Yoon, Yunheung Paek |
Software controlled memory layout reorganization for irregular array access patterns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 179-188, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
energy consumption, data layout, scratch pad memory |
1 | Greg Hoover, Forrest Brewer, Timothy Sherwood |
Towards understanding architectural tradeoffs in MEMS closed-loop feedback control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 95-102, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
MEMS control, embedded architecture |
1 | Dawoon Jung 0001, Yoon-Hee Chae, Heeseung Jo, Jinsoo Kim 0001, Joonwon Lee |
A group-based wear-leveling algorithm for large-capacity flash memory storage systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 160-164, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
embedded system, flash memory, storage systems, wear leveling |
1 | Philip Brisk, Ajay Kumar Verma, Paolo Ienne |
An optimistic and conservative register assignment heuristic for chordal graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 209-217, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
static single assignment (ssa) form, chordal graph, register assignment |
1 | Raimund Kirner |
SCCP/x: a compilation profile to support testing and verification of optimized code. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 38-42, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
decision coverage, structural code-coverage preservation, optimization, testing, compiler, code transformation |
1 | Tom Vander Aa, Bingfeng Mei, Bjorn De Sutter |
A backtracking instruction scheduler using predicate-based code hoisting to fill delay slots. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 229-237, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
VLIW scheduling, code hoisting, predication |
1 | Roger Moussali, Nabil Ghanem, Mazen A. R. Saghir |
Supporting multithreading in configurable soft processor cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 155-159, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
soft processor cores, multithreading |
1 | José Baiocchi, Bruce R. Childers, Jack W. Davidson, Jason Hiser, Jonathan Misurda |
Fragment cache management for dynamic binary translators in embedded systems with scratchpad. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 75-84, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
embedded systems, dynamic binary translation, scratchpad |
1 | Syed Imtiaz Haider, Leyla Nazhandali |
A hybrid code compression technique using bitmask and prefix encoding with enhanced dictionary selection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 58-62, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
bitmask, embedded systems, code compression |
1 | Lei Gao, Stefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr |
A fast and generic hybrid simulation approach using C virtual machine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 3-12, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
simulation, virtual machine, debugging |
1 | Sharad Singhai, MingYung Ko, Sanjay Jinturkar, Mayan Moudgill, John Glossner |
An integrated ARM and multi-core DSP simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 33-37, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
multi-core simulation, performance measurement, just-in-time compilation, ARM, dynamic translation, embedded architectures |
1 | Nghi Nguyen, Angel Dominguez, Rajeev Barua |
Scratch-pad memory allocation without compiler support for java applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 85-94, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
java, embedded systems, compiler, JVM, memory allocation, JIT, scratch-pad |
1 | Weixing Ji, Feng Shi 0009, Baojun Qiao |
A self-maintained memory module supporting DMM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 189-197, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
active memory module, object-based cache, object-oriented programming, dynamic memory management |
1 | John Gilbert, David M. Abrahamson |
Adaptive object code compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 282-292, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
code compression, code size reduction, code compaction |
1 | Jason A. Blome, Shantanu Gupta, Shuguang Feng, Scott A. Mahlke |
Cost-efficient soft error protection for embedded microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 421-431, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
reliability, embedded processors, soft errors |
1 | Mark Hempstead, Gu-Yeon Wei, David M. Brooks |
Architecture and circuit techniques for low-throughput, energy-constrained systems across technology generations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 368-378, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
wireless sensor networks, low power, system architecture, technology scaling, leakage power reduction |
1 | Hyunchul Park 0001, Kevin Fan, Manjunath Kudlur, Scott A. Mahlke |
Modulo graph embedding: mapping applications onto coarse-grained reconfigurable architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 136-146, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
graph embedding, modulo scheduling, coarse-grained reconfigurable architecture |
1 | Ka-Ming Keung, Akhilesh Tyagi |
State space reconfigurability: an implementation architecture for self modifying finite automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 83-92, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
SMFA, architecture, reconfigurability, FSM |
1 | Paolo Bonzini, Laura Pozzi |
Code transformation strategies for extensible embedded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 242-252, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
compilers, ASIPs, instruction-set extensions, customizable processors |
1 | Dong-Heon Jung, Sung-Hwan Bae, Jaemok Lee, Soo-Mook Moon, Jong Kuk Park |
Supporting precise garbage collection in Java Bytecode-to-C ahead-of-time compiler for embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 35-42, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Bytecode-to-C, J2ME CDC, ahead-of-time compiler, precise garbage collection, java virtual machine |
1 | Bernhard Egger 0002, Chihun Kim, Choonki Jang, Yoonsung Nam, Jaejin Lee, Sang Lyul Min |
A dynamic code placement technique for scratchpad memory using postpass optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 223-233, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
embedded systems, compilers, scratchpad memory, demand paging, code placement, postpass optimization, heterogeneous memory |
1 | Dong Hyuk Woo, Mrinmoy Ghosh, Emre Özer 0001, Stuart Biles, Hsien-Hsin S. Lee |
Reducing energy of virtual cache synonym lookup using bloom filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 179-189, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
low power, cache, bloom filter, synonym |
1 | John Cavazos, Christophe Dubach, Felix V. Agakov, Edwin V. Bonilla, Michael F. P. O'Boyle, Grigori Fursin, Olivier Temam |
Automatic performance model construction for the fast software exploration of new hardware designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 24-34, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
machine learning, architecture, artificial neural networks, performance modelling, compiler optimization |
1 | Ankush Varma, Muhammad Yaqub Afridi, Akin Akturk, Paul Klein, Allen R. Hefner, Bruce L. Jacob |
Modeling heterogeneous SoCs with SystemC: a digital/MEMS case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 54-64, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
gas sensor, microhotplate, modeling, power, SystemC, MEMS |
1 | Manuel Carro, José F. Morales 0001, Henk L. Muller, Germán Puebla, Manuel V. Hermenegildo |
High-level languages for small devices: a case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 271-281, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
program analysis and transformation, wearable computers, optimizing compilation, (constraint) logic programming |
1 | Chengmo Yang, Alex Orailoglu |
Power efficient branch prediction through early identification of branch addresses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 169-178, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
low-power design, application-specific processors, dynamic branch prediction |
1 | Greg Hoover, Forrest Brewer, Timothy Sherwood |
Extensible control architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 323-333, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
specification methodology, control architecture |
1 | Bernhard Scholz, Bernd Burgstaller, Jingling Xue |
Minimizing bank selection instructions for partitioned memory architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 201-211, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
PBQP, RAM allocation, bank-switching, partitioned memory architecture, compiler optimization, microcontrollers |
1 | Hiroshi Nakashima, Masahiro Konishi, Takashi Nakada |
An accurate and efficient simulation-based analysis for worst case interruption delay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 2-12, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
worst case interruption delay, cycle accurate simulation |
1 | Hans-Peter Löb, Rainer Buchty, Wolfgang Karl |
A network agent for diagnosis and analysis of real-time Ethernet networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 65-73, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
industrial Ethernet, real-time, monitoring, system-on-chip |
1 | Lan S. Bai, Lei Yang 0017, Robert P. Dick |
Automated compile-time and run-time techniques to increase usable memory in MMU-less embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 125-135, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
wireless sensor network, embedded system, data compression |
1 | Liang-Gee Chen |
Dances with multimedia: embedded video codec design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 1, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Chinnakrishnan S. Ballapuram, Kiran Puttaswamy, Gabriel H. Loh, Hsien-Hsin S. Lee |
Entropy-based low power data TLB design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 304-311, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
low-power TLB, spatial and temporal locality, entropy |
1 | Taeho Kgil, Trevor N. Mudge |
FlashCache: a NAND flash memory file cache for low power web servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 103-112, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
full-system, server platforms, simulation, embedded system, low power, flash memory, web server, application-specific architectures |
1 | Kim M. Hazelwood, Artur Klauser |
A dynamic binary instrumentation engine for the ARM architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 261-270, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
binary instrumentation, pin, dynamic translation, embedded architectures |
1 | Seon-Yeong Park, Dawoon Jung 0001, Jeong-Uk Kang, Jinsoo Kim 0001, Joonwon Lee |
CFLRU: a replacement algorithm for flash memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 234-241, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
embedded storage, flash memory, replacement algorithm |
1 | Charles Hardnett, Krishna V. Palem, Yogesh Chobe |
Compiler optimization of embedded applications for an adaptive SoC architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 312-322, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
compilers, resource allocation, system on chip, reconfigurable computing, resource scheduling |
1 | Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis |
Limitations of special-purpose instructions for similarity measurements in media SIMD extensions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 293-303, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
sub-word parallelism, similarity measurements, SIMD |
1 | Lukasz Strozek, David M. Brooks |
Efficient architectures through application clustering and architectural heterogeneity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 190-200, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
efficient custom architectures, heterogeneous CMP |
1 | Noel Eisley, Vassos Soteriou, Li-Shiuan Peh |
High-level power analysis for multi-core chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 389-400, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
simulation, chip multiprocessor (CMP), multi-core, power analysis, system-on-a-chip (SoC) |
1 | Greg Hoover, Forrest Brewer, Timothy Sherwood |
A case study of multi-threading in the embedded space. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 357-367, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
multi-threading, embedded architecture |
1 | Arran Derbyshire, Tobias Becker, Wayne Luk |
Incremental elaboration for run-time reconfigurable hardware designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 93-102, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
incremental elaboration, run-time reconfiguration, hardware compilation |
1 | Duo Liu, Bei Hua, Xianghui Hu, Xinan Tang |
High-performance packet classification algorithm for many-core and multithreaded network processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 334-344, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
architecture, multithreading, network processor, packet classification, thread-level parallelism, embedded system design |
1 | Neil C. Audsley, Michael Ward |
Syntax-driven implementation of software programming language control constructs and expressions on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 253-260, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
fpga, compilation, language |
1 | Mats Brorsson, Mikael Collin |
Adaptive and flexible dictionary code compression for embedded applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 113-124, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
dictionary code compression, fetch path energy, instruction memory bandwidth, instruction profiling, processor architecture |
1 | Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitra |
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 401-410, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
scheduling, MPSoC, scratchpad memory, task mapping |
1 | Razvan Racu, Arne Hamann, Rolf Ernst, Bren Mochocki, Xiaobo Sharon Hu |
Methods for power optimization in distributed embedded systems with real-time requirements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 379-388, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
SymTA/S, real-time systems, evolutionary algorithms, dynamic voltage scaling, sensitivity analysis, timing analysis, power optimization |
1 | Yoonseo Choi, Hwansoo Han |
Protected heap sharing for memory-constrained java environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 212-222, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
heap sharing, memory protection unit, garbage collection, dynamic memory management |
1 | Seongsoo Hong, Wayne H. Wolf, Krisztián Flautner, Taewhan Kim (eds.) |
Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006 ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![ACM, 1-59593-543-6 The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP BibTeX RDF |
|
1 | Anahita Shayesteh, Glenn Reinman, Norman P. Jouppi, Timothy Sherwood, Suleyman Sair |
Improving the performance and power efficiency of shared helpers in CMPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 345-356, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
constructive sharing, factored core, flexible sharing, helper configuration, helper engine, sharing policy, CMP, phase |
1 | Won So, Alexander G. Dean |
Reaching fast code faster: using modeling for efficient software thread integration on a VLIW DSP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 13-23, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
TI C6000, static profitability estimation, DSP, software pipelining, VLIW, iterative compilation, software thread integration |
1 | Nathan Clark, Amir Hormati, Scott A. Mahlke, Sami Yehia |
Scalable subgraph mapping for acyclic computation accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 147-157, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
compilation, embedded processors |
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