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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 666 occurrences of 255 keywords
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Results
Found 627 publication records. Showing 627 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Arash Reyhani-Masoleh |
A New Bit-Serial Architecture for Field Multiplication Using Polynomial Bases. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 300-314, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Finite or Galois field, Mastrovito multiplier, polynomial basis, bit-serial multiplier |
1 | Wolfgang Killmann, Werner Schindler |
A Design for a Physical RNG with Robust Entropy Estimators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 146-163, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Physical RNG, entropy, stochastic model |
1 | Stefan Tillich, Christoph Herbst |
Attacking State-of-the-Art Software Countermeasures-A Case Study for AES. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 228-243, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
software countermeasures, operation randomization, advanced DPA attacks, smart card, Advanced Encryption Standard, side channel attacks, power analysis, masking |
1 | Dai Yamamoto, Jun Yajima, Kouichi Itoh |
A Very Compact Hardware Implementation of the MISTY1 Block Cipher. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 315-330, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
MISTY1, Compact Implementation, Block cipher, Hardware, ASIC |
1 | Karthik Baddam, Mark Zwolinski |
Divided Backend Duplication Methodology for Balanced Dual Rail Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 396-410, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Dual Rail Routing, Dual Rail FPGA Implementation, Differential Power Analysis |
1 | Adi Shamir |
RSA-Past, Present, Future. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 443, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
1 | Philipp Grabher, Johann Großschädl, Dan Page |
Light-Weight Instruction Set Extensions for Bit-Sliced Cryptography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 331-345, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
1 | Ernie Brickell |
A Vision for Platform Security. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 444, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
1 | Daniel J. Bernstein, Tanja Lange 0001, Reza Rezaeian Farashahi |
Binary Edwards Curves. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 244-265, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Edwards curves, complete addition law, Montgomery ladder, countermeasures against side-channel attacks, Elliptic curves, binary fields |
1 | Elisabeth Oswald, Pankaj Rohatgi (eds.) |
Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![Springer, 978-3-540-85052-6 The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
1 | Benedikt Gierlichs, Lejla Batina, Pim Tuyls, Bart Preneel |
Mutual Information Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 426-442, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Differential Side-Channel Analysis (DSCA), DPA-resistant logic, Information Theory, Mutual Information |
1 | Timo Gendrullis, Martin Novotný, Andy Rupp |
A Real-World Attack Breaking A5/1 within Hours. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 266-282, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
A5/1, COPACOBANA, GSM, special-purpose hardware |
1 | Jean-Sébastien Coron, Christophe Giraud 0001, Emmanuel Prouff, Matthieu Rivain |
Attack and Improvement of a Secure S-Box Calculation Based on the Fourier Transform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 1-14, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
1 | Alexandre Berzati, Cécile Canovas, Louis Goubin |
Perturbating RSA Public Keys: An Improved Attack. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 380-395, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
RSA, public key, fault attacks, DFA |
1 | Akashi Satoh, Takeshi Sugawara 0001, Naofumi Homma, Takafumi Aoki |
High-Performance Concurrent Error Detection Scheme for AES Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 100-112, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
1 | François-Xavier Standaert, Cédric Archambeau |
Using Subspace-Based Template Attacks to Compare and Combine Power and Electromagnetic Information Leakages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 411-425, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
1 | Nele Mentens, Benedikt Gierlichs, Ingrid Verbauwhede |
Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 346-362, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
1 | Naofumi Homma, Atsushi Miyamoto, Takafumi Aoki, Akashi Satoh, Adi Shamir |
Collision-Based Power Analysis of Modular Exponentiation Using Chosen-Message Pairs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 15-29, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
waveform matching, RSA, side-channel attacks, modular exponentiation, power-analysis attacks |
1 | Andrey Bogdanov, Gregor Leander, Christof Paar, Axel Poschmann, Matthew J. B. Robshaw, Yannick Seurin |
Hash Functions and RFID Tags: Mind the Gap. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 283-299, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
1 | Ihor Vasyltsov, Eduard Hambardzumyan, Young-Sik Kim, Bohdan Karpinskyy |
Fast Digital TRNG Based on Metastable Ring Oscillator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 164-180, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Digital TRNG, Metastable Ring Oscillator, AIS.31, FPGA |
1 | Mehran Mozaffari Kermani, Arash Reyhani-Masoleh |
A Lightweight Concurrent Fault Detection Scheme for the AES S-Boxes Using Normal Basis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 113-129, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
fault detection, Advanced encryption standard, S-box, normal basis |
1 | David Vigilant |
RSA with CRT: A New Cost-Effective Solution to Thwart Fault Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 130-145, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Software countermeasure, RSA, Chinese Remainder Theorem, Fault attacks, Modular exponentiation, Bellcore attack |
1 | Colin D. Walter |
Recovering Secret Keys from Weak Side Channel Traces of Differing Lengths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings, pp. 214-227, 2008, Springer, 978-3-540-85052-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Hidden Markov Models, simple power analysis, SPA, Viterbi Algorithm, Forward-Backward Algorithm, Side channel leakage |
1 | Alex Biryukov, Dmitry Khovratovich |
Two New Techniques of Side-Channel Cryptanalysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 195-208, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | François Macé, François-Xavier Standaert, Jean-Jacques Quisquater |
Information Theoretic Evaluation of Side-Channel Resistant Logic Styles. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 427-442, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Thomas Popp, Mario Kirschbaum, Thomas Zefferer, Stefan Mangard |
Evaluation of the Masked Logic Style MDPL on a Prototype Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 81-94, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
DPA-Resistant Logic Styles, Masked Logic, Dual-Rail Precharge Logic, Early Propagation Effect, Improved MDPL, Prototype Chip |
1 | Hirotaka Yoshida, Dai Watanabe, Katsuyuki Okeya, Jun Kitahara, Hongjun Wu 0001, Özgül Küçük, Bart Preneel |
MAME: A Compression Function with Reduced Hardware Requirements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 148-165, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
low-resource implementation, hash functions, compression functions |
1 | Michael Hutter, Stefan Mangard, Martin Feldhofer |
Power and EM Attacks on Passive 13.56 MHz RFID Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 320-333, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
EM Attacks, RFID, AES, Side-Channel Attacks, DPA, Power Analysis, DEMA |
1 | Christophe Clavier, Jean-Sébastien Coron |
On the Implementation of a Fast Prime Generation Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 443-449, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Prime generation algorithm, Coppersmith’s theorem, Simple Power Analysis |
1 | Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert Felber, Matthias Braendli |
Multi-gigabit GCM-AES Architecture Optimized for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 227-238, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Galois/Counter Mode (GCM), hybrid multiplier, Field Programmable Gate Array (FPGA), Very Large Scale Integration (VLSI), Advanced Encryption Standard (AES), high throughput, digit-serial multiplier, bit-parallel multiplier |
1 | Reouven Elbaz, David Champagne, Ruby B. Lee, Lionel Torres, Gilles Sassatelli, Pierre Guillemin |
TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 289-302, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Memory Integrity, Physical Attacks, Tamper Evidence, Parallelizability, Confidentiality, Replay Attacks, Merkle Trees |
1 | Olivier Savry, Florian Pebay-Peyroula, François Dehmas, Gérard Robert, Jacques Reverdy |
RFID Noisy Reader How to Prevent from Eavesdropping on the Communication? ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 334-345, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
ISO 14443, Tausworthe cell, RFID, smartcard, eavesdropping, RNG |
1 | Stefan Tillich, Johann Großschädl |
Power Analysis Resistant AES Implementation with Instruction Set Extensions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 303-319, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
embedded RISC processor, SPARC V8 architecture, SCA resistance, Advanced Encryption Standard, power analysis, instruction set extensions |
1 | Marc Joye |
Highly Regular Right-to-Left Algorithms for Scalar Multiplication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 135-147, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
constrained devices, cryptography, Scalar multiplication, exponentiation, implementation attacks |
1 | Alex Biryukov, Andrey Bogdanov, Dmitry Khovratovich, Timo Kasper |
Collision Attacks on AES-Based MAC: Alpha-MAC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 166-180, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Alpha-MAC, selective forgery, MAC, AES, side-channel attack, message authentication codes, collision attack |
1 | Pascal Paillier, Ingrid Verbauwhede (eds.) |
Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![Springer, 978-3-540-74734-5 The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Markus Dichtl, Jovan Dj. Golic |
High-Speed True Random Number Generation with Logic Gates Only. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 45-62, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
generalized ring oscillators, true randomness, Random number generation, logic gates, ring oscillators |
1 | Owen Harrison, John Waldron |
AES Encryption Implementation and Analysis on Commodity Graphics Processing Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 209-226, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
GPU, AES, Hardware Accelerated, Graphics Processor |
1 | Tetsuya Izu, Jun Kogure, Takeshi Shimoyama |
CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 364-377, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
the number field sieve method (NFS), the sieving step, FPGA, implementation, Integer factorization |
1 | Kimmo U. Järvinen, Juha Forsten, Jorma Skyttä |
FPGA Design of Self-certified Signature Verification on Koblitz Curves. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 256-271, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Jean-Sébastien Coron, Emmanuel Prouff, Matthieu Rivain |
Side Channel Cryptanalysis of a Higher Order Masking Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 28-44, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Higher Order DPA, Masking Scheme, Side Channel Attacks, Differential Power Analysis, Template Attacks |
1 | Andrey Bogdanov, Lars R. Knudsen, Gregor Leander, Christof Paar, Axel Poschmann, Matthew J. B. Robshaw, Yannick Seurin, C. Vikkelsoe |
PRESENT: An Ultra-Lightweight Block Cipher. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 450-466, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Joshua Jaffe |
A First-Order DPA Attack Against AES in Counter Mode with Unknown Initial Counter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 1-13, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
HO-DPA, AES, DPA, power analysis, SPA, counter mode |
1 | Daisuke Suzuki |
How to Maximize the Potential of FPGA Resources for Modular Exponentiation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 272-288, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto |
Arithmetic Operators for Pairing-Based Cryptography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 239-255, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
FPGA, elliptic curve, hardware accelerator, finite field arithmetic, ? T pairing |
1 | Jorge Guajardo, Sandeep S. Kumar, Geert Jan Schrijen, Pim Tuyls |
FPGA Intrinsic PUFs and Their Use for IP Protection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 63-80, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Gerald DeJean, Darko Kirovski |
RF-DNA: Radio-Frequency Certificates of Authenticity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 346-363, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Guerric Meurice de Dormale, Philippe Bulens, Jean-Jacques Quisquater |
Collision Search for Elliptic Curve Discrete Logarithm over GF(2 m ) with FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 378-393, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Benedikt Gierlichs |
DPA-Resistance Without Routing Constraints? ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 107-120, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Differential Side Channel Analysis, DSCA, Masked Dual-rail Pre-charge Logic, MDPL, Gate-level masking, DRP |
1 | Christophe Clavier |
Secret External Encodings Do Not Prevent Transient Fault Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 181-194, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Physical Attacks, Secret Algorithm, Cryptographic Design, External Encoding, Smart Cards, DES, Fault Analysis |
1 | Kerstin Lemke-Rust, Christof Paar |
Gaussian Mixture Models for Higher-Order Side Channel Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 14-27, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Higher-Order Analysis, Boolean Masking, Second-Order DPA, EM Algorithm, Gaussian Mixture Models, Templates, Side Channel Cryptanalysis |
1 | Bruno Robisson, Pascal Manet |
Differential Behavioral Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 413-426, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Differential Behavioral Analysis, Safe-Error, Block Ciphers, AES, Differential Power Analysis, Fault Attacks |
1 | Mitsuru Matsui, Junko Nakajima |
On the Power of Bitslice Implementation on Intel Core2 Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 121-134, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Fast Software Encryption, Bitslice, KASUMI, Core2, AES |
1 | Patrick Schaumont, Kris Tiri |
Masking and Dual-Rail Logic Don't Add Up. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 95-106, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Andrey Bogdanov, Thomas Eisenbarth 0001, Andy Rupp |
A Hardware-Assisted Realtime Attack on A5/2 Without Precomputations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, pp. 394-412, 2007, Springer, 978-3-540-74734-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
A5/2, SMITH, cryptanalysis, GSM, Gaussian elimination, special-purpose hardware, linear systems of equations |
1 | Zhimin Chen, Yujie Zhou |
Dual-Rail Random Switching Logic: A Countermeasure to Reduce Side Channel Leakage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 242-254, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Gate Level Masking, DRSL, Dual-Rail, Pre-charge, Side Channel Attacks, DPA |
1 | Marco Bucci, Luca Giancane, Raimondo Luzzi, Alessandro Trifiletti |
Three-Phase Dual-Rail Pre-charge Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 232-241, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
dual-rail logic, SABL, security, DPA |
1 | Eric Simpson, Patrick Schaumont |
Offline Hardware/Software Authentication for Reconfigurable Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 311-323, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis |
Improving SHA-2 Hardware Implementations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 298-310, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
SHA-2 (256, 512), FPGA, Cryptography, Hash functions |
1 | Toru Akishita, Masanobu Katagi, Izuru Kitamura |
SPA-Resistant Scalar Multiplication on Hyperelliptic Curve Cryptosystems Combining Divisor Decomposition Technique and Joint Regular Form. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 148-159, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
theta divisor, signed binary representation, scalar multiplication, simple power analysis, hyperelliptic curve cryptosystems |
1 | Eric Brier, Benoît Chevallier-Mames, Mathieu Ciet, Christophe Clavier |
Why One Should Also Secure RSA Public Key Elements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 324-338, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Amir Moradi 0001, Mohammad T. Manzuri Shalmani, Mahmoud Salmasizadeh |
A Generalized Method of Differential Fault Attack Against AES Cryptosystem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 91-100, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Cryptanalysis, Smart Card, AES, Side Channel Attacks, Fault Attacks |
1 | Joseph Bonneau, Ilya Mironov |
Cache-Collision Timing Attacks Against AES. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 201-215, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
cache, cryptanalysis, AES, side-channel attack, timing attack |
1 | Kazumaro Aoki |
Integer Factoring Utilizing PC Cluster. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 60, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | François-Xavier Standaert, Eric Peeters, Cédric Archambeau, Jean-Jacques Quisquater |
Towards Security Limits in Side-Channel Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 30-45, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Pierre-Alain Fouque, Sébastien Kunz-Jacques, Gwenaëlle Martinet, Frédéric Muller, Frédéric Valette |
Power Attack on Small RSA Public Exponent. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 339-353, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Deukjo Hong, Jaechul Sung, Seokhie Hong, Jongin Lim 0001, Sangjin Lee 0002, Bonseok Koo, Changhoon Lee, Donghoon Chang, Jesang Lee, Kitae Jeong, Hyun Kim, Jongsung Kim, Seongtaek Chee |
HIGHT: A New Block Cipher Suitable for Low-Resource Device. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 46-59, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Low-Resource Implementation, Block Cipher, Ubiquitous |
1 | Manuel Koschuch, Joachim Lechner, Andreas Weitzer, Johann Großschädl, Alexander Szekely, Stefan Tillich, Johannes Wolkerstorfer |
Hardware/Software Co-design of Elliptic Curve Cryptography on an 8051 Microcontroller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 430-444, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Douglas Stebila, Nicolas Thériault |
Unified Point Addition Formulæ and Side-Channel Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 354-368, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
unified point addition formulæ, projective coordinates, elliptic-curve cryptography, side-channel attacks |
1 | Ahmad-Reza Sadeghi |
Challenges for Trusted Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 414, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Vassil S. Dimitrov, Kimmo U. Järvinen, Michael J. Jacobson Jr., W. F. Chan, Zhun Huang |
FPGA Implementation of Point Multiplication on Koblitz Curves Using Kleinian Integers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 445-459, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Stefan Mangard, Kai Schramm |
Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 76-90, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Zero-Offset DPA, Zero-Input DPA, Delay Chains, AES, DPA, Masking, Glitches |
1 | Emmanuel Prouff, Christophe Giraud 0001, Sébastien Aumônier |
Provably Secure S-Box Implementation Based on Fourier Transform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 216-230, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Provably Secure Countermeasure, Symmetric Cryptosystems, FOX, AES, Differential Power Analysis, Fourier Transform, S-Box |
1 | Michael Scott, Neil Costigan, Wesam Abdulwahab |
Implementing Cryptographic Pairings on Smartcards. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 134-147, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Elliptic curves, pairing-based cryptosystems, fast implementations |
1 | Konrad J. Kulikowski, Alexander B. Smirnov, Alexander Taubin |
Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 399-413, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Thanh-Ha Le, Jessy Clédière, Cécile Canovas, Bruno Robisson, Christine Servière, Jean-Louis Lacoume |
A Proposition for Correlation Power Analysis Enhancement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 174-186, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
multi-bit DPA, PPA, AES, correlation, DPA, power analysis, DES, side channel, CPA |
1 | Stefan Tillich, Johann Großschädl |
Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 270-284, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
embedded RISC processor, SPARC V8 architecture, Advanced Encryption Standard, instruction set extensions, efficient implementation |
1 | Massoud Masoumi, Farshid Raissi, Mahmoud Ahmadian |
NanoCMOS-Molecular Realization of Rijndael. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 285-297, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
VLSI realization, CMOL, Rijndael |
1 | Pim Tuyls, Geert Jan Schrijen, Boris Skoric, Jan van Geloven, Nynke Verhaegh, Rob Wolters |
Read-Proof Hardware from Protective Coatings. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 369-383, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Daisuke Suzuki, Minoru Saeki |
Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 255-269, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Naofumi Homma, Sei Nagashima, Yuichi Imai, Takafumi Aoki, Akashi Satoh |
High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 187-200, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
cryptographic module, waveform matching, phase-only correlation, side-channel attacks, DPA, DEMA |
1 | G. Fraidy Bouesse, Gilles Sicard, Marc Renaudin |
Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 384-398, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
QDI Asynchronous circuits, Path Swapping (PS), Power analysis |
1 | Sergei P. Skorobogatov |
Optically Enhanced Position-Locked Power Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 61-75, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
semi-invasive attacks, optical probing, side-channel attacks, power analysis |
1 | Benedikt Gierlichs, Kerstin Lemke-Rust, Christof Paar |
Templates vs. Stochastic Methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 15-29, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
High-Order Attacks, Performance Analysis, Stochastic Model, Power Analysis, Side Channel Cryptanalysis, Template Attack |
1 | Louis Goubin, Mitsuru Matsui (eds.) |
Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![Springer, 3-540-46559-6 The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Sandeep S. Kumar, Christof Paar, Jan Pelzl, Gerd Pfeiffer, Manfred Schimmler |
Breaking Ciphers with COPACOBANA - A Cost-Optimized Parallel Code Breaker. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 101-118, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Kris Gaj, Soonhak Kwon, Patrick Baier, Paul Kohlbrenner, Hoang Le, Mohammed Khaleeluddin, Ramakrishna Bachimanchi |
Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 119-133, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Cipher-breaking, FPGA, factoring, ECM |
1 | Ari Juels |
The Outer Limits of RFID Security. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 231, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Cédric Archambeau, Eric Peeters, François-Xavier Standaert, Jean-Jacques Quisquater |
Template Attacks in Principal Subspaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 1-14, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede |
Superscalar Coprocessor for High-Speed Curve-Based Cryptography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 415-429, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
curve-based cryptography, HECC, ECC, instruction-level parallelism, scalar multiplication, Superscalar, coprocessor |
1 | Marc Joye, Pascal Paillier |
Fast Generation of Prime Numbers on Portable Devices: An Update. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 160-173, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
1 | Eric Peeters, François-Xavier Standaert, Nicolas Donckers, Jean-Jacques Quisquater |
Improved Higher-Order Side-Channel Attacks with FPGA Experiments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29 - September 1, 2005, Proceedings, pp. 309-323, 2005, Springer, 3-540-28474-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
cryptographic devices, high-order power analysis, masking countermeasure, FPGA, block cipher, DPA, side-channel analysis |
1 | Tim Good, Mohammed Benaissa |
AES on FPGA from the Fastest to the Smallest. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29 - September 1, 2005, Proceedings, pp. 427-440, 2005, Springer, 3-540-28474-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
low area, Application Specific Instruction Processor (ASIP), Field Programmable Gate Array (FPGA), pipelined, Advanced Encryption Standard (AES), finite field, high throughput, design exploration |
1 | Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa |
DPA Leakage Models for CMOS Logic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29 - September 1, 2005, Proceedings, pp. 366-382, 2005, Springer, 3-540-28474-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Jean-Sébastien Coron, David Lefranc, Guillaume Poupard |
A New Baby-Step Giant-Step Algorithm and Some Applications to Cryptanalysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29 - September 1, 2005, Proceedings, pp. 47-60, 2005, Springer, 3-540-28474-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Baby-Step Giant-Step algorithm, GPS scheme, low Hamming weight, discrete logarithm, binary trees |
1 | Josyula R. Rao, Berk Sunar (eds.) |
Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29 - September 1, 2005, Proceedings ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![Springer, 3-540-28474-5 The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Kris Tiri, David D. Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede |
Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29 - September 1, 2005, Proceedings, pp. 354-365, 2005, Springer, 3-540-28474-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
dual rail with precharge, wave dynamic differential logic (WDDL), differential routing, parasitic capacitance matching, side-channel attack (SCA), differential power analysis (DPA), countermeasure |
1 | Markus G. Kuhn |
Security Limits for Compromising Emanations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29 - September 1, 2005, Proceedings, pp. 265-279, 2005, Springer, 3-540-28474-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
emission security, protection standards, side channels, Eavesdropping, Tempest, video displays |
1 | Johann Großschädl, Roberto Maria Avanzi, Erkay Savas, Stefan Tillich |
Energy-Efficient Software Implementation of Long Integer Modular Arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29 - September 1, 2005, Proceedings, pp. 75-90, 2005, Springer, 3-540-28474-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Katsuyuki Okeya, Tsuyoshi Takagi, Camille Vuillaume |
Short Memory Scalar Multiplication on Koblitz Curves. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29 - September 1, 2005, Proceedings, pp. 91-105, 2005, Springer, 3-540-28474-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
NAF, change-of-basis, Elliptic curve cryptosystems, smartcard, scalar multiplication, normal basis, Koblitz curves, polynomial basis |
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