Search results for "TLM"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
13	Jérôme Cornet, Florence Maraninchi, Laurent Maillet-Contoz	A Method for the Efficient Development of Timed and Untimed Transaction-Level Models of Systems-on-Chip.	DATE	2008	DBLP DOI BibTeX RDF
13	Martin Radetzki, Rauf Salimi Khaligh	Accuracy-Adaptive Simulation of Transaction Level Models.	DATE	2008	DBLP DOI BibTeX RDF
13	Primoz Puhar, Andrej Zemva	Functional Verification of a USB Host Controller.	DSD	2008	DBLP DOI BibTeX RDF
13	Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa	A Modular Approach to Model Heterogeneous MPSoC at Cycle Level.	DSD	2008	DBLP DOI BibTeX RDF
13	Ping Jack Soh, Razif Arief Jamil Abdullah Amir, Mahyuni Mozi Aiza, Abdullah Al-Hadi Azremi, Mohamad Zoinol Abidin Abdul Aziz	Performance Modeling and Simulation of Microstrip Dipole Array Antenna for WLAN Application.	Asia International Conference on Modelling and Simulation	2008	DBLP DOI BibTeX RDF	Transmission Line Model, Dipole Antennas, Antenna Arrays, Circuit Model, Method of Moments
13	Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi, Nikil D. Dutt	Methodology for multi-granularity embedded processor power model generation for an ESL design flow.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	system-on-chip, embedded processor, power modeling, esl
13	Miron Abramovici, Kees Goossens, Bart Vermeulen, Jack Greenbaum, Neal Stollon, Adam Donlin	You can catch more bugs with transaction level honey.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	system diagnostics, transaction-level models
13	Kai Huang 0001, Iuliana Bacivarov, Fabian Hugelshofer, Lothar Thiele	Scalably distributed SystemC simulation for embedded applications.	SIES	2008	DBLP DOI BibTeX RDF
13	Chih-Hung Li, Wen-Hsiao Peng, Tihao Chiang	A reconfigurable video embedding transcoder based on H.264/AVC: Design tradeoffs and analysis.	ISCAS	2008	DBLP DOI BibTeX RDF
13	Julien Delorme	An Automatic Design Flow for Mapping Application onto a 2D Mesh NoC Architecture.	PATMOS	2007	DBLP DOI BibTeX RDF
13	Nicola Bombieri, Franco Fummi, Graziano Pravadelli	Incremental ABV for functional validation of TL-to-RTL design refinement.	DATE	2007	DBLP DOI BibTeX RDF
13	Timo Schönwald, Jochen Zimmermann, Oliver Bringmann 0001, Wolfgang Rosenstiel	Fully Adaptive Fault-Tolerant Routing Algorithm for Network-on-Chip Architectures.	DSD	2007	DBLP DOI BibTeX RDF
13	Axel Siebenborn, Alexander Viehl, Oliver Bringmann 0001, Wolfgang Rosenstiel	Control-Flow Aware Communication and Conflict Analysis of Parallel Processes.	ASP-DAC	2007	DBLP DOI BibTeX RDF
13	Antoine Perrin, Frank Ghenassia	Bridging gap between simulation and spreadsheet study.	CODES+ISSS	2007	DBLP DOI BibTeX RDF	performance, verification, SoC, SystemC
13	Rabie Ben Atitallah, Smaïl Niar, Samy Meftali, Jean-Luc Dekeyser	An MPSoC Performance Estimation Framework Using Transaction Level Modeling.	RTCSA	2007	DBLP DOI BibTeX RDF
13	Fernando Kronbauer, Alexandro Baldassin, Bruno C. Albertini, Paulo Centoducatte, Sandro Rigo, Guido Araujo, Rodolfo Azevedo	A Flexible Platform Framework for Rapid Transactional Memory Systems Prototyping and Evaluation.	IEEE International Workshop on Rapid System Prototyping	2007	DBLP DOI BibTeX RDF
13	Jae W. Lee, Myron King, Krste Asanovic	Continual hashing for efficient fine-grain state inconsistency detection.	ICCD	2007	DBLP DOI BibTeX RDF
13	Jae-Gon Lee, Chong-Min Kyung	PrePack: Predictive Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
13	Hiren D. Patel, Sandeep K. Shukla, E. Mednick, Rishiyur S. Nikhil	A rule-based model of computation for SystemC: integrating SystemC and Bluespec for co-design.	MEMOCODE	2006	DBLP DOI BibTeX RDF
13	Niloofar Razavi, Marjan Sirjani	Using Reo for formal specification and verification of system designs.	MEMOCODE	2006	DBLP DOI BibTeX RDF
13	Tim Kogel, Matthew Braun	Virtual prototyping of embedded platforms for wireless and multimedia.	DATE	2006	DBLP DOI BibTeX RDF
13	Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah, Daniel Gajski	Generic netlist representation for system and PE level design exploration.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	GNR, NISC, modeling, synthesis, system design, architecture description language, application-specific processor
13	Qingquan Zhang, Woong Cho, Gerald E. Sobelman, Liuqing Yang 0001, Richard M. Voyles	TwinsNet: A Cooperative MIMO Mobile Sensor Network.	UIC	2006	DBLP DOI BibTeX RDF
13	Motohito Nakagawa	A high-speed computational method of fuzzy inference system for embedded systems.	ISCAS	2006	DBLP DOI BibTeX RDF
13	Negin Manavizadeh, Rashid Safa Isini, Behzad Esfandyarpour, Ebrahim Asl Soleimani, Hassan Ghafoori Fard	Low Cost Electroplated Ni/Cu Ohmic Contacts for Multicrystalline Si Solar Cells using an Ultrasonic System.	CCECE	2006	DBLP DOI BibTeX RDF
13	Francesco Bruschi, Fabrizio Ferrandi, Donatella Sciuto	A Framework for the Functional Verification of SystemC Models.	Int. J. Parallel Program.	2005	DBLP DOI BibTeX RDF	SystemC, test pattern generator, Functional verification
13	Seungbeom Lee, Sin-Chong Park	Transaction Analysis of Multiprocessor Based Platform with Bus Matrix.	IWSOC	2005	DBLP DOI BibTeX RDF
13	Jin Lee, Sin-Chong Park	Orthogonalized Communication Architecture for MP-SoC with Global Bus.	IWSOC	2005	DBLP DOI BibTeX RDF
13	Andrea Bona, Vittorio Zaccaria, Roberto Zafalon	Low Effort, High Accuracy Network-on-Chip Power Macro Modeling.	PATMOS	2004	DBLP DOI BibTeX RDF	Network-on-Chip power analysis, communication based low power design, system-level energy optimization
13	Andrea Bona, Vittorio Zaccaria, Roberto Zafalon	System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip.	DATE	2004	DBLP DOI BibTeX RDF	Network-on-Chip power analysis, communication based low power design, system-level energy optimization
13	Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane	Fast exploration of bus-based on-chip communication architectures.	CODES+ISSS	2004	DBLP DOI BibTeX RDF	bus cycle accurate modeling, fast communication architecture exploration, shared bus architectures, transaction level modeling, AMBA
13	A. Riki Y. Morikawa, Larry Kerschberg	MAKO: Multi-Ontology Analytical Knowledge Organization based on Topic Maps.	DEXA Workshops	2004	DBLP DOI BibTeX RDF
13	A. Bernstein, M. Burton, Frank Ghenassia	How to bridge the abstraction gap in system level modeling and design.	ICCAD	2004	DBLP DOI BibTeX RDF
13	Marco Caldari, Massimo Conti, Massimo Coppola, Stephane Curaba, Lorenzo Pieralisi, Claudio Turchetti	Transaction-Level Models for AMBA Bus Architecture Using SystemC 2.0.	DATE	2003	DBLP DOI BibTeX RDF
13	Imed Moussa, Thierry Grellier, Giang Nguyen	Exploring SW Performance Using SoC Transaction-Level Modeling.	DATE	2003	DBLP DOI BibTeX RDF
13	Lukai Cai, Daniel Gajski	Transaction level modeling: an overview.	CODES+ISSS	2003	DBLP DOI BibTeX RDF	modeling, validation, refinement, synthesis, exploration, transaction level model
13	Katalin Balogh, Judit Kleiber	Computational Benefits of a Totally Lexicalist Grammar.	TSD	2003	DBLP DOI BibTeX RDF
13	Yu-Min Lee, Charlie Chung-Ping Chen	Power grid transient simulation in linear time based on transmission-line-modeling alternating-direction-implicit method.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2002	DBLP DOI BibTeX RDF
13	Tom J. Smy, David J. Walkey, Steven K. Dew	A 3D thermal simulation tool for integrated devices-Atar.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF