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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 193 occurrences of 110 keywords
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Results
Found 339 publication records. Showing 339 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
13 | Jérôme Cornet, Florence Maraninchi, Laurent Maillet-Contoz |
A Method for the Efficient Development of Timed and Untimed Transaction-Level Models of Systems-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 9-14, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Martin Radetzki, Rauf Salimi Khaligh |
Accuracy-Adaptive Simulation of Transaction Level Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 788-791, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Primoz Puhar, Andrej Zemva |
Functional Verification of a USB Host Controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2008, Parma, Italy, September 3-5, 2008, pp. 735-740, 2008, IEEE Computer Society, 978-0-7695-3277-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa |
A Modular Approach to Model Heterogeneous MPSoC at Cycle Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2008, Parma, Italy, September 3-5, 2008, pp. 158-164, 2008, IEEE Computer Society, 978-0-7695-3277-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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13 | Ping Jack Soh, Razif Arief Jamil Abdullah Amir, Mahyuni Mozi Aiza, Abdullah Al-Hadi Azremi, Mohamad Zoinol Abidin Abdul Aziz |
Performance Modeling and Simulation of Microstrip Dipole Array Antenna for WLAN Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia International Conference on Modelling and Simulation ![In: Second Asia International Conference on Modelling and Simulation, AMS 2008, Kuala Lumpur, Malaysia, May 13-15, 2008, pp. 197-201, 2008, IEEE Computer Society, 978-0-7695-3136-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Transmission Line Model, Dipole Antennas, Antenna Arrays, Circuit Model, Method of Moments |
13 | Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi, Nikil D. Dutt |
Methodology for multi-granularity embedded processor power model generation for an ESL design flow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 255-260, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
system-on-chip, embedded processor, power modeling, esl |
13 | Miron Abramovici, Kees Goossens, Bart Vermeulen, Jack Greenbaum, Neal Stollon, Adam Donlin |
You can catch more bugs with transaction level honey. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 121-124, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
system diagnostics, transaction-level models |
13 | Kai Huang 0001, Iuliana Bacivarov, Fabian Hugelshofer, Lothar Thiele |
Scalably distributed SystemC simulation for embedded applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIES ![In: IEEE Third International Symposium on Industrial Embedded Systems, SIES 2008, Montpellier / La Grande Motte, France, June 11-13, 2008, pp. 271-274, 2008, IEEE, 978-1-4244-1994-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Chih-Hung Li, Wen-Hsiao Peng, Tihao Chiang |
A reconfigurable video embedding transcoder based on H.264/AVC: Design tradeoffs and analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 852-855, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Julien Delorme |
An Automatic Design Flow for Mapping Application onto a 2D Mesh NoC Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings, pp. 31-42, 2007, Springer, 978-3-540-74441-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Nicola Bombieri, Franco Fummi, Graziano Pravadelli |
Incremental ABV for functional validation of TL-to-RTL design refinement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 882-887, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Timo Schönwald, Jochen Zimmermann, Oliver Bringmann 0001, Wolfgang Rosenstiel |
Fully Adaptive Fault-Tolerant Routing Algorithm for Network-on-Chip Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Tenth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2007), 29-31 August 2007, Lübeck, Germany, pp. 527-534, 2007, IEEE Computer Society, 0-7695-2978-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Axel Siebenborn, Alexander Viehl, Oliver Bringmann 0001, Wolfgang Rosenstiel |
Control-Flow Aware Communication and Conflict Analysis of Parallel Processes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 32-37, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Antoine Perrin, Frank Ghenassia |
Bridging gap between simulation and spreadsheet study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 215-216, 2007, ACM, 978-1-59593-824-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
performance, verification, SoC, SystemC |
13 | Rabie Ben Atitallah, Smaïl Niar, Samy Meftali, Jean-Luc Dekeyser |
An MPSoC Performance Estimation Framework Using Transaction Level Modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007), 21-24 August 2007, Daegu, Korea, pp. 525-533, 2007, IEEE Computer Society, 0-7695-2975-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Fernando Kronbauer, Alexandro Baldassin, Bruno C. Albertini, Paulo Centoducatte, Sandro Rigo, Guido Araujo, Rodolfo Azevedo |
A Flexible Platform Framework for Rapid Transactional Memory Systems Prototyping and Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 28-30 May 2007, Porto Alegre, RS, Brazil, pp. 123-129, 2007, IEEE Computer Society, 978-0-7695-2834-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Jae W. Lee, Myron King, Krste Asanovic |
Continual hashing for efficient fine-grain state inconsistency detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings, pp. 33-40, 2007, IEEE, 1-4244-1258-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Jae-Gon Lee, Chong-Min Kyung |
PrePack: Predictive Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10), pp. 1935-1949, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Hiren D. Patel, Sandeep K. Shukla, E. Mednick, Rishiyur S. Nikhil |
A rule-based model of computation for SystemC: integrating SystemC and Bluespec for co-design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 27-29 July 2006, Embassy Suites, Napa, California, USA, pp. 39-48, 2006, IEEE Computer Society, 1-4244-0421-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Niloofar Razavi, Marjan Sirjani |
Using Reo for formal specification and verification of system designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 27-29 July 2006, Embassy Suites, Napa, California, USA, pp. 113-122, 2006, IEEE Computer Society, 1-4244-0421-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Tim Kogel, Matthew Braun |
Virtual prototyping of embedded platforms for wireless and multimedia. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 488-490, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah, Daniel Gajski |
Generic netlist representation for system and PE level design exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 282-287, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
GNR, NISC, modeling, synthesis, system design, architecture description language, application-specific processor |
13 | Qingquan Zhang, Woong Cho, Gerald E. Sobelman, Liuqing Yang 0001, Richard M. Voyles |
TwinsNet: A Cooperative MIMO Mobile Sensor Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
UIC ![In: Ubiquitous Intelligence and Computing, Third International Conference, UIC 2006, Wuhan, China, September 3-6, 2006, Proceedings, pp. 508-516, 2006, Springer, 3-540-38091-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Motohito Nakagawa |
A high-speed computational method of fuzzy inference system for embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Negin Manavizadeh, Rashid Safa Isini, Behzad Esfandyarpour, Ebrahim Asl Soleimani, Hassan Ghafoori Fard |
Low Cost Electroplated Ni/Cu Ohmic Contacts for Multicrystalline Si Solar Cells using an Ultrasonic System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: Proceedings of the Canadian Conference on Electrical and Computer Engineering, CCECE 2006, May 7-10, 2006, Ottawa Congress Centre, Ottawa, Canada, pp. 1621-1624, 2006, IEEE, 1-4244-0038-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Francesco Bruschi, Fabrizio Ferrandi, Donatella Sciuto |
A Framework for the Functional Verification of SystemC Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 33(6), pp. 667-695, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
SystemC, test pattern generator, Functional verification |
13 | Seungbeom Lee, Sin-Chong Park |
Transaction Analysis of Multiprocessor Based Platform with Bus Matrix. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 20-24 July 2004, Banff, Alberta, Canada, pp. 552-556, 2005, IEEE Computer Society, 0-7695-2403-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
13 | Jin Lee, Sin-Chong Park |
Orthogonalized Communication Architecture for MP-SoC with Global Bus. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 20-24 July 2004, Banff, Alberta, Canada, pp. 541-545, 2005, IEEE Computer Society, 0-7695-2403-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
13 | Andrea Bona, Vittorio Zaccaria, Roberto Zafalon |
Low Effort, High Accuracy Network-on-Chip Power Macro Modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings, pp. 541-552, 2004, Springer, 3-540-23095-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Network-on-Chip power analysis, communication based low power design, system-level energy optimization |
13 | Andrea Bona, Vittorio Zaccaria, Roberto Zafalon |
System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 318-323, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Network-on-Chip power analysis, communication based low power design, system-level energy optimization |
13 | Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane |
Fast exploration of bus-based on-chip communication architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2004, Stockholm, Sweden, September 8-10, 2004, pp. 242-247, 2004, ACM, 1-58113-937-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
bus cycle accurate modeling, fast communication architecture exploration, shared bus architectures, transaction level modeling, AMBA |
13 | A. Riki Y. Morikawa, Larry Kerschberg |
MAKO: Multi-Ontology Analytical Knowledge Organization based on Topic Maps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DEXA Workshops ![In: 15th International Workshop on Database and Expert Systems Applications (DEXA 2004), with CD-ROM, 30 August - 3 September 2004, Zaragoza, Spain, pp. 459-463, 2004, IEEE Computer Society, 0-7695-2195-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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13 | A. Bernstein, M. Burton, Frank Ghenassia |
How to bridge the abstraction gap in system level modeling and design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 910-914, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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13 | Marco Caldari, Massimo Conti, Massimo Coppola, Stephane Curaba, Lorenzo Pieralisi, Claudio Turchetti |
Transaction-Level Models for AMBA Bus Architecture Using SystemC 2.0. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 20026-20031, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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13 | Imed Moussa, Thierry Grellier, Giang Nguyen |
Exploring SW Performance Using SoC Transaction-Level Modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 20120-20125, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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13 | Lukai Cai, Daniel Gajski |
Transaction level modeling: an overview. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2003, Newport Beach, CA, USA, October 1-3, 2003, pp. 19-24, 2003, ACM, 1-58113-742-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
modeling, validation, refinement, synthesis, exploration, transaction level model |
13 | Katalin Balogh, Judit Kleiber |
Computational Benefits of a Totally Lexicalist Grammar. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TSD ![In: Text, Speech and Dialogue, 6th International Conference, TSD 2003, Ceské Budejovice, Czech Republic, September 8-12, 2003, Proceedings, pp. 114-119, 2003, Springer, 3-540-20024-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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13 | Yu-Min Lee, Charlie Chung-Ping Chen |
Power grid transient simulation in linear time based on transmission-line-modeling alternating-direction-implicit method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(11), pp. 1343-1352, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
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13 | Tom J. Smy, David J. Walkey, Steven K. Dew |
A 3D thermal simulation tool for integrated devices-Atar. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(1), pp. 105-115, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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