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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 526 occurrences of 280 keywords
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Results
Found 503 publication records. Showing 503 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
16 | Mahmut T. Kandemir, Wei Zhang 0002, Mustafa Karaköy |
Dynamic Parallelization of Array Based On-Chip Multiprocessor Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Embedded Software for SoC ![In: Embedded Software for SoC, pp. 305-318, 2003, Kluwer / Springer, 978-1-4020-7528-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
16 | Terry Tao Ye, Giovanni De Micheli |
Physical Planning for On-Chip Multiprocessor Networks and Switch Fabrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 14th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2003), 24-26 June 2003, The Hague, The Netherlands, pp. 97-107, 2003, IEEE Computer Society, 0-7695-1992-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
16 | Matthew C. Chidester, Alan D. George |
Parallel simulation of chip-multiprocessor architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Model. Comput. Simul. ![In: ACM Trans. Model. Comput. Simul. 12(3), pp. 176-200, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Apple |
16 | Tatsuya Koyama, Keisuke Inoue, Hirokazu Hanaki, Masahiro Yasue, Eiji Iwata |
A 250-MHz single-chip multiprocessor for audio and video signal processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 36(11), pp. 1768-1774, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
16 | Chong-liang Ooi, Seon Wook Kim, Il Park 0001, Rudolf Eigenmann, Babak Falsafi, T. N. Vijaykumar |
Multiplex: unifying conventional and speculative thread-level parallelism on a chip multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 15th international conference on Supercomputing, ICS 2001, Sorrento, Napoli, Italy, June 16-21, 2001, pp. 368-380, 2001, ACM, 1-58113-410-X. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
16 | Peter Mattson, Chris Basoglu, Yongmin Kim 0001 |
Interactive Image Morphing on a Single-Chip Multiprocessor using a Multilayered Parallel Image Computing Library. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Imaging ![In: Real Time Imaging 6(3), pp. 175-183, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
16 | Masato Edahiro, Satoshi Matsushita, Masakazu Yamashina, Naoki Nishi |
A Single-Chip Multiprocessor for Smart Terminals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 20(4), pp. 12-20, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
16 | Hitoshi Oi, N. Ranganathan |
Utilization of cache area in on-chip multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 24(8), pp. 429-436, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
16 | Hitoshi Oi, N. Ranganathan |
Utilization of Cache Area in On-Chip Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISHPC ![In: High Performance Computing, Second International Symposium, ISHPC'99, Kyoto, Japan, May 26-28, 1999, Proceedings, pp. 373-380, 1999, Springer, 3-540-65969-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
16 | Benoit Clement, Richard Hersemeule, Etienne Lantreibecq, Bernard Ramanadin, Pierre Coulomb, François Pogodalla |
Fast Prototyping: A System Design Flow Applied to a Complex System-on-Chip Multiprocessor Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 36th Conference on Design Automation, New Orleans, LA, USA, June 21-25, 1999., pp. 420-424, 1999, ACM Press. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
hardware/software (HW/SW) co-design, virtual component (VC) re-use, system design, system modeling, system verification, fast prototyping |
16 | Venkata Krishnan, Josep Torrellas |
Hardware and Software Support for Speculative Execution of Sequential Binaries on a Chip-multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Supercomputing ![In: Proceedings of the 12th international conference on Supercomputing, ICS 1998, Melbourne, Australia, July 13-17, 1998, pp. 85-92, 1998, ACM, 0-89791-998-X. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
16 | Stephen W. Keckler |
Fast thread communication and synchronization mechanisms for a scalable single chip multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
1998 |
RDF |
|
16 | Jihong Kim 0001, Yongmin Kim 0001 |
Performance analysis and tuning for a single-chip multiprocessor DSP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Concurrency ![In: IEEE Concurrency 5(1), pp. 68-79, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
16 | Lance Hammond, Basem A. Nayfeh, Kunle Olukotun |
A Single-Chip Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 30(9), pp. 79-85, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
16 | Jihong Kim 0001, Yongmin Kim 0001 |
UWICL: A Multi-Layered Parallel Image Computing Library for Single-Chip Multiprocessor-based Time-Critical Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Imaging ![In: Real Time Imaging 2(3), pp. 187-199, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
16 | Klaus Herrmann 0002, Klaus Gaedke, Jörg Hilgenstock, Peter Pirsch |
Design of a development system for multimedia applications based on a single chip multiprocessor array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: Proceedings of Third International Conference on Electronics, Circuits, and Systems, ICECS 1996, Rodos, Greece, October 13-16, 1996, pp. 1151-1154, 1996, IEEE, 0-7803-3650-X. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
16 | Karl M. Guttag, Robert J. Gove, Jerry R. Van Aken |
A single-chip multiprocessor for multimedia: the MVP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Computer Graphics and Applications ![In: IEEE Computer Graphics and Applications 12(6), pp. 53-64, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
16 | Ulrich Schmidt, Knut Caesar |
Datawave: a single-chip multiprocessor for video applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 11(3), pp. 22-25, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
16 | Jinwoo Song, Kee Beom Kim, Yong Ho Song, Ki-Seok Chung |
Implementation of IEEE802.11a software defined receiver on chip multi-processor architecture using OpenMP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICHIT ![In: Proceedings of the 2009 International Conference on Hybrid Information Technology, ICHIT 2009, Daejeon, Korea, August 27-29, 2009, pp. 598-601, 2009, ACM, 978-1-60558-662-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
802.11a, GPP, multi-core, OpenMP, SDR |
16 | Henrique C. Freitas, Dalton M. Colombo, Fernanda Lima Kastensmidt, Philippe Olivier Alexandre Navaux |
Evaluating Network-on-Chip for Homogeneous Embedded Multiprocessors in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 3776-3779, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Suleyman Tosun, Nazanin Mansouri, Mahmut T. Kandemir, Ozcan Ozturk 0001 |
An ILP Formulation for Task Scheduling on Heterogeneous Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCIS ![In: Computer and Information Sciences - ISCIS 2006, 21th International Symposium, Istanbul, Turkey, November 1-3, 2006, Proceedings, pp. 267-276, 2006, Springer, 3-540-47242-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Reliability, DVS, energy minimization, duplication, heterogeneous chip multiprocessors |
16 | Juan Chen 0001, Huizhan Yi, Xuejun Yang, Liang Qian |
Compile-Time Energy Optimization for Parallel Applications in On-Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science (2) ![In: Computational Science - ICCS 2006, 6th International Conference, Reading, UK, May 28-31, 2006, Proceedings, Part II, pp. 904-911, 2006, Springer, 3-540-34381-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Rakesh Kumar 0002, Dean M. Tullsen, Parthasarathy Ranganathan, Norman P. Jouppi, Keith I. Farkas |
Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 31st International Symposium on Computer Architecture (ISCA 2004), 19-23 June 2004, Munich, Germany, pp. 64-75, 2004, IEEE Computer Society, 0-7695-2143-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
16 | Akira Yamawaki 0002, Masahiko Iwane |
Organization of Shared Memory with Synchronization for Multiprocessor-on-a-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 9th International Conference on Parallel and Distributed Systems, ICPADS 2002, Taiwan, ROC, December 17-20, 2002, pp. 83-90, 2002, IEEE Computer Society, 0-7695-1760-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
14 | Donglai Dai, Aniruddha S. Vaidya, Roy Saharoy, Seungjoon Park, Dongkook Park, Hariharan L. Thantry, Ralf Plate, Elmar Maas, Akhilesh Kumar, Mani Azimi |
FPGA-based prototyping of a 2D MESH / TORUS on-chip interconnect (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010, pp. 293, 2010, ACM, 978-1-60558-911-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
fpga, routing algorithm, on-chip interconnect, router architecture |
14 | Martin Schoeberl, Florian Brandner, Jan Vitek |
RTTM: real-time transactional memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2010 ACM Symposium on Applied Computing (SAC), Sierre, Switzerland, March 22-26, 2010, pp. 326-333, 2010, ACM, 978-1-60558-639-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
real-time systems, transactional memory |
14 | Alyssa Bonnoit, Lawrence T. Pileggi |
Reducing variability in chip-multiprocessors with adaptive body biasing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010, pp. 73-78, 2010, ACM, 978-1-4503-0146-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
dynamic voltage/frequency scaling, body biasing |
14 | Niket Agarwal, Li-Shiuan Peh, Niraj K. Jha |
In-network coherence filtering: snoopy coherence without broadcasts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA, pp. 232-243, 2009, ACM, 978-1-60558-798-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
14 | Jacob Leverich, Hideho Arakida, Alex Solomatnikov, Amin Firoozshahian, Mark Horowitz, Christos Kozyrakis |
Comparative evaluation of memory models for chip multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 5(3), pp. 12:1-12:30, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
streaming memory, parallel programming, Chip multiprocessors, cache coherence, locality optimizations |
14 | Rohit Sunkam Ramanujam, Bill Lin 0001 |
Near-optimal oblivious routing on three-dimensional mesh networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 26th International Conference on Computer Design, ICCD 2008, 12-15 October 2008, Lake Tahoe, CA, USA, Proceedings, pp. 134-141, 2008, IEEE Computer Society, 978-1-4244-2657-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Like Yan, Qingsong Shi, Tianzhou Chen, Guobing Chen |
An On-chip Communication Mechanism Design in the Embedded Heterogeneous Multi-core Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNSC ![In: Proceedings of the IEEE International Conference on Networking, Sensing and Control, ICNSC 2008, Hainan, China, 6-8 April 2008, pp. 1842-1845, 2008, IEEE, 978-1-4244-1685-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Karthik Ganesan 0006, Lizy Kurian John, Valentina Salapura, James C. Sexton |
A Performance Counter Based Workload Characterization on Blue Gene/P. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 2008 International Conference on Parallel Processing, ICPP 2008, September 8-12, 2008, Portland, Oregon, USA, pp. 330-337, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Hui Wang, Sandeep Baldawa, Rama Sangireddy |
Dynamic Error Detection for Dependable Cache Coherency in Multicore Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India, pp. 279-285, 2008, IEEE Computer Society, 0-7695-3083-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Jason Zebchuk, Andreas Moshovos |
A Building Block for Coarse-Grain Optimizations in the On-Chip Memory Hierarchy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 6(2), pp. 33-36, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Nidhi Aggarwal, Parthasarathy Ranganathan, Norman P. Jouppi, James E. Smith 0001 |
Configurable isolation: building high availability systems with commodity multi-core processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 34th International Symposium on Computer Architecture (ISCA 2007), June 9-13, 2007, San Diego, California, USA, pp. 470-481, 2007, ACM, 978-1-59593-706-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
chip multiprocessors, high availability, fault isolation |
14 | Xuemei Zhao, Karl Sammut, Fangpo He |
Performance Evaluation of a Novel CMP Cache Structure for Hybrid Workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDCAT ![In: Eighth International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT 2007), 3-6 December 2007, Adelaide, Australia, pp. 89-96, 2007, IEEE Computer Society, 0-7695-3049-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Kyriakos Stavrou, Pedro Trancoso |
Thermal-Aware Scheduling: A Solution for Future Chip Multiprocessors Thermal Problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August - 1 September 2006, Dubrovnik, Croatia, pp. 123-126, 2006, IEEE Computer Society, 0-7695-2609-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Harit Modi, Lawrence Spracklen, Yuan Chou, Santosh G. Abraham |
Accurate Modeling of Aggressive Speculation in Modern Microprocessor Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: 13th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS 2005), 27-29 September 2005, Atlanta, GA, USA, pp. 75-84, 2005, IEEE Computer Society, 0-7695-2458-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Guilherme Ottoni, Ram Rangan, Adam Stoler, David I. August |
Automatic Thread Extraction with Decoupled Software Pipelining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 12-16 November 2005, Barcelona, Spain, pp. 105-118, 2005, IEEE Computer Society, 0-7695-2440-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Rakesh Kumar 0002, Victor V. Zyuban, Dean M. Tullsen |
Interconnections in Multi-Core Architectures: Understanding Mechanisms, Overheads and Scaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 32st International Symposium on Computer Architecture (ISCA 2005), 4-8 June 2005, Madison, Wisconsin, USA, pp. 408-419, 2005, IEEE Computer Society, 978-0-7695-2270-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Rakesh Kumar 0002, Norman P. Jouppi, Dean M. Tullsen |
Conjoined-Core Chip Multiprocessing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 4-8 December 2004, Portland, OR, USA, pp. 195-206, 2004, IEEE Computer Society, 0-7695-2126-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Doris Ching, Patrick Schaumont, Ingrid Verbauwhede |
Integrated Modeling and Generation of a Reconfigurable Network-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, USA, 2004, IEEE Computer Society, 0-7695-2132-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Lin Li 0002, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Ismail Kadayif |
CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), Architectures, Methods and Tools, 3-5 September 2003, Belek-Antalya, Turkey, pp. 41-49, 2003, IEEE Computer Society, 0-7695-2003-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Jaehyuk Huh 0001, Doug Burger, Stephen W. Keckler |
Exploring the Design Space of Future CMPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), 8-12 September 2001, Barcelona, Spain, pp. 199-210, 2001, IEEE Computer Society, 0-7695-1363-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
14 | Jack L. Lo, Susan J. Eggers, Joel S. Emer, Henry M. Levy, Rebecca L. Stamm, Dean M. Tullsen |
Converting Thread-Level Parallelism to Instruction-Level Parallelism via Simultaneous Multithreading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 15(3), pp. 322-354, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
multiprocessors, multithreading, instruction-level parallelism, thread-level parallelism, simultaneous multithreading, cache interference |
13 | Akash Kumar 0001, Shakith Fernando, Yajun Ha, Bart Mesman, Henk Corporaal |
Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 13(3), pp. 40:1-40:27, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multi-application, multiple use-cases, synchronous data-flow graphs, FPGA, multiprocessor systems, multimedia systems, design exploration |
13 | Andrés Ortiz 0001, Julio Ortega Lopera, Antonio F. Díaz, Alberto Prieto |
Comparison of Onloading and Offloading Strategies to Improve Network Interfaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 16th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP 2008), 13-15 February 2008, Toulouse, France, pp. 253-260, 2008, IEEE Computer Society, 978-0-7695-3089-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Hao Feng, Eric Q. Li, Yurong Chen 0001, Yimin Zhang 0002 |
Parallelization and characterization of SIFT on multi-core systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IISWC ![In: 4th International Symposium on Workload Characterization (IISWC 2008), Seattle, Washington, USA, September 14-16, 2008, pp. 14-23, 2008, IEEE Computer Society, 978-1-4244-2778-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Anca Mariana Molnos, Sorin Dan Cotofana, Marc J. M. Heijligers, Jos T. J. van Eijndhoven |
Static Cache Partitioning Robustness Analysis for Embedded On-Chip Multi-processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Trans. High Perform. Embed. Archit. Compil. ![In: Transactions on High-Performance Embedded Architectures and Compilers I, pp. 279-297, 2007, Springer, 978-3-540-71527-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Francesco Poletti, Antonio Poggiali, Davide Bertozzi, Luca Benini, Pol Marchal, Mirko Loghi, Massimo Poncino |
Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(5), pp. 606-621, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
embedded multimedia, low power, energy efficiency, MPSoCs, programming models, task-level parallelism |
13 | Akira Yamawaki 0002, Masahiko Iwane |
An FPGA implementation of a snoop cache with synchronization for a multiprocessor system-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 13th International Conference on Parallel and Distributed Systems, ICPADS 2007, Hsinchu, Taiwan, December 5-7, 2007, pp. 1-8, 2007, IEEE Computer Society, 978-1-4244-1889-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi |
Hardware support for spin management in overcommitted virtual machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 15th International Conference on Parallel Architectures and Compilation Techniques (PACT 2006), Seattle, Washington, USA, September 16-20, 2006, pp. 124-133, 2006, ACM, 1-59593-264-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
virtual machines, chip multiprocessors, synchronization overhead |
13 | Dong-Ik Ko, Shuvra S. Bhattacharyya |
The pipeline decomposition tree: : an analysis tool for multiprocessor implementation of image processing applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 52-57, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
design space exploration, multiprocessor scheduling, system-level models |
13 | Manish Vachharajani, Neil Vachharajani, David A. Penry, Jason A. Blome, David I. August |
The Liberty Simulation Environment, version 1.0. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS Perform. Evaluation Rev. ![In: SIGMETRICS Perform. Evaluation Rev. 31(4), pp. 19-24, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
13 | Frédéric Pétrot, Pascal Gomez |
Lightweight Implementation of the POSIX Threads API for an On-Chip MIPS Multiprocessor with VCI Interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 20051-20056, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Khaled Z. Ibrahim, Gregory T. Byrd, Eric Rotenberg |
Slipstream Execution Mode for CMP-Based Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), Anaheim, California, USA, February 8-12, 2003, pp. 179-190, 2003, IEEE Computer Society, 0-7695-1871-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Praveen Dongara, T. N. Vijaykumar |
Accelerating private-key cryptography via multithreading on symmetric multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: 2003 IEEE International Symposium on Performance Analysis of Systems and Software, March 6-8, 2003, Austin, Texas, USA, Proceedings, pp. 58-69, 2003, IEEE Computer Society, 0-7803-7756-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Hironori Kasahara, Motoki Obata, Kazuhisa Ishizaka |
Automatic Coarse Grain Task Parallel Processing on SMP Using OpenMP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 13th International Workshop, LCPC 2000, Yorktown Heights, NY, USA, August 10-12, 2000, Revised Papers, pp. 189-207, 2000, Springer, 3-540-42862-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
13 | Bernard Goossens, Hassane Essafi, Marc Pic |
Hardware and Software Optimizations for Multimedia Databases. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PaCT ![In: Parallel Computing Technologies, 5th International Conference, PaCT-99, St. Petersburg, Russia, September 6-10, 1999, Proceedings, pp. 365-370, 1999, Springer, 3-540-66363-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
11 | Sudipto Das, Shyam Antony, Divyakant Agrawal, Amr El Abbadi |
CoTS: A Scalable Framework for Parallelizing Frequency Counting over Data Streams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDE ![In: Proceedings of the 25th International Conference on Data Engineering, ICDE 2009, March 29 2009 - April 2 2009, Shanghai, China, pp. 1323-1326, 2009, IEEE Computer Society, 978-0-7695-3545-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
11 | Sheng Li 0007, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, Norman P. Jouppi |
McPAT: an integrated power, area, and timing modeling framework for multicore and manycore architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA, pp. 469-480, 2009, ACM, 978-1-60558-798-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
11 | Martin Schoeberl, Wolfgang Puffitsch, Benedikt Huber |
Towards Time-Predictable Data Caches for Chip-Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SEUS ![In: Software Technologies for Embedded and Ubiquitous Systems, 7th IFIP WG 10.2 International Workshop, SEUS 2009, Newport Beach, CA, USA, November 16-18, 2009, Proceedings, pp. 180-191, 2009, Springer, 978-3-642-10264-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
11 | M. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi, Yale N. Patt |
Accelerating critical section execution with asymmetric multi-core architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2009, Washington, DC, USA, March 7-11, 2009, pp. 253-264, 2009, ACM, 978-1-60558-406-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
heterogeneous cores, parallel programming, cmp, multi-core, locks, critical sections |
11 | David Fick, Andrew DeOrio, Jin Hu, Valeria Bertacco, David T. Blaauw, Dennis Sylvester |
Vicis: a reliable network for unreliable silicon. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 812-817, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
hard faults, fault tolerance, built-in-self-test, Network-on-Chip, reconfiguration, torus, N-modular redundancy |
11 | Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry |
Incrementally parallelizing database transactions with thread-level speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 26(1), pp. 2:1-2:50, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
incremental parallelization, Thread-level speculation, chip-multiprocessing, optimistic concurrency |
11 | Natalie D. Enright Jerger, Li-Shiuan Peh, Mikko H. Lipasti |
Circuit-Switched Coherence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Second International Symposium on Networks-on-Chips, NOCS 2008, 5-6 April 2008, Newcastle University, UK. Proceedings, pp. 193-202, 2008, IEEE Computer Society, 978-0-7695-3098-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Interconnection network, multiprocessor systems, cache coherence |
11 | Enric Herrero, José González 0002, Ramon Canal |
Distributed cooperative caching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 17th International Conference on Parallel Architectures and Compilation Techniques, PACT 2008, Toronto, Ontario, Canada, October 25-29, 2008, pp. 134-143, 2008, ACM, 978-1-60558-282-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
distributed cooperative caching, energy efficiency, chip multiprocessors, memory hierarchy |
11 | Ke Meng, Russ Joseph, Robert P. Dick, Li Shang |
Multi-optimization power management for chip multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 17th International Conference on Parallel Architectures and Compilation Techniques, PACT 2008, Toronto, Ontario, Canada, October 25-29, 2008, pp. 177-186, 2008, ACM, 978-1-60558-282-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
cache resizing, voltage/frequency scaling, dynamic power management, chip multi-processor |
11 | Ricardo Fernández Pascual, José M. García 0001, Manuel E. Acacio, José Duato |
A fault-tolerant directory-based cache coherence protocol for CMP architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: The 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2008, June 24-27, 2008, Anchorage, Alaska, USA, Proceedings, pp. 267-276, 2008, IEEE Computer Society, 978-1-4244-2397-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
11 | John Cieslewicz, Kenneth A. Ross |
Data partitioning on chip multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DaMoN ![In: 4th Workshop on Data Management on New Hardware, DaMoN 2008, Vancouver, BC, Canada, June 13, 2008, pp. 25-34, 2008, ACM, 978-1-60558-184-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
11 | Martti Forsell |
On the performance and cost of some PRAM models on CMP hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-8, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
11 | Luis Angel D. Bathen, Nikil D. Dutt, Sudeep Pasricha |
A framework for memory-aware multimedia application mapping on chip-multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESTIMedia ![In: Proceedings of the 6th IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia, ESTIMedia 2008, Atlanta, Georgia, USA, 23-24 October 2008, pp. 89-94, 2008, IEEE Computer Society, 978-1-4244-2612-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
11 | Ozcan Ozturk 0001, Mahmut T. Kandemir, Sri Hari Krishna Narayanan |
A Scratch-Pad Memory Aware Dynamic Loop Scheduling Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 738-743, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Scheduling and Partitioning, Compilers, Multiprocessor Systems |
11 | Shirish Tatikonda, Srinivasan Parthasarathy 0001 |
An adaptive memory conscious approach for mining frequent trees: implications for multi-core architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2008, Salt Lake City, UT, USA, February 20-23, 2008, pp. 263-264, 2008, ACM, 978-1-59593-795-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
CMP architectures, frequent tree mining |
11 | Nitin Godiwala, Jud Leonard, Matthew Reilly |
A Network Fabric for Scalable Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hot Interconnects ![In: 16th Annual IEEE Symposium on High Performance Interconnects (HOTI 2008), 26-28 August 2008, Stanford, CA, USA, pp. 137-144, 2008, IEEE Computer Society, 978-0-7695-3380-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
networks, MPI, multiprocessors, message passing, fabric, kautz graphs |
11 | Guangyu Chen, Feihui Li, Seung Woo Son 0001, Mahmut T. Kandemir |
Application mapping for chip multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 620-625, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
NoC (Network on Chip), compilers, power optimization, chip multiprocessing, application mapping |
11 | Bevan M. Baas, Zhiyi Yu, Michael J. Meeuwsen, Omar Sattari, Ryan W. Apperson, Eric W. Work, Jeremy W. Webb, Michael A. Lai, Tinoosh Mohsenin, Dean Truong, Jason Cheung |
AsAP: A Fine-Grained Many-Core Platform for DSP Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 27(2), pp. 34-45, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
MIMD processors, GALS networking, embedded systems, multiprocessors, digital signal processing, microarchitecture, special-purpose and application-based systems |
11 | Jaehyuk Huh 0001, Changkyu Kim, Hazim Shafi, Lixin Zhang 0002, Doug Burger, Stephen W. Keckler |
A NUCA Substrate for Flexible CMP Cache Sharing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 18(8), pp. 1028-1040, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Multiprocessor systems, cache memories, adaptable architectures |
11 | Brian Greskamp, Josep Torrellas |
Paceline: Improving Single-Thread Performance in Nanoscale CMPs through Core Overclocking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), Brasov, Romania, September 15-19, 2007, pp. 213-224, 2007, IEEE Computer Society, 0-7695-2944-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
11 | Guangyu Chen, Feihui Li, Mahmut T. Kandemir |
Reducing Energy Consumption of On-Chip Networks Through a Hybrid Compiler-Runtime Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), Brasov, Romania, September 15-19, 2007, pp. 163-174, 2007, IEEE Computer Society, 0-7695-2944-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
11 | Meeta Sharma Gupta, Jarod L. Oatley, Russ Joseph, Gu-Yeon Wei, David M. Brooks |
Understanding voltage variations in chip multiprocessors using a distributed power-delivery network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 624-629, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
11 | Xuemei Zhao, Karl Sammut, Fangpo He, Shaowen Qin |
Split Private and Shared L2 Cache Architecture for Snooping-based CMP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACIS-ICIS ![In: 6th Annual IEEE/ACIS International Conference on Computer and Information Science (ICIS 2007), 11-13 July 2007, Melbourne, Australia, pp. 900-905, 2007, IEEE Computer Society, 0-7695-2841-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
11 | Jason Zebchuk, Elham Safi, Andreas Moshovos |
A Framework for Coarse-Grain Optimizations in the On-Chip Memory Hierarchy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 1-5 December 2007, Chicago, Illinois, USA, pp. 314-327, 2007, IEEE Computer Society, 0-7695-3047-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
11 | Onur Mutlu, Thomas Moscibroda |
Stall-Time Fair Memory Access Scheduling for Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 1-5 December 2007, Chicago, Illinois, USA, pp. 146-160, 2007, IEEE Computer Society, 0-7695-3047-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
11 | Kypros Constantinides, Onur Mutlu, Todd M. Austin, Valeria Bertacco |
Software-Based Online Detection of Hardware Defects Mechanisms, Architectural Support, and Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 1-5 December 2007, Chicago, Illinois, USA, pp. 97-108, 2007, IEEE Computer Society, 0-7695-3047-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
11 | Yale N. Patt |
The Transformation Hierarchy in the Era of Multi-core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2007, 14th International Conference, Goa, India, December 18-21, 2007, Proceedings, pp. 5, 2007, Springer, 978-3-540-77219-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
11 | Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han |
Performance modeling for early analysis of multi-core systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 209-214, 2007, ACM, 978-1-59593-824-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
early analysis, multi-core systems modeling, physical analysis, performance, power analysis, transaction-level modeling |
11 | Davy Genbrugge, Lieven Eeckhout |
Statistical simulation of chip multiprocessors running multi-program workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings, pp. 464-471, 2007, IEEE, 1-4244-1258-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
11 | Xiaofang Wang, Sotirios G. Ziavras |
Performance-Energy Tradeoffs for Matrix Multiplication on FPGA-Based Mixed-Mode Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 386-391, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
11 | Nabil Hasasneh, Ian M. Bell, Chris R. Jesshope |
Scalable and Partitionable Asynchronous Arbiter for Micro-threaded Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARCS ![In: Architecture of Computing Systems - ARCS 2006, 19th International Conference, Frankfurt/Main, Germany, March 13-16, 2006, Proceedings, pp. 252-267, 2006, Springer, 3-540-32765-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
11 | Ilya Wagner, Valeria Bertacco, Todd M. Austin |
Depth-driven verification of simultaneous interfaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 442-447, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
11 | Pengyong Ma, Xiao Hu, Shuming Chen, Yang Guo |
Pseudo Share Data Cache in Multiprocessor: PSDMP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA Workshops ![In: Frontiers of High Performance Computing and Networking - ISPA 2006 Workshops, ISPA 2006 International Workshops, FHPCN, XHPC, S-GRACE, GridGIS, HPC-GTP, PDCE, ParDMCom, WOMP, ISDF, and UPWN, Sorrento, Italy, December 4-7, 2006, Proceedings, pp. 47-56, 2006, Springer, 3-540-49860-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
11 | Lisa R. Hsu, Ravishankar R. Iyer 0001, Srihari Makineni, Steven K. Reinhardt, Donald Newell |
Exploring the cache design space for large scale CMPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGARCH Comput. Archit. News ![In: SIGARCH Comput. Archit. News 33(4), pp. 24-33, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
11 | Ben Wun, Jeremy Buhler, Patrick Crowley |
Exploiting Coarse-Grained Parallelism to Accelerate Protein Motif Finding with a Network Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 17-21 September 2005, St. Louis, MO, USA, pp. 173-184, 2005, IEEE Computer Society, 0-7695-2429-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
11 | Mahmut T. Kandemir, Guangyu Chen, Feihui Li, I. Demirkiran |
Using data replication to reduce communication energy on chip multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 769-772, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
11 | Fredrik Warg, Per Stenström |
Reducing misspeculation overhead for module-level speculative execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005, pp. 289-298, 2005, ACM, 1-59593-019-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
misspeculation prediction, module-level parallelism, performance evaluation, chip multiprocessors, thread-level speculation |
11 | Manohar K. Prabhu, Kunle Olukotun |
Exposing speculative thread parallelism in SPEC2000. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2005, June 15-17, 2005, Chicago, IL, USA, pp. 142-152, 2005, ACM, 1-59593-080-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
SPEC CPU2000, feedback-driven optimization, manual parallel programming, chip multiprocessors, multithreading, thread-level speculation |
11 | Xiandong Meng, Vipin Chaudhary |
Bio-sequence analysis with cradle's 3SoCTM software scalable system on chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2004 ACM Symposium on Applied Computing (SAC), Nicosia, Cyprus, March 14-17, 2004, pp. 202-206, 2004, ACM, 1-58113-812-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
3SoC chip, Digital Signal Processors, Smith-Waterman algorithm |
11 | Clinton Kelly IV, Virantha N. Ekanayake, Rajit Manohar |
SNAP: A Sensor-Network Asynchronous Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 9th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2003), 12-16 May 2003, Vancouver, BC, Canada, pp. 24-35, 2003, IEEE Computer Society, 0-7695-1898-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
11 | Ismail Kadayif, Mahmut T. Kandemir, Ugur Sezer |
An integer linear programming based approach for parallelizing applications in On-chip multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 703-708, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
constraint-based compilation, embedded systems, loop-Level parallelism |
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