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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 455 occurrences of 299 keywords
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Results
Found 537 publication records. Showing 537 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
6 | Nicolas Anciaux, Luc Bouganim, Philippe Pucheral, Patrick Valduriez |
DiSC: Benchmarking Secure Chip DBMS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Knowl. Data Eng. ![In: IEEE Trans. Knowl. Data Eng. 20(10), pp. 1363-1377, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | F. Ryan Johnson, JoAnn M. Paul |
Interrupt modeling for efficient high-level scheduler design space exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 13(1), pp. 10:1-10:22, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
scenario oriented design, MESH, Heterogeneous chip multiprocessors |
6 | Francesco Menichelli, Renato Menicocci, Mauro Olivieri, Alessandro Trifiletti |
High-Level Side-Channel Attack Modeling and Simulation for Security-Critical Systems on Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Dependable Secur. Comput. ![In: IEEE Trans. Dependable Secur. Comput. 5(3), pp. 164-176, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Rishad A. Shafik, Paul M. Rosinger, Bashir M. Al-Hashimi |
MPEG-based Performance Comparison between Network-on-Chip and AMBA MPSoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), Bratislava, Slovakia, April 16-18, 2008, pp. 98-103, 2008, IEEE Computer Society, 978-1-4244-2276-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Nupur Kothari, Kiran Nagaraja, Vijay Raghunathan, Florin Sultan, Srimat T. Chakradhar |
HERMES: A Software Architecture for Visibility and Control in Wireless Sensor Network Deployments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPSN ![In: Proceedings of the 7th International Conference on Information Processing in Sensor Networks, IPSN 2008, St. Louis, Missouri, USA, April 22-24, 2008, pp. 395-406, 2008, IEEE Computer Society, 978-0-7695-3157-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
interposition, sensor networks, control, software reliability, visibility, SOS |
6 | Fabrizio Mulas, Michele Pittau, Marco Buttu, Salvatore Carta, Andrea Acquaviva, Luca Benini, David Atienza, Giovanni De Micheli |
Thermal Balancing Policy for Streaming Computing on Multiprocessor Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 734-739, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Sungchan Kim, Chanik Park, Soonhoi Ha |
Architecture Exploration of NAND Flash-based Multimedia Card. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 218-223, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran |
A Formal Approach To The Protocol Converter Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 294-299, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Kim Grüttner, Frank Oppenheimer, Wolfgang Nebel, Fabien Colas-Bigey, Anne-Marie Fouilliart |
SystemC-based Modelling, Seamless Refinement, and Synthesis of a JPEG 2000 Decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 128-133, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Abdellah-Medjadji Kouadri-Mostefaoui, Benaoumeur Senouci, Frédéric Pétrot |
Large Scale On-Chip Networks : An Accurate Multi-FPGA Emulation Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2008, Parma, Italy, September 3-5, 2008, pp. 3-9, 2008, IEEE Computer Society, 978-0-7695-3277-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Yanqin Yang, Zili Shao, Linfeng Pan, Minyi Guo |
ISOS: Space Overlapping Based on Iteration Access Patterns for Dynamic Scratch-pad Memory Management in Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICYCS ![In: Proceedings of the 9th International Conference for Young Computer Scientists, ICYCS 2008, Zhang Jia Jie, Hunan, China, November 18-21, 2008, pp. 1360-1366, 2008, IEEE Computer Society, 978-0-7695-3398-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Jun Ho Bahn, Jungsook Yang, Nader Bagherzadeh |
Parallel FFT Algorithms on Network-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Fifth International Conference on Information Technology: New Generations (ITNG 2008), 7-8 April 2008, Las Vegas, Nevada, USA, pp. 1087-1093, 2008, IEEE Computer Society, 978-0-7695-3099-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Embedded DSP system, Parallel Programming, FFT, Network-on-Chip (NoC) |
6 | Ying Yu, Raymond R. Hoare, Alex K. Jones |
A CAM-based intrusion detection system for single-packet attack detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-8, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi, Nikil D. Dutt |
Methodology for multi-granularity embedded processor power model generation for an ESL design flow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 255-260, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
system-on-chip, embedded processor, power modeling, esl |
6 | Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Charbon |
Speculative DMA for architecturally visible storage in instruction set extensions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 243-248, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
architecturally visible storage, speculative direct memory access, instruction set extensions, application-specific processors |
6 | Daniel D. Gajski, Samar Abdi, Ines Viskic |
Model Based Synthesis of Embedded Software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SEUS ![In: Software Technologies for Embedded and Ubiquitous Systems, 6th IFIP WG 10.2 International Workshop, SEUS 2008, Anacarpi, Capri Island, Italy, October 1-3, 2008, Proceedings, pp. 21-33, 2008, Springer, 978-3-540-87784-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Zhong-Yi Jin, Rajesh Gupta 0001 |
Improved Distributed Simulation of Sensor Networks Based on Sensor Node Sleep Time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DCOSS ![In: Distributed Computing in Sensor Systems, 4th IEEE International Conference, DCOSS 2008, Santorini Island, Greece, June 11-14, 2008, Proceedings, pp. 204-218, 2008, Springer, 978-3-540-69169-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Anders Sejer Tranberg-Hansen, Jan Madsen, Bjørn Sand Jensen |
A service based estimation method for MPSoC performance modelling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIES ![In: IEEE Third International Symposium on Industrial Embedded Systems, SIES 2008, Montpellier / La Grande Motte, France, June 11-13, 2008, pp. 43-50, 2008, IEEE, 978-1-4244-1994-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | John D. Davis, Zhangxi Tan, Fang Yu 0002, Lintao Zhang |
Designing an Efficient Hardware Implication Accelerator for SAT Solving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing - SAT 2008, 11th International Conference, SAT 2008, Guangzhou, China, May 12-15, 2008. Proceedings, pp. 48-62, 2008, Springer, 978-3-540-79718-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Brian Keng, Hratch Mangassarian, Andreas G. Veneris |
A succinct memory model for automated design debugging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 137-142, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Oreste Villa, Gianluca Palermo, Cristina Silvano |
Efficiency and scalability of barrier synchronization on NoC based many-core architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 81-90, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
scalability, synchronization, efficiency, Multicore, NoC, barrier, Manycore |
6 | Major Bhadauria, Sally A. McKee |
Optimizing thread throughput for multithreaded workloads on memory constrained CMPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 5th Conference on Computing Frontiers, 2008, Ischia, Italy, May 5-7, 2008, pp. 119-128, 2008, ACM, 978-1-60558-077-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
performance, efficiency, power, memory bandwidth |
6 | Xingzhi Wen, Uzi Vishkin |
Fpga-based prototype of a pram-on-chip processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 5th Conference on Computing Frontiers, 2008, Ischia, Italy, May 5-7, 2008, pp. 55-66, 2008, ACM, 978-1-60558-077-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
ease-of-programming, explicit multi-threading, on-chip parallel processor, pram, parallel algorithms, xmt |
6 | Wei Han 0001, Ying Yi, Mark Muir, Ioannis Nousias, Tughrul Arslan, Ahmet Teyfik Erdogan |
MRPSIM: A TLM based simulation tool for MPSOCS targeting dynamically reconfigurable processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: 21st Annual IEEE International SoC Conference, SoCC 2008, September 17-20, 2008, Radisson Hotel, Newport Beach, CA, USA, Proceedings, pp. 41-44, 2008, IEEE, 978-1-4244-2596-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Enkhbold Ochirsuren, Heiko Hinkelmann, Leandro Soares Indrusiak, Manfred Glesner |
TinyOS Extensions for a Wireless Sensor Network Node Based on a Dynamically Reconfigurable Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DIPES ![In: Distributed Embedded Systems: Design, Middleware and Resources, IFIP 20th World Computer Congress, TC10 Working Conference on Distributed and Parallel Embedded Systems (DIPES 2008), September 7-10, 2008, Milano, Italy, pp. 161-170, 2008, Springer, 978-0-387-09660-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Christophe Clavier, Benedikt Gierlichs, Ingrid Verbauwhede |
Fault Analysis Study of IDEA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CT-RSA ![In: Topics in Cryptology - CT-RSA 2008, The Cryptographers' Track at the RSA Conference 2008, San Francisco, CA, USA, April 8-11, 2008. Proceedings, pp. 274-287, 2008, Springer, 978-3-540-79262-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Collision Fault Analysis, Ineffective Fault Analysis, Random Fault Model, IDEA, Differential Fault Analysis |
6 | Berkin Özisikyilmaz, Gokhan Memik, Alok N. Choudhary |
Machine Learning Models to Predict Performance of Computer System Design Alternatives. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 2008 International Conference on Parallel Processing, ICPP 2008, September 8-12, 2008, Portland, Oregon, USA, pp. 495-502, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Thomas M. DuBois, Bryant C. Lee, Yi Wang, Marc Olano, Uzi Vishkin |
XMT-GPU: A PRAM Architecture for Graphics Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 2008 International Conference on Parallel Processing, ICPP 2008, September 8-12, 2008, Portland, Oregon, USA, pp. 364-372, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Liqun Cheng, John B. Carter |
Extending CC-NUMA systems to support write update optimizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE Conference on High Performance Computing, SC 2008, November 15-21, 2008, Austin, Texas, USA, pp. 30, 2008, IEEE/ACM, 978-1-4244-2835-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Hao Shen, Frédéric Pétrot |
MPSoC Communication Architecture Exploration Using an Abstraction Refinement Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India, pp. 403-408, 2008, IEEE Computer Society, 0-7695-3083-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
6 | Aydin O. Balkan, Gang Qu 0001, Uzi Vishkin |
An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 435-440, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
hybrid networks, on-chip networks, mesh-of-trees |
6 | John D. Davis, Zhangxi Tan, Fang Yu 0002, Lintao Zhang |
A practical reconfigurable hardware accelerator for Boolean satisfiability solvers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 780-785, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
BCP, FPGA, reconfigurable, SAT solver, co-processor |
6 | Ke Ning, David R. Kaeli |
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Trans. High Perform. Embed. Archit. Compil. ![In: Transactions on High-Performance Embedded Architectures and Compilers I, pp. 116-135, 2007, Springer, 978-3-540-71527-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
embedded systems, power-aware, external memory, media processor, bus arbitration |
6 | N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk |
Run-Time Integration of Reconfigurable Video Processing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 15(9), pp. 1003-1016, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Nevine AbouGhazaleh, Bruce R. Childers, Daniel Mossé, Rami G. Melhem |
Near-Memory Caching for Improved Energy Consumption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(11), pp. 1441-1455, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Memory power management, Cached DRAM, Power Management, Energy-aware systems, Memory design |
6 | Partha Biswas, Nikil D. Dutt, Laura Pozzi, Paolo Ienne |
Introduction of Architecturally Visible Storage in Instruction Set Extensions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(3), pp. 435-446, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Youngjin Cho, Naehyuck Chang |
Energy-Aware Clock-Frequency Assignment in Microprocessors and Memory Devices for Dynamic Voltage Scaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(6), pp. 1030-1040, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Salvatore Carta, Andrea Alimonda, Alessandro Pisano, Andrea Acquaviva, Luca Benini |
A control theoretic approach to energy-efficient pipelined computation in MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 6(4), pp. 27, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
feedback-control techniques, parallel systems, MPSoC, DVFS |
6 | David Atienza, Pablo García Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida |
HW-SW emulation framework for temperature-aware design in MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 12(3), pp. 26:1-26:26, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Thermal-aware design, FPGA, emulation, MPSoC, temperature |
6 | Antoine Fraboulet, Guillaume Chelius, Eric Fleury |
Worldsens: development and prototyping tools for application specific wireless sensors networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPSN ![In: Proceedings of the 6th International Conference on Information Processing in Sensor Networks, IPSN 2007, Cambridge, Massachusetts, USA, April 25-27, 2007, pp. 176-185, 2007, ACM, 978-1-59593-638-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
simulation, sensor networks, performance, development |
6 | Mark H. Nodine |
Automatic Testbench Generation for Rearchitected Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 128-136, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Nicolas Fournel, Antoine Fraboulet, Paul Feautrier |
Fast and Accurate Embedded Systems Energy Characterization Using Non-intrusive Measurements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings, pp. 10-19, 2007, Springer, 978-3-540-74441-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Arno Moonen, Marco Bekooij, René van den Berg, Jef L. van Meerbergen |
Practical and Accurate Throughput Analysis with the Cyclo Static Dataflow Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: 15th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS 2007), October 24-26, 2007, Istanbul, Turkey, pp. 238-245, 2007, IEEE Computer Society, 978-1-4244-1854-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Naser Sedaghati-Mokhtari, Mahdi Nazm Bojnordi, Sied Mehdi Fakhraie |
MDST: Multiprocessor DSP Simulation Toolkit for Voice Processing Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: 15th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS 2007), October 24-26, 2007, Istanbul, Turkey, pp. 173-178, 2007, IEEE Computer Society, 978-1-4244-1854-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
MDST, Multiprocessor DSP Simulation toolkit, Voice processing applications |
6 | Liqun Cheng, John B. Carter, Donglai Dai |
An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 10-14 February 2007, Phoenix, Arizona, USA, pp. 328-339, 2007, IEEE Computer Society, 1-4244-0804-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Chung-Fu Kao, Chi-Hung Lin, Ing-Jer Huang |
Configurable AMBA On-Chip Real-Time Signal Tracer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 114-115, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Alexey Kupriyanov, Dmitrij Kissler, Frank Hannig, Jürgen Teich |
Efficient event-driven simulation of parallel processor architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCOPES ![In: Proceedings of the 10th International Workshop on Software and Compilers for Embedded Systems, Nice, France, April 20, 2007, pp. 71-80, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
embedded tools, simulation, modeling, processor arrays |
6 | Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhang 0010, Howard David |
DRAM-Level Prefetching for Fully-Buffered DIMM: Design, Performance and Power Saving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: 2007 IEEE International Symposium on Performance Analysis of Systems and Software, April 25-27, 2007, San Jose, California, USA, Proceedings, pp. 94-104, 2007, IEEE Computer Society, 1-4244-1081-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
channel bandwidth utilization, DRAM-level prefetching, dynamic random access memory, fully-buffered DIMM, dual in-line memory module, redundant bandwidth, memory block, L2 cache block, DRAM power consumption, SPEC2000 program, software cache prefetching, idle memory latency, power saving, multicore processor, memory controller, interconnect structure, DRAM chip |
6 | Ying Chen, Simon Y. Chen |
Cost-Driven Hybrid Configuration Prefetching for Partial Reconfigurable Coprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-8, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Konrad Malkowski, Greg M. Link, Padma Raghavan, Mary Jane Irwin |
Load Miss Prediction - Exploiting Power Performance Trade-offs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-8, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Nicolas Fournel, Antoine Fraboulet, Paul Feautrier |
eSimu: a Fast and Accurate Energy Consumption Simulator for Real Embedded System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WOWMOM ![In: 2007 International Symposium on a World of Wireless, Mobile and Multimedia Networks (WoWMoM 2007), 18-21 June 2007, Helsinki, Finland, Proceedings, pp. 1-6, 2007, IEEE Computer Society, 1-4244-0992-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Guan Yu, Gauthier Lafruit, Peter Schelkens |
Platform-scalable Task Partition and Multilevel Buffering in Multi-processor Plessey Corner Detector. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSD ![In: Seventh International Conference on Application of Concurrency to System Design (ACSD 2007), 10-13 July 2007, Bratislava, Slovak Republic, pp. 120-126, 2007, IEEE Computer Society, 978-0-7695-2902-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han |
Performance modeling for early analysis of multi-core systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 209-214, 2007, ACM, 978-1-59593-824-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
early analysis, multi-core systems modeling, physical analysis, performance, power analysis, transaction-level modeling |
6 | Srinivasan Murali, Almir Mutapcic, David Atienza, Rajesh Gupta 0001, Stephen P. Boyd, Giovanni De Micheli |
Temperature-aware processor frequency assignment for MPSoCs using convex optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 111-116, 2007, ACM, 978-1-59593-824-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
temperature-aware, MPSoCs, convex optimization, thermal |
6 | Gilles Sassatelli, Nicolas Saint-Jean, Pascal Benoit, Lionel Torres, Michel Robert, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes |
Run-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007, 23-25 April 2007, Napa, California, USA, pp. 295-296, 2007, IEEE Computer Society, 0-7695-2940-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Junqing Sun, Gregory D. Peterson, Olaf O. Storaasli |
Sparse Matrix-Vector Multiplication Design on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007, 23-25 April 2007, Napa, California, USA, pp. 349-352, 2007, IEEE Computer Society, 0-7695-2940-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Ali-Reza Adl-Tabatabai, Anwar M. Ghuloum, Shobhit O. Kanaujia |
Compression in cache design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 21th Annual International Conference on Supercomputing, ICS 2007, Seattle, Washington, USA, June 17-21, 2007, pp. 190-201, 2007, ACM, 978-1-59593-768-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
cache compression, prefetching, cache design |
6 | Martin Schoeberl, Jan Vitek |
Garbage collection for safety critical Java. ![Search on Bibsonomy](Pics/bibsonomy.png) |
JTRES ![In: Proceedings of the 5th International Workshop on Java Technologies for Real-time and Embedded Systems, JTRES 2007, Institute of Computer Engineering, Vienna University of Technology, 26-28 September 2007, Vienna, Austria, pp. 85-93, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
real-time system, garbage collection |
6 | Mahdiar Hosein Ghadiry, Mahdieh Nadi Senjani, M. T. Manzuri-Shalmani, Dara Rahmati |
Effect of number of faults on NoC power and performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 13th International Conference on Parallel and Distributed Systems, ICPADS 2007, Hsinchu, Taiwan, December 5-7, 2007, pp. 1-9, 2007, IEEE Computer Society, 978-1-4244-1889-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Dietmar Ebner, Florian Brandner, Andreas Krall |
Leveraging Predicated Execution for Multimedia Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESTIMedia ![In: Proceedings of the 2007 5th Workshop on Embedded Systems for Real-Time Multimedia, ESTIMedia 2007, October 4-5, Salzburg, Austria, conjunction with CODES+ISSS 2007, pp. 85-90, 2007, IEEE Computer Society, 978-1-4244-1654-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Massimo Alioto, Massimo Poli, Santina Rocchi, Valerio Vignoli |
Mixed Techniques to Protect Precharged Busses against Differential Power Analysis Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 861-864, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Fengguang Song, Shirley Moore, Jack J. Dongarra |
L2 Cache Modeling for Scientific Applications on Chip Multi-Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 2007 International Conference on Parallel Processing (ICPP 2007), September 10-14, 2007, Xi-An, China, pp. 51, 2007, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
cache performance modeling, architecture, chip multi-processor, multi-threaded programming |
6 | Amit Kumar 0002, Li-Shiuan Peh, Partha Kundu, Niraj K. Jha |
Express virtual channels: towards the ideal interconnection fabric. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 34th International Symposium on Computer Architecture (ISCA 2007), June 9-13, 2007, San Diego, California, USA, pp. 150-161, 2007, ACM, 978-1-59593-706-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
packet-switching, flow-control, router design |
6 | Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Reetuparna Das, Yuan Xie 0001, Narayanan Vijaykrishnan, Mazin S. Yousif, Chita R. Das |
A novel dimensionally-decomposed router for on-chip communication in 3D architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 34th International Symposium on Computer Architecture (ISCA 2007), June 9-13, 2007, San Diego, California, USA, pp. 138-149, 2007, ACM, 978-1-59593-706-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
3D architecture, 3D integration, network-on-chip (NoC) |
6 | Thomas F. Wenisch, Anastassia Ailamaki, Babak Falsafi, Andreas Moshovos |
Mechanisms for store-wait-free multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 34th International Symposium on Computer Architecture (ISCA 2007), June 9-13, 2007, San Diego, California, USA, pp. 266-277, 2007, ACM, 978-1-59593-706-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
store buffer design, memory consistency models |
6 | Paolo Costa, Luca Mottola, Amy L. Murphy, Gian Pietro Picco |
Programming Wireless Sensor Networks with the TeenyLimeMiddleware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Middleware ![In: Middleware 2007, ACM/IFIP/USENIX 8th International Middleware Conference, Newport Beach, CA, USA, November 26-30, 2007, Proceedings, pp. 429-449, 2007, Springer, 978-3-540-76777-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Wireless sensor and actuator networks, middleware, tuple spaces |
6 | Sudarshan Banerjee, Elaheh Bozorgzadeh, Nikil D. Dutt, Juanjo Noguera |
Selective Band width and Resource Management in Scheduling for Dynamically Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 771-776, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
6 | Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa |
Efficient Synchronization for Embedded On-Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(10), pp. 1049-1062, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Divya Arora, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha |
Hardware-Assisted Run-Time Monitoring for Secure Program Execution on Embedded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(12), pp. 1295-1308, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Stephen A. Edwards, Olivier Tardieu |
SHIM: a deterministic model for heterogeneous embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(8), pp. 854-867, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Xinping Zhu, Wei Qin, Sharad Malik |
Modeling operation and microarchitecture concurrency for communication architectures with application to retargetable simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(7), pp. 707-716, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Ilya Ganusov, Martin Burtscher |
Future execution: A prefetching mechanism that uses multiple cores to speed up single threads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 3(4), pp. 424-449, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Future execution, chip multiprocessors, prefetching, memory wall |
6 | Wei Zhang 0002, Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin |
Reducing dynamic and leakage energy in VLIW architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 5(1), pp. 1-28, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
dynamic energy, schedule slacks, compiler, VLIW architecture, leakage energy |
6 | Jiang Xu 0001, Wayne H. Wolf, Jörg Henkel, Srimat T. Chakradhar |
A design methodology for application-specific networks-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 5(2), pp. 263-280, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
regular topology, architecture, methodology, networks-on-chip, Application-specific |
6 | Prabhat Mishra 0001, Aviral Shrivastava, Nikil D. Dutt |
Architecture description language (ADL)-driven software toolkit generation for architectural exploration of programmable SOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 11(3), pp. 626-658, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
programmable architecture, design space exploration, Architecture description language, embedded processor, retargetable compilation |
6 | Dongkook Park, Chrysostomos Nicopoulos, Jongman Kim, Narayanan Vijaykrishnan, Chita R. Das |
Exploring Fault-Tolerant Network-on-Chip Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: 2006 International Conference on Dependable Systems and Networks (DSN 2006), 25-28 June 2006, Philadelphia, Pennsylvania, USA, Proceedings, pp. 93-104, 2006, IEEE Computer Society, 0-7695-2607-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk |
On-Chip Communication in Run-Time Assembled Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSAMOS ![In: Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2006), Samos, Greece, July 17-20, 2006, pp. 168-176, 2006, IEEE, 1-4244-0155-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Massimo Alioto, Massimo Poli, Santina Rocchi, Valerio Vignoli |
Power Modeling of Precharged Address Bus and Application to Multi-bit DPA Attacks to DES Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings, pp. 593-602, 2006, Springer, 3-540-39094-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Massimo Alioto, Massimo Poli, Santina Rocchi, Valerio Vignoli |
Techniques to Enhance the Resistance of Precharged Busses to Differential Power Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings, pp. 624-633, 2006, Springer, 3-540-39094-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Ali Habibi, Haja Moinudeen, Amer Samarah, Sofiène Tahar |
Towards a Faster Simulation of SystemC Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2-3 March 2006, Karlsruhe, Germany, pp. 418-419, 2006, IEEE Computer Society, 0-7695-2533-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa |
Power/performance hardware optimization for synchronization intensive applications in MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 606-611, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Franco Fummi, Davide Quaglia, Fabio Ricciato, Maura Turolla |
Modeling and simulation of mobile gateways interacting with wireless sensor networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE Designers' Forum ![In: Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 106-111, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-0-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Dohyung Kim 0007, Soonhoi Ha, Rajesh Gupta 0001 |
Parallel co-simulation using virtual synchronization with redundant host execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 1151-1156, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Florin Dumitrascu, Iuliana Bacivarov, Lorenzo Pieralisi, Marius Bonaciu, Ahmed Amine Jerraya |
Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE Designers' Forum ![In: Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 166-171, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-0-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Andrea Alimonda, Andrea Acquaviva, Salvatore Carta, Alessandro Pisano |
A control theoretic approach to run-time energy optimization of pipelined processing in MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 876-877, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Martino Ruggiero, Alessio Guerri, Davide Bertozzi, Francesco Poletti, Michela Milano |
Communication-aware allocation and scheduling framework for stream-oriented multi-processor systems-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 3-8, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Partha Biswas, Nikil D. Dutt, Paolo Ienne, Laura Pozzi |
Automatic identification of application-specific functional units with architecturally visible storage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 212-217, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Robert G. Dimond, Oskar Mencer, Wayne Luk |
Automating processor customisation: optimised memory access and resource sharing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 206-211, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Jared C. Smolens, Brian T. Gold, Babak Falsafi, James C. Hoe |
Reunion: Complexity-Effective Multicore Redundancy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 9-13 December 2006, Orlando, Florida, USA, pp. 223-234, 2006, IEEE Computer Society, 0-7695-2732-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Chrysostomos Nicopoulos, Dongkook Park, Jongman Kim, Narayanan Vijaykrishnan, Mazin S. Yousif, Chita R. Das |
ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 9-13 December 2006, Orlando, Florida, USA, pp. 333-346, 2006, IEEE Computer Society, 0-7695-2732-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Yuan Cai, Marcus T. Schmitz, Alireza Ejlali, Bashir M. Al-Hashimi, Sudhakar M. Reddy |
Cache size selection for performance, energy and reliability of time-constrained systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 923-928, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Ikhwan Lee, Hyunsuk Kim, Peng Yang, Sungjoo Yoo, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo |
PowerViP: Soc power estimation framework at transaction level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 551-558, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Haiyan Li, Chunyuan Zhang, Li Li 0005, Ming Pang |
A Streaming Implementation of Transform and Quantization in H.264. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCC ![In: High Performance Computing and Communications, Second International Conference, HPCC 2006, Munich, Germany, September 13-15, 2006, Proceedings, pp. 41-50, 2006, Springer, 3-540-39368-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Ana Lucia Varbanescu, Henk J. Sips, Arjan J. C. van Gemund |
PAM-SoC: A Toolchain for Predicting MPSoC Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28 - September 1, 2006, Proceedings, pp. 111-123, 2006, Springer, 3-540-37783-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Euripides Sotiriades, Christos Kozanitis, Apostolos Dollas |
FPGA based architecture for DNA sequence comparison and database search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Riad Ben Mouhoub, Omar Hammami |
Multiprocessor on chip: beating the simulation wall through multiobjective design space exploration with direct execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary Jane Irwin |
Conjugate gradient sparse solvers: performance-power characteristics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
6 | Divya Arora, Anand Raghunathan, Srivaths Ravi 0001, Niraj K. Jha |
Architectural support for safe software execution on embedded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 106-111, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
type safety, memory safety, extensible processors |
6 | Noel Eisley, Vassos Soteriou, Li-Shiuan Peh |
High-level power analysis for multi-core chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 389-400, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
simulation, chip multiprocessor (CMP), multi-core, power analysis, system-on-a-chip (SoC) |
6 | Sayaka Akioka, Konrad Malkowski, Padma Raghavan, Mary Jane Irwin, Lois C. McInnes, Boyana Norris |
Characterizing the Performance and Energy Attributes of Scientific Simulations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science (1) ![In: Computational Science - ICCS 2006, 6th International Conference, Reading, UK, May 28-31, 2006, Proceedings, Part I, pp. 242-249, 2006, Springer, 3-540-34379-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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