Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
18 | M. H. Lin, K. P. Chang, K. C. Su, Tahui Wang |
Effects of width scaling and layout variation on dual damascene copper interconnect electromigration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 47(12), pp. 2100-2108, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Yi-Shao Lai, Kuo-Ming Chen, Chin-Li Kao, Chiu-Wen Lee, Ying-Ta Chiu |
Electromigration of Sn-37Pb and Sn-3Ag-1.5Cu/Sn-3Ag-0.5Cu composite flip-chip solder bumps with Ti/Ni(V)/Cu under bump metallurgy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 47(8), pp. 1273-1279, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Wei Li, Cher Ming Tan |
Enhanced finite element modelling of Cu electromigration using ANSYS and matlab. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 47(9-11), pp. 1497-1501, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | J. R. Lloyd |
Black's law revisited - Nucleation and growth in electromigration failure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 47(9-11), pp. 1468-1472, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Kimihiro Yamanaka, Yutaka Tsukada, Katsuaki Suganuma |
Studies on solder bump electromigration in Cu/Sn-3Ag-0.5Cu/Cu system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 47(8), pp. 1280-1287, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Rani S. Ghaida, Payman Zarkesh-Ha |
Estimation of Electromigration-Aggravating Narrow Interconnects Using a Layout Sensitivity Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 26-28 September 2007, Rome, Italy., pp. 59-67, 2007, IEEE Computer Society, 0-7695-2885-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Cher Ming Tan, Wei Li, Kok Tong Tan, Frankie Low |
Development of highly accelerated electromigration test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 46(9-11), pp. 1638-1642, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | A. S. Oates, Shou-Chung Lee |
Electromigration failure distributions of dual damascene Cu /low - k interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 46(9-11), pp. 1581-1586, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Arijit Roy 0001, Cher Ming Tan |
Experimental investigation on the impact of stress free temperature on the electromigration performance of copper dual damascene submicron interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 46(9-11), pp. 1652-1656, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Kuo-Ming Chen, J. D. Wu, Kuo-Ning Chiang |
Effects of pre-bump probing and bumping processes on eutectic solder bump electromigration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 46(12), pp. 2104-2111, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Toru Miyazaki, Tomoya Omata |
Electromigration degradation mechanism for Pb-free flip-chip micro solder bumps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 46(9-11), pp. 1898-1903, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Hideaki Tsuchiya, Shinji Yokogawa |
Electromigration lifetimes and void growth at low cumulative failure probability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 46(9-11), pp. 1415-1420, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Chao-Kun Hu, Lynne M. Gignac, R. Rosenberg |
Electromigration of Cu/low dielectric constant interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 46(2-4), pp. 213-231, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | M. Y. Yan, King-Ning Tu, A. V. Vairagar, S. G. Mhaisalkar, Ahila Krishnamoorthy |
A direct measurement of electromigration induced drift velocity in Cu dual damascene interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 46(8), pp. 1392-1395, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Karen Chow, David Abercrombie, Mark Basel |
Method for Managing Electromigration in SOC'S When Designing for Both Reliability and Manufacturing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: 2006 IEEE International SOC Conference, Austin, Texas, USA, September 24-27, 2006, pp. 95-102, 2006, IEEE, 0-7803-9781-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Cher Ming Tan, Arijit Roy 0001, Kok Tong Tan, Derek Sim Kwang Ye, Frankie Low |
Effect of vacuum break after the barrier layer deposition on the electromigration performance of aluminum based line interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 45(9-11), pp. 1449-1454, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | M. H. Lin, Y. L. Lin, K. P. Chang, K. C. Su, Tahui Wang |
Copper interconnect electromigration behaviors in various structures and lifetime improvement by cap/dielectric interface treatment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 45(7-8), pp. 1061-1078, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Arijit Roy 0001, Cher Ming Tan, Rakesh Kumar, Xian Tong Chen |
Effect of test condition and stress free temperature on the electromigration failure of Cu dual damascene submicron interconnect line-via test structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 45(9-11), pp. 1443-1448, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | John W. Barrett 0001, Robert Nürnberg, Vanessa Styles |
Finite Element Approximation of a Phase Field Model for Void Electromigration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIAM J. Numer. Anal. ![In: SIAM J. Numer. Anal. 42(2), pp. 738-772, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni |
An electromigration and thermal model of power wires for a priori high-level reliability prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 12(4), pp. 349-358, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | A. V. Vairagar, S. G. Mhaisalkar, Ahila Krishnamoorthy |
Electromigration behavior of dual-damascene Cu interconnects--Structure, width, and length dependences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 44(5), pp. 747-754, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Christine S. Hau-Riege |
An introduction to Cu electromigration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 44(2), pp. 195-205, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Leen Biesemans, K. Schepers, Kris Vanstreels, Jan D'Haen, Ward De Ceuninck, Marc D'Olieslaeger |
MTF test system with AC based dynamic joule correction for electromigration tests on interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 44(9-11), pp. 1849-1854, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Maurizio Impronta, Sandro Farris, Andrea Scorzoni |
An improved isothermal electromigration test for Cu-damascene characterization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 44(9-11), pp. 1855-1860, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Insu Jeon, Young-Bae Park |
Analysis of the reservoir effect on electromigration reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 44(6), pp. 917-928, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Roman Barsky, Israel A. Wagner |
Electromigration-dependent parametric yield estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004, Tel Aviv, Israel, December 13-15, 2004, pp. 121-124, 2004, IEEE, 0-7803-8715-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | C. Pennetta, Lino Reggiani, E. Alfinito |
Monte Carlo simulation of electromigration phenomena in metallic lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Math. Comput. Simul. ![In: Math. Comput. Simul. 62(3-6), pp. 495-499, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Sherry Suat Cheng Khoo, Pee Ya Tan, Steven H. Voldman |
Microanalysis and electromigration reliability performance of high current transmission line pulse (TLP) stressed copper interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 43(7), pp. 1039-1045, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Masashi Hayashi, Shinji Nakano, Tetsuaki Wada |
Dependence of copper interconnect electromigration phenomenon on barrier metal materials. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 43(9-11), pp. 1545-1550, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Glenn A. Rinne |
Issues in accelerated electromigration of solder bumps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 43(12), pp. 1975-1980, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Jens Lienig, Göran Jerke |
Current-driven wire planning for electromigration avoidance in analog circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2003 Asia and South Pacific Design Automation Conference, ASP-DAC '03, Kitakyushu, Japan, January 21-24, 2003, pp. 783-788, 2003, ACM, 0-7803-7660-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Ennis T. Ogawa, Ki-Don Lee, Volker A. Blaschke, Paul S. Ho |
Electromigration reliability issues in dual-damascene Cu interconnections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Reliab. ![In: IEEE Trans. Reliab. 51(4), pp. 403-419, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
18 | Alfred F. K. Zehe |
Prediction of electromigration-void formation in copper conductors based on the electron configuration of matrix and solute atoms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 42(12), pp. 1849-1855, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
18 | Hajdin Ceric, Siegfried Selberherr |
Simulative prediction of the resistance change due to electromigration induced void evolution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 42(9-11), pp. 1457-1460, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
18 | H. V. Nguyen, Cora Salm, R. Wenzel, A. J. Mouthaan, Fred G. Kuper |
Simulation and experimental characterization of reservoir and via layout effects on electromigration lifetime. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 42(9-11), pp. 1421-1425, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
18 | Graziella Scandurra, Carmine Ciofi, Calogero Pace, F. Speroni, F. Alagi |
True constant temperature MTF test system for the characterization of electromigration of thick Cu interconnection lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 42(9-11), pp. 1347-1351, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
18 | H. V. Nguyen, Cora Salm, J. Vroemen, J. Voets, Benno Krabbenborg, Jaap Bisschop, A. J. Mouthaan, Fred G. Kuper |
Fast temperature cycling and electromigration induced thin film cracking in multilevel interconnection: experiments and modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 42(9-11), pp. 1415-1420, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
18 | M. R. Carriero, Stefano Di Pascoli, Giuseppe Iannaccone |
Simulation of failure time distributions of metal lines under electromigration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 42(9-11), pp. 1469-1472, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
18 | C. Caprile, Ilaria De Munari, Maurizio Impronta, Simona Podda, Andrea Scorzoni, Massimo Vanzi |
A specimen-current branching approach for FA of long Electromigration test lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 42(9-11), pp. 1715-1718, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
18 | J. Joseph Clement |
Electromigration Reliability Issues in High-Performance Circuit Design (Tutorial Abstract). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 3rd International Symposium on Quality of Electronic Design, ISQED 2002, San Jose, CA, USA, March 18-21, 2002, pp. 8, 2002, IEEE Computer Society, 0-7695-1561-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
18 | Kris Croes, R. Dreesen, Jean Manca, Ward De Ceuninck, Luc De Schepper, Luc Tielemans, P. J. van der Wel |
High-resolution in-situ of gold electromigration: test time reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 41(9-10), pp. 1439-1442, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
18 | A. H. Fischer, A. Abel, M. Lepper, A. E. Zitzelsberger, A. von Glasow |
Modeling bimodal electromigration failure distributions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 41(3), pp. 445-453, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
18 | Hide Murayama, Makoto Yamazaki, Shigeru Nakajima |
Electromigration and electrochemical reaction mixed failure mechanism in gold interconnection system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 41(8), pp. 1265-1272, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
18 | Shinji Yokogawa, Norio Okada, Yumi Kakuhara, Hideyuki Takizawa |
Electromigration Performance of Multi-level Damascene Copper Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 41(9-10), pp. 1409-1416, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
18 | M. K. Mazumder, S. Yamamoto, H. Maeda, J. Komori, Y. Mashiko |
Mechanism of pre-annealing effect on electromigration immunity of Al-Cu line. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 41(8), pp. 1259-1264, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
18 | Kaustav Banerjee, Amit Mehrotra |
Coupled Analysis of Electromigration Reliability and Performance in ULSI Signal Nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2001, San Jose, CA, USA, November 4-8, 2001, pp. 158-164, 2001, IEEE Computer Society, 0-7803-7249-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
18 | Carmine Ciofi, Ivan Ciofi, Stefano C. Di Pascoli, Bruno Neri |
Temperature controlled oven for low noise measurement systems [for electromigration characterization]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Instrum. Meas. ![In: IEEE Trans. Instrum. Meas. 49(3), pp. 546-549, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
18 | Irving Ames, Francois Max d'Heurle, Richard E. Horstmann |
Reduction of electromigration in aluminium films by copper doping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 44(1), pp. 89-92, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
18 | Aurobindo Dasgupta, Ramesh Karri |
Electromigration Reliability Enhancement via Bus Activity Distribution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 33st Conference on Design Automation, Las Vegas, Nevada, USA, Las Vegas Convention Center, June 3-7, 1996., pp. 353-356, 1996, ACM Press, 0-89791-779-0. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
18 | Chin-Chi Teng, Yi-Kan Cheng, Elyse Rosenbaum, Sung-Mo Kang |
Hierarchical Electromigration Reliability Diagnosis for VLSI Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 33st Conference on Design Automation, Las Vegas, Nevada, USA, Las Vegas Convention Center, June 3-7, 1996., pp. 752-757, 1996, ACM Press, 0-89791-779-0. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
18 | Chao-Kun Hu, Kenneth P. Rodbell, Timothy D. Sullivan, Kim Y. Lee, Dennis P. Bouldin |
Electromigration and stress-induced voiding in fine Al and Al-alloy thin-film lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 39(4), pp. 465-498, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
18 | Kaushik Roy 0001, Sharat Prasad |
Logic synthesis for reliability - an early start to controlling electromigration and hot carrier effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EURO-DAC ![In: Proceedings EURO-DAC'94, European Design Automation Conference, Grenoble, France, September 19-22, 1994, pp. 136-141, 1994, IEEE Computer Society, 0-89791-685-9. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
18 | J. Joseph Clement, Eugenia M. Atakov, James R. Lloyd |
Electromigration Reliability of VLSI Interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Digit. Tech. J. ![In: Digit. Tech. J. 4(2), pp. 114-125, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP BibTeX RDF |
|
18 | E. Weis, E. Kinsbron, M. Snyder, B. Vogel, N. Croitoru |
Electromigration Effects in VLSI Due to Various Current Types. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1991, Test: Faster, Better, Sooner, Nashville, TN, USA, October 26-30, 1991, pp. 354-357, 1991, IEEE Computer Society, 0-8186-9156-5. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
18 | Jerry P. Hwang |
REX - A VLSI Parasitic Extraction Tool for Electromigration and Signal Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 28th Design Automation Conference, San Francisco, California, USA, June 17-21, 1991., pp. 717-722, 1991, ACM, 0-89791395-7. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
18 | Farid N. Najm, Ibrahim N. Hajj, Ping Yang 0001 |
Electromigration median time-to-failure based on a stochastic current waveform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Computer Design: VLSI in Computers and Processors, ICCD 1989. Proceedings., 1989 IEEE International Conference on, Cambridge, MA, USA, October 2-4, 1989, pp. 447-450, 1989, IEEE, 0-8186-1971-6. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
14 | Pedro Marques Morgado, Paulo F. Flores, L. Miguel Silveira |
Generating realistic stimuli for accurate power grid analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 14(3), pp. 40:1-40:26, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
stimuli generation, simulation, verification, Power grid, ground bounce, voltage drop |
14 | Adam C. Cabe, Zhenyu Qi, Stuart N. Wooters, Travis N. Blalock, Mircea R. Stan |
Small embeddable NBTI sensors (SENS) for tracking on-chip performance decay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 1-6, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
14 | K. C. Narasimhamurthy, Roy P. Paily |
Impact of Bias Voltage on Magnetic Inductance of Carbon Nanotube Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009, pp. 505-510, 2009, IEEE Computer Society, 978-0-7695-3506-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
14 | Eric Karl, David T. Blaauw, Dennis Sylvester, Trevor N. Mudge |
Multi-Mechanism Reliability Modeling and Management in Dynamic Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(4), pp. 476-487, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Andrew Labun, Karan Jagjitkumar |
Rapid Detailed Temperature Estimation for Highly Coupled IC Interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(10), pp. 1840-1851, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Pedro Marques Morgado, Paulo F. Flores, José C. Monteiro 0001, LuÃs Miguel Silveira |
Generating Worst-Case Stimuli for Accurate Power Grid Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers, pp. 247-257, 2008, Springer, 978-3-540-95947-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Prasanth Mangalagiri, Sungmin Bae, Krishnan Ramakrishnan, Yuan Xie 0001, Vijaykrishnan Narayanan |
Thermal-aware reliability analysis for platform FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 722-727, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal S. Khouri, Magdy S. Abadir |
Thermal Aware Global Routing of VLSI Chips for Enhanced Reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 470-475, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
reliability, global routing, thermal |
14 | Eric Karl, Dennis Sylvester, David T. Blaauw |
Analysis of System-Level Reliability Factors and Implications on Real-Time Monitoring Methods for Oxide Breakdown Device Failures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 391-395, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Zhijian Lu, Wei Huang 0004, Mircea R. Stan, Kevin Skadron, John C. Lach |
Interconnect Lifetime Prediction for Reliability-Aware Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 15(2), pp. 159-172, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Pedro Marques Morgado, Paulo F. Flores, L. Miguel Silveira |
Generating Realistic Stimuli for Accurate Power Grid Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), May 9-11, 2007, Porto Alegre, Brazil, pp. 233-238, 2007, IEEE Computer Society, 0-7695-2896-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Arthur Nieuwoudt, Mosin Mondal, Yehia Massoud |
Predicting the Performance and Reliability of Carbon Nanotube Bundles for On-Chip Interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 708-713, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Aida Todri, Malgorzata Marek-Sadowska, Shih-Chieh Chang |
Analysis and optimization of power-gated ICs with multiple power gating configurations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007, pp. 783-790, 2007, IEEE Computer Society, 1-4244-1382-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Kanak Agarwal, Frank Liu 0001 |
Efficient computation of current flow in signal wires for reliability analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007, pp. 741-746, 2007, IEEE Computer Society, 1-4244-1382-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
14 | I-Jye Lin, Tsui-Yee Ling, Yao-Wen Chang |
Statistical circuit optimization considering device andinterconnect process variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Ninth International Workshop on System-Level Interconnect Prediction (SLIP 2007), Austin, Texas, USA, March 17-18, 2007, Proceedings, pp. 47-54, 2007, ACM, 978-1-59593-622-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
gate and wire sizing, statistical optimization |
14 | Sule Ozev, Daniel J. Sorin, Mahmut Yilmaz |
Low-cost run-time diagnosis of hard delay faults in the functional units of a microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings, pp. 317-324, 2007, IEEE, 1-4244-1258-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Chang-Tzu Lin, Tai-Wei Kung, De-Sheng Chen, Yiwen Wang 0003, Ching-Hwa Cheng |
Noise-Aware Floorplanning for Fast Power Supply Network Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 2028-2031, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Kambiz Rahimi |
Minimizing peak power in synchronous logic circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 247-252, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
power optimization, peak power, clock scheduling |
14 | Yehia Massoud, Arthur Nieuwoudt |
Modeling and design challenges and solutions for carbon nanotube-based interconnect in future high performance integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 2(3), pp. 155-196, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
nanotube bundle, interconnect, inductance, Carbon nanotube, resistance |
14 | Jürgen Rauscher, Hans-Jörg Pfleiderer |
Sensitivity of a Power Supply Damping Method to Resistance and Current Waveform Variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings, pp. 496-503, 2006, Springer, 3-540-39094-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Shih-Hsu Huang, Chun-Hua Cheng, Chung-Hsin Chiang, Chia-Ming Chang 0002 |
Peak Power Minimization through Power Management Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 868-871, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Jin-Tai Yan, Chia-Wei Wu, Yen-Hsiang Chen |
Wiring area optimization in floorplan-aware hierarchical power grids. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 1366-1369, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Muzhou Shao, Youxin Gao, Li-Pen Yuan, Hung-Ming Chen, Martin D. F. Wong |
Current Calculation on VLSI Signal Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 580-585, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Jinan Lou, Wei Chen |
Crosstalk-Aware Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 21(1), pp. 24-32, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers |
The Impact of Technology Scaling on Lifetime Reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: 2004 International Conference on Dependable Systems and Networks (DSN 2004), 28 June - 1 July 2004, Florence, Italy, Proceedings, pp. 177-, 2004, IEEE Computer Society, 0-7695-2052-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Robert A. Mullen |
RF design methodologies bridging system-IC-module design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 491-498, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Alain Salles, Bruno Estibals, Corinne Alonso |
Electro-thermal study of nano-inductors for integrated low power converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 717-720, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Syed M. Alam, Chee Lip Gan, Carl V. Thompson, Donald E. Troxel |
Circuit Level Reliability Analysis of Cu Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 5th International Symposium on Quality of Electronic Design (ISQED 2004), 22-24 March 2004, San Jose, CA, USA, pp. 238-243, 2004, IEEE Computer Society, 0-7695-2093-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Brian Marshall |
Beyond P-Cell and Gate-Level: Accuracy Requirements for Simulation of Nanometer SoC Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 19-21 July 2004, Banff, Alberta, Canada, pp. 23-26, 2004, IEEE Computer Society, 0-7695-2182-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Sheldon X.-D. Tan, C.-J. Richard Shi, Jyh-Chwen Lee |
Reliability-constrained area optimization of VLSI power/ground networks via sequence of linear programmings. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(12), pp. 1678-1684, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Yonghee Im, Kaushik Roy 0001 |
LALM: A Logic-Aware Layout Methodology to Enhance the Noise Immunity of Domino Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), New Trends and Technologies for VLSI Systems Design, 20-21 February 2003, Tampa, FL, USA, pp. 45-54, 2003, IEEE Computer Society, 0-7695-1904-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Eli Chiprout |
Early electrical wire projections and implications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The 5th International Workshop on System-Level Interconnect Prediction (SLIP 2003), Monterey, CA, USA, April 5-6, 2003, Proceedings, pp. 95, 2003, ACM, 1-58113-627-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Martijn T. Bennebroek |
Validation of wire length distribution models on commercial designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The 5th International Workshop on System-Level Interconnect Prediction (SLIP 2003), Monterey, CA, USA, April 5-6, 2003, Proceedings, pp. 41, 2003, ACM, 1-58113-627-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Yonghee Im, Kaushik Roy 0001 |
A logic-aware layout methodology to enhance the noise immunity of domino circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 637-640, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Ralph H. J. M. Otten, Raul Camposano, Patrick Groeneveld |
Design Automation for Deepsubmicron: Present and Future. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France, pp. 650-657, 2002, IEEE Computer Society, 0-7695-1471-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
14 | Sung-Mo Kang |
On-chip thermal engineering for peta-scale integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of 2002 International Symposium on Physical Design, ISPD 2002, Del Mar, CA, USA, April 7-10, 2002, pp. 76-76, 2002, ACM, 1-58113-460-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
14 | Shih-Hsu Huang, Chu-Liao Wang |
An effective floorplan-based power distribution network design methodology under reliability constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 353-356, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
14 | Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni |
Hierarchical power supply noise evaluation for early power grid design prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Third IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2001), March 31 - April 1, 2001, DoubleTree Hotel, Rohnert Park, CA, USA, Proceedings, pp. 183-188, 2001, ACM. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
14 | Kenneth Rose |
A comprehensive look at system level model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Third IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2001), March 31 - April 1, 2001, DoubleTree Hotel, Rohnert Park, CA, USA, Proceedings, pp. 69-87, 2001, ACM. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
14 | Gulsun Yasar, Charles Chiu, Robert A. Proctor, James P. Libous |
I/O Cell Placement and Electrical Checking Methodology for ASICs with Peripheral I/Os. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 26-28 March 2001, San Jose, CA, USA, pp. 71-75, 2001, IEEE Computer Society, 0-7695-1025-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
14 | Sabyasachi Sengupta, Somavalli Ramanathan, Biswadeep Chatterjee, Dibyendu Goswami |
Minimizing Area and Maximizing Porosity for Cell Layouts Using Innovative Routing Strategies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 14th International Conference on VLSI Design (VLSI Design 2001), 3-7 January 2001, Bangalore, India, pp. 353-358, 2001, IEEE Computer Society, 0-7695-0831-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
14 | Nagaraj Ns, Frank Cano, Sudha Thiruvengadam, Deepak Kapoor |
Performance and Reliability Verification of C6201/C6701 Digital Signal Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999, pp. 521-, 1999, IEEE Computer Society, 0-7695-0406-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
14 | Markus Wolf 0001, Ulrich Kleine |
Reliability driven module generation for analog layouts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 412-415, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
14 | Bernard A. McCoy, Gabriel Robins |
Non-tree routing [VLSI layout]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(6), pp. 780-784, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|