Search results for "reconfigurable"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
26	Klaus Danne, Marco Platzner	An EDF schedulability test for periodic tasks on reconfigurable hardware devices.	LCTES	2006	DBLP DOI BibTeX RDF	scheduling, FPGA, real-time, reconfigurable hardware, periodic tasks
26	Thilo Streichert, Christian Strengert, Christian Haubelt, Jürgen Teich	Dynamic task binding for hardware/software reconfigurable networks.	SBCCI	2006	DBLP DOI BibTeX RDF	online hardware/software partitioning, fault-tolerance, reconfigurable system
26	Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, Toru Awashima, Kazutoshi Wakabayashi, Li Jing	High-level synthesis challenges and solutions for a dynamically reconfigurable processor.	ICCAD	2006	DBLP DOI BibTeX RDF	high-level synthesis, dynamic reconfiguration, reconfigurable processor
26	Mary Mehrnoosh Eshaghian-Wilner, Alexander Khitun, Shiva Navab, Kang L. Wang	A nano-scale reconfigurable mesh with spin waves.	Conf. Computing Frontiers	2006	DBLP DOI BibTeX RDF	nano-scale architectures, reconfigurable mesh, spin waves
26	Sebastian Wallner	Micro-Task Processing in Heterogeneous Reconfigurable Systems.	J. Comput. Sci. Technol.	2005	DBLP DOI BibTeX RDF	reconfigurable heterogeneous architectures, configuration instructions, system-on-chip, signal processing, descriptors, parallel processing system
26	Phan Cong Vinh, Jonathan P. Bowen	Continuity aspects of embedded reconfigurable computing.	Innov. Syst. Softw. Eng.	2005	DBLP DOI BibTeX RDF	Reconfigurable computing Software development, Embedded systems, Formal methods, Dynamic reconfiguration
26	Florian Dittmann 0001, Markus Heberling	Placement of intermodule connections on partially reconfigurable devices.	SBCCI	2005	DBLP DOI BibTeX RDF	intermodule communication, reconfigurable computing, run-time reconfiguration
26	Soheil Ghiasi, Hyun J. Moon, Ani Nahapetian, Majid Sarrafzadeh	Collaborative and Reconfigurable Object Tracking.	J. Supercomput.	2004	DBLP DOI BibTeX RDF	embedded systems, feature selection, reconfigurable computing, object tracking, dynamic adaptation
26	Linda Kaouane, Mohamed Akil, Thierry Grandpierre, Yves Sorel	A Methodology to Implement Real-Time Applications onto Reconfigurable Circuits.	J. Supercomput.	2004	DBLP DOI BibTeX RDF	reconfigurable circuits, optimizations, FPGA, heuristics, rapid prototyping, graph transformations, circuit synthesis
26	Iouliia Skliarova, António de Brito Ferrari	Reconfigurable Hardware SAT Solvers: A Survey of Systems.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF	FPGA, reconfigurable computing, hardware acceleration, Boolean satisfiability
26	Mahmoud Méribout, Masato Motomura	A Combined Approach to High-Level Synthesis for Dynamically Reconfigurable Systems.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF	Dynamic reconfigurable logic, scheduling, partitioning, allocation, communication cost
26	Ian Robertson, James Irvine 0001	A design flow for partially reconfigurable hardware.	ACM Trans. Embed. Comput. Syst.	2004	DBLP DOI BibTeX RDF	dynamically reconfigurable logic (DRL), FPGA, power estimation, run-time reconfiguration (RTR), Viterbi decoder, configuration control
26	Alexander Thomas, Thomas Zander, Jürgen Becker 0001	Adaptive DMA-based I/O interfaces for data stream handling in multi-grained reconfigurable hardware architectures.	SBCCI	2004	DBLP DOI BibTeX RDF	HoneyComb architecture, adaptive I/O interfaces, data stream handling, multi-grained reconfigurable hardware architecture
26	Rodrigo Soares, Ivan Saraiva Silva, Arnaldo Azevedo	When reconfigurable architecture meets network-on-chip.	SBCCI	2004	DBLP DOI BibTeX RDF	multiprocessor, system on chip, network on chip, reconfigurable architecture
26	Mauricio Ayala-Rincón, Ricardo P. Jacobi, Luis Gustavo A. Carvalho, Carlos H. Llanos, Reiner W. Hartenstein	Modeling and prototyping dynamically reconfigurable systems for efficient computation of dynamic programming methods by rewriting-logic.	SBCCI	2004	DBLP DOI BibTeX RDF	configware, morphware, reconfigurable systolic arrays, term rewriting systems (TRS), dynamic programming, rewriting-logic
26	Fredy Rivera, Marcos Sánchez-Élez, Milagros Fernández, Román Hermida, Nader Bagherzadeh	Efficient mapping of hierarchical trees on coarse-grain reconfigurable architectures.	CODES+ISSS	2004	DBLP DOI BibTeX RDF	multimedia, computer graphics, reconfigurable architectures, SIMD, hierarchical trees
26	François-Xavier Standaert, Gilles Piret, Gaël Rouvroy, Jean-Jacques Quisquater, Jean-Didier Legat	ICEBERG : An Involutional Cipher Efficient for Block Encryption in Reconfigurable Hardware.	FSE	2004	DBLP DOI BibTeX RDF	block cipher design, side-channel resistance, reconfigurable hardware, efficient implementations
26	Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm, Jeffrey Hammes	Automatic compilation to a coarse-grained reconfigurable system-opn-chip.	ACM Trans. Embed. Comput. Syst.	2003	DBLP DOI BibTeX RDF	compilers, Reconfigurable computing, SIMD
26	Yuanqing Guo, Gerard J. M. Smit, Hajo Broersma, Paul M. Heysters	A graph covering algorithm for a coarse grain reconfigurable system.	LCTES	2003	DBLP DOI BibTeX RDF	template generation, compiler, reconfigurable system
26	Jong-eun Lee, Kiyoung Choi, Nikil D. Dutt	An algorithm for mapping loops onto coarse-grained reconfigurable architectures.	LCTES	2003	DBLP DOI BibTeX RDF	ALU array, memory bandwidth utilization, coarse-grained reconfigurable architecture, mapping algorithm
26	Octavian Cret, Kalman Pusztai, Cristian Vancea, Balint Szente	CREC: A Novel Reconfigurable Computing Design Methodology.	IPDPS	2003	DBLP DOI BibTeX RDF	general-purpose reconfigurable systems, Hardware / Software CoDesign, multiple execution units, FPGA, VHDL, RISC, Instruction Level Parallelism (ILP)
26	Apostolos Dollas, Christopher Kachris, Nikolaos G. Bourbakis	Performance Analysis of Fixed, Reconfigurable, and Custom Architectures for the SCAN Image and Video Encryption Algorithm.	FCCM	2003	DBLP DOI BibTeX RDF	FPGA, Architecture, Reconfigurable, Encryption
26	Juanjo Noguera, Rosa M. Badia	System-level power-performance trade-offs in task scheduling for dynamically reconfigurable architectures.	CASES	2003	DBLP DOI BibTeX RDF	reconfigurable computing, dynamic scheduling, clock-gating, frequency scaling, power-performance trade-offs
26	Mauricio Ayala-Rincón, Rodrigo Borges Nogueira, Carlos H. Llanos, Ricardo P. Jacobi, Reiner W. Hartenstein	Efficient Computation of Algebraic Operations over Dynamically Reconfigurable Systems Specified by Rewriting-Logic Environments.	SCCC	2003	DBLP DOI BibTeX RDF	Reconfigurable Systolic Arrays, Fast Fourier Transform, Rewriting-Logic, Term Rewriting Systems
26	Shi-Jinn Horng, Horng-Ren Tsai, Yi Pan 0001, Jennifer Seitzer	Optimal Algorithms for the Channel-Assignment Problem on a Reconfigurable Array of Processors with Wider Bus Networks.	IEEE Trans. Parallel Distributed Syst.	2002	DBLP DOI BibTeX RDF	minimum coloring problem, reconfigurable array of processors with wider bus networks, parallel algorithm, interval graph, list ranking, integer sorting, Channel-assignment problem
26	Yosi Ben-Asher, Esti Stein	Basic Algorithms for the Asynchronous Reconfigurable Mes.	IPDPS	2002	DBLP DOI BibTeX RDF	APRAM, Asynchronous, Reconfigurable mesh
26	Debashis Panigrahi, Clark N. Taylor, Sujit Dey	A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication.	ASP-DAC/VLSI Design	2002	DBLP DOI BibTeX RDF	Adaptive, image compression, reconfigurable architecture, wireless multimedia
26	Jorge E. Carrillo, Paul Chow	The effect of reconfigurable units in superscalar processors.	FPGA	2001	DBLP DOI BibTeX RDF	OneChip, superscalar processors, reconfigurable processors
26	Lev Kirischian	Optimization of Parallel Task Execution on the Adaptive Reconfigurable Group Organized Computing System.	PARELEC	2000	DBLP DOI BibTeX RDF	Reconfigurable architecture: FPGA, Architecture selection graph, Graph arrangement
26	Christian Siemers, Sybille Siemers	Reconfigurable Computing Based on Universal Configurable Blocks-A New Approach for Supporting Performance- and Realtime-Dominated Applications.	ACAC	2000	DBLP DOI BibTeX RDF	Block-based Instruction Set Architecture, Realtime-dominated Environment, Reconfigurable Computing
26	Holger Blume, Hans-Martin Blüthgen, Christiane Henning, Patrick Osterloh	Integration of High-Performance ASICs into Reconfigurable Systems Providing Additional Multimedia Functionality.	ASAP	2000	DBLP DOI BibTeX RDF	reconfigurable coprocessor board, multimedia, VLSI, DSP, digital signal processing, ASIC, CMOS
26	Virginia C. Carneiro de Paula, George R. Ribeiro-Justo, Paulo R. F. Cunha	Specifying and Verifying Reconfigurable Software Architectures.	PDSE	2000	DBLP DOI BibTeX RDF	reconfigurable software architecture, software architecture, formal specification, dynamic software architecture
26	João M. P. Cardoso, Horácio C. Neto	Macro-Based Hardware Compilation of Java(tm) Bytecodes into a Dynamic Reconfigurable Computing System.	FCCM	1999	DBLP DOI BibTeX RDF	FPGAs, Reconfigurable Computing, Behavioral Synthesis, Hardware Compilation
26	Kiarash Barzagan, Majid Sarrafzadeh	Fast Online Placement for Reconfigurable Computing.	FCCM	1999	DBLP DOI BibTeX RDF	fast placement, CAD algorithms, efficient algorithms, Reconfigurable systems, FPGA architecture
26	Jason R. Hess, David C. Lee, Scott J. Harper, Mark T. Jones, Peter M. Athanas	Implementation and Evaluation of a Prototype Reconfigurable Router.	FCCM	1999	DBLP DOI BibTeX RDF	Stream-based, Networking, Reconfigurable, Hardware, Active networks
26	Kiran Bondalapati, Viktor K. Prasanna	Dynamic Precision Management for Loop Computations on Reconfigurable Architectures.	FCCM	1999	DBLP DOI BibTeX RDF	Reconfigurable Computing, Precision, Loops
26	Werner Erhard, Andreas Reinsch, Torsten Schober	First Steps towards a Reconfigurable Asynchronous System.	IEEE International Workshop on Rapid System Prototyping	1999	DBLP DOI BibTeX RDF	Petri nets, design methodology, asynchronous circuits, reconfigurable hardware
26	Darren C. Cronquist, Chris Fisher, Miguel E. Figueroa, Paul Franklin, Carl Ebeling	Architecture Design of Reconfigurable Pipelined Datapaths.	ARVLSI	1999	DBLP DOI BibTeX RDF	High-speed computation, Pipelining, Signal processing, Reconfigurable architectures, Configurable computing
26	José Alberto Fernández-Zepeda, Ramachandran Vaidyanathan, Jerry L. Trahan	Scaling Simulation of the Fusing-Restricted Reconfigurable Mesh.	IEEE Trans. Parallel Distributed Syst.	1998	DBLP DOI BibTeX RDF	scaling simulation, simulation overhead, concurrent write rules, parallel algorithms, Reconfigurable mesh, model simulation
26	Hossam A. ElGindy, Lachlan Wetherall	A Simple Voronoi Diagram Algorithm for a Reconfigurable Mesh.	IEEE Trans. Parallel Distributed Syst.	1997	DBLP DOI BibTeX RDF	reconfigurable mesh architectures, broadcasting buses, Parallel algorithms, Voronoi diagram, geometric algorithms
26	Ju-wook Jang, Heonchul Park, Viktor K. Prasanna	An Optimal Multiplication Algorithm on Reconfigurable Mesh.	IEEE Trans. Parallel Distributed Syst.	1997	DBLP DOI BibTeX RDF	area-time trade off, optimal algorithm, VLSI architecture, reconfigurable mesh, Integer multiplication
26	M. Manzur Murshed, Richard P. Brent	Constant Time Algorithms for Computing the Contour of Maximal Elements on the Reconfigurable Mesh.	ICPADS	1997	DBLP DOI BibTeX RDF	Parallel algorithm, Computational geometry, Reconfigurable mesh
26	Ten-Hwang Lai, Ming-Jye Sheng	Constructing Euclidean Minimum Spanning Trees and All Nearest Neighbors on Reconfigurable Meshes.	IEEE Trans. Parallel Distributed Syst.	1996	DBLP DOI BibTeX RDF	Parallel algorithms, computational geometry, reconfigurable meshes
26	Toshio Fukuda, Seiya Nakagawa	Approach to the dynamically reconfigurable robotic system.	J. Intell. Robotic Syst.	1988	DBLP DOI BibTeX RDF	DRRS (dynamically reconfigurable robotic system), cell/module structure, reorganization of the optimal manipulator configurations, algorithm for approach control between cells
26	Ricardo S. Ferreira 0001, Marcone Laure, Antonio Carlos Schneider Beck, Thiago Lo, Mateus B. Rutzig, Luigi Carro	A low cost and adaptable routing network for reconfigurable systems.	IPDPS	2009	DBLP DOI BibTeX RDF
26	Osman Hasan, Naeem Abbasi, Sofiène Tahar	Formal Probabilistic Analysis of Stuck-at Faults in Reconfigurable Memory Arrays.	IFM	2009	DBLP DOI BibTeX RDF
26	Mateus B. Rutzig, Antonio Carlos Schneider Beck, Luigi Carro	Dynamically Adapted Low Power ASIPs.	ARC	2009	DBLP DOI BibTeX RDF
26	Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Chen, David Kammler, Ling Hao, Rainer Leupers, Heinrich Meyr, Gerd Ascheid	A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
26	Mitchell J. Myjak, José G. Delgado-Frias	A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
26	Madhura Purnaprajna, Christoph Puttmann, Mario Porrmann	Power Aware Reconfigurable Multiprocessor for Elliptic Curve Cryptography.	DATE	2008	DBLP DOI BibTeX RDF
26	Cao Liang, Xinming Huang 0001	SmartCell: A power-efficient reconfigurable architecture for data streaming applications.	SiPS	2008	DBLP DOI BibTeX RDF
26	Ming-Chiuan Shiu, Hou-Tsan Lee, Feng-Li Lian, Li-Chen Fu	Actuation Design of Two-Dimensional Self-Reconfigurable Robots.	SUTC	2008	DBLP DOI BibTeX RDF	Robot, Actuation, self-reconfiguration
26	Wenyin Fu, Katherine Compton	Scheduling Intervals for Reconfigurable Computing.	FCCM	2008	DBLP DOI BibTeX RDF
26	Daesun Oh, Keshab K. Parhi	Area efficient controller design of barrel shifters for reconfigurable LDPC decoders.	ISCAS	2008	DBLP DOI BibTeX RDF
26	Gian Carlo Cardarilli, Luca Di Nunzio, Marco Re, Alberto Nannarelli	ADAPTO: full-adder based reconfigurable architecture for bit level operations.	ISCAS	2008	DBLP DOI BibTeX RDF
26	Foad Lotfifar, Hadi Shahriar Shahhoseini	Performance modeling of partially reconfigurable computing systems.	AICCSA	2008	DBLP DOI BibTeX RDF
26	Jyh-Cheng Chen, Jui-Hung Yeh, Shao-Hsiu Hung, Fu-Cheng Chen, Li-Wei Lin, Yi-Wen Lan	Reconfigurable architecture and mobility management for next-generation wireless IP networks.	IEEE Trans. Wirel. Commun.	2007	DBLP DOI BibTeX RDF
26	Mateusz Majer, Jürgen Teich, Ali Ahmadinia, Christophe Bobda	The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-based Computer.	J. VLSI Signal Process.	2007	DBLP DOI BibTeX RDF	FPGA-based computer, rekonfiguration manager, platform, relocation, partiall dynamic reconfiguration, ESM
26	Jürgen Becker 0001, Adam Donlin, Michael Hübner 0001	New tool support and architectures in adaptive reconfigurable computing.	VLSI-SoC	2007	DBLP DOI BibTeX RDF
26	Ying Wang 0032, Weinan Chen, Xiao-Wei Wang, Hong-Jun You, Chenglian Peng	Enabling Reconfigurable SoC in Multimedia Processing.	CIT	2007	DBLP DOI BibTeX RDF
26	Syed Sajjad Rizvi, Syed N. Hyder, Aasia Riasat	Performance Model for a Reconfigurable Coprocessor.	SCSS (1)	2007	DBLP DOI BibTeX RDF
26	Kang Sun, Xuezeng Pan, Lingdi Ping	A Reconfigurable Computing Engine for Wavelet Transforms.	IPDPS	2007	DBLP DOI BibTeX RDF
26	Wei Li 0131, Zibin Dai, Tao Chen 0047, Tao Meng, Xuan S. Yang	Design and Implementation of a High-Speed Reconfigurable Modular Arithmetic Unit.	APPT	2007	DBLP DOI BibTeX RDF
26	Florian Dittmann 0001	Algorithmic Skeletons for the Programming of Reconfigurable Systems.	SEUS	2007	DBLP DOI BibTeX RDF
26	Zhuo Ruan, Yuzhang Han, Hongbo Cai, Shengzhen Jin, Jianguo Han	A Dynamically Partial-reconfigurable FPGA-based Architecture for Data Processing on Space Solar Telescope.	SIES	2007	DBLP DOI BibTeX RDF
26	Guochang Zhou, Xubang Shen	An Architecture of Dynamically Reconfigurable Processing Unit(RPU).	ICPP Workshops	2007	DBLP DOI BibTeX RDF
26	Onur Turkcu, Suresh Subramaniam 0001	Blocking Analysis of Limited-Reconfigurable Optical Networks.	ICCCN	2007	DBLP DOI BibTeX RDF
26	Afshin Niktash, Hooman Parizi, Nader Bagherzadeh	Application of a Heterogeneous Reconfigurable Architecture to OFDM Wireless Systems.	ISCAS	2007	DBLP DOI BibTeX RDF
26	Marco Lanuzza, Stefania Perri, Pasquale Corsonello, Martin Margala	A New Reconfigurable Coarse-Grain Architecture for Multimedia Applications.	AHS	2007	DBLP DOI BibTeX RDF
26	Ted Huffmire, Brett Brotherton, Gang Wang 0015, Timothy Sherwood, Ryan Kastner, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine	Moats and Drawbridges: An Isolation Primitive for Reconfigurable Hardware Based Systems.	S&P	2007	DBLP DOI BibTeX RDF
26	Phan Cong Vinh, Jonathan P. Bowen	A Formal Approach to Aspect-Oriented Modular Reconfigurable Computing.	TASE	2007	DBLP DOI BibTeX RDF
26	Evangelos F. Stefatos, Tughrul Arslan, Didier Keymeulen, Ian Ferguson	Autonomous Realization of Boeing/JPL Sensor Electronics based on Reconfigurable System-on-Chip Technology.	ISVLSI	2006	DBLP DOI BibTeX RDF
26	Ravindra V. Kshirsagar, Rajendra M. Patrikar	Design of a Reconfigurable Multiprocessor Core for Higher Performance and Reliability of Embedded Systems.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
26	Kentaro Nakahara, Shin'ichi Kouyama, Tomonori Izumi, Hiroyuki Ochi, Yukihiro Nakamura	Autonomous-repair cell for fault tolerant dynamic-reconfigurable devices.	FPGA	2006	DBLP DOI BibTeX RDF
26	Matthew Smith 0001, B. Klose, Ralph Ewerth, Thomas Friese, Michael Engel, Bernd Freisleben	Runtime Integration of Reconfigurable Hardware in Service-Oriented Grids.	ICWS	2006	DBLP DOI BibTeX RDF
26	George Ferizis, Hossam A. ElGindy	Mapping Recursive Functions to Reconfigurable Hardware.	FPL	2006	DBLP DOI BibTeX RDF
26	Goncalo M. de Matos, Horácio C. Neto	On Reconfigurable Architectures for Efficient Matrix Inversion.	FPL	2006	DBLP DOI BibTeX RDF
26	Michael Ullmann, Jürgen Becker 0001	Communication concept for adaptive intelligent run-time systems supporting distributed reconfigurable embedded systems.	IPDPS	2006	DBLP DOI BibTeX RDF
26	Maya B. Gokhale	RAW keynote 1: the outer limits: reconfigurable computing in space and in orbit.	IPDPS	2006	DBLP DOI BibTeX RDF
26	Nikolaos Vassiliadis, George Theodoridis, Spiridon Nikolaidis 0001	An automated development framework for a RISC processor with reconfigurable instruction set extensions.	IPDPS	2006	DBLP DOI BibTeX RDF
26	Wing On Fung, Tughrul Arslan	A stochastic multi-objective algorithm for the design of high performance reconfigurable architectures.	IPDPS	2006	DBLP DOI BibTeX RDF
26	Heather Quinn, Debayan Bhaduri, Christof Teuscher, Paul S. Graham, Maya B. Gokhale	The STAR-C Truth: Analyzing Reconfigurable Supercomputing Reliability.	FCCM	2006	DBLP DOI BibTeX RDF
26	Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis	Mapping DSP applications on processor/coarse-grain reconfigurable array architectures.	ISCAS	2006	DBLP DOI BibTeX RDF
26	M. C. Andrade, Célio Estevan Morón, José Hiroki Saito	Reconfigurable System with Virtuoso Real-Time Kernel and TEV Environment.	SBAC-PAD	2006	DBLP DOI BibTeX RDF
26	Rami S. Abielmona, Voicu Groza, Arkan Khalaf	Run-Time Reconfigurable Built-in-Self-Test.	CCECE	2006	DBLP DOI BibTeX RDF
26	Tomoyuki Saiki, Hideyuki Ichihara, Tomoo Inoue	A Reconfigurable Embedded Decompressor for Test Compression.	DELTA	2006	DBLP DOI BibTeX RDF
26	Manman Peng, Yuming Wang	A Self-Tuning Algorithm for Managing Reconfigurable Cache.	PDCAT	2006	DBLP DOI BibTeX RDF
26	Yoonjin Kim, Mary Kiemb, Chulsoo Park, Jinyong Jung, Kiyoung Choi	Resource Sharing and Pipelining in Coarse-Grained Reconfigurable Architecture for Domain-Specific Optimization.	DATE	2005	DBLP DOI BibTeX RDF
26	Arjun K. Pai, Khaled Benkrid, Danny Crookes	Embedded Reconfigurable DCT Architectures Using Adder-Based Distributed Arithmetic.	CAMP	2005	DBLP DOI BibTeX RDF
26	Zhenyu Liu, Tughrul Arslan, Sami Khawam, Iain Lindsay	A high performance synthesisable unsymmetrical reconfigurable fabric for heterogeneous finite state machines.	ASP-DAC	2005	DBLP DOI BibTeX RDF
26	Cheng Zhan, Tughrul Arslan, Sami Khawam, Iain Lindsay	A domain specific reconfigurable Viterbi fabric for system-on-chip applications.	ASP-DAC	2005	DBLP DOI BibTeX RDF
26	Markus P. J. Fromherz, Lara S. Crawford, Haitham A. Hindi	Coordinated Control for Highly Reconfigurable Systems.	HSCC	2005	DBLP DOI BibTeX RDF
26	Hadi Esmaeilzadeh, Saeed Shamshiri, Pooya Saeedi, Zainalabedin Navabi	ISC: Reconfigurable Scan-Cell Architecture for Low Power Testing.	Asian Test Symposium	2005	DBLP DOI BibTeX RDF
26	Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis	A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable Platforms.	IPDPS	2005	DBLP DOI BibTeX RDF
26	Sajid Baloch, Imran Ahmed 0001, Tughrul Arslan	Domain-Specific Reconfigurable Array Targeting Discrete Wavelet Transform for System-on-Chip Applications.	IPDPS	2005	DBLP DOI BibTeX RDF
26	Brian F. Veale, John K. Antonio, Monte P. Tull	Configuration Steering for a Reconfigurable Superscalar Processor.	IPDPS	2005	DBLP DOI BibTeX RDF
26	Claudio Mucci, Fabio Campi, Antonio Deledda, Alberto Fazzi, Mirco Ferri, Massimo Bocchi	A Cycle-Accurate ISS for a Dynamically Reconfigurable Processor Architecture.	IPDPS	2005	DBLP DOI BibTeX RDF
26	Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis	A methodology for partitioning DSP applications in hybrid reconfigurable systems.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
26	Yen-Tai Lai, Hsin-Ya Lai, Chia-Nan Yeh	Placement for the reconfigurable datapath architecture.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
26	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis	Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware.	ASAP	2005	DBLP DOI BibTeX RDF