Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
19 | John G. Kenney, Giri Rangan, Karthik Ramamurthy, Gabor C. Temes |
An enhanced slew rate source follower. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 30(2), pp. 144-146, February 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
19 | Andrew E. Stevens, Gerald A. Miller |
A high-slew integrator for switched-capacitor circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 29(9), pp. 1146-1149, September 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
19 | Jaime Ramírez-Angulo |
High Slew Rate, Low Voltage BiCMOS and Bipolar Operational Amplifier Architectures with Rail to Rrail Common Mode Input Voltage Swing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30 - June 2, 1994, pp. 743-746, 1994, IEEE, 0-7803-1916-8. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
19 | Hironori Fujii, Shigeyuki Takeda |
Control of a flexible space structure with a tip mass in minimum time slew maneuver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Robotics, Mechatronics and Manufacturing Systems ![In: Robotics, Mechatronics and Manufacturing Systems, pp. 907-912, 1993, Elsevier, 978-0-444-89700-8. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
19 | Kartahik Ramamurthy, John G. Kenney, Giri Rangan |
On-chip Tests for Gain Bandwidth Product and Slew Rate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 1993 IEEE International Symposium on Circuits and Systems, ISCAS 1993, Chicago, Illinois, USA, May 3-6, 1993, pp. 1341-1344, 1993, IEEE, 0-7803-1281-3. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP BibTeX RDF |
|
19 | Dong Li |
A control design approach for slew maneuver of elastic multibody systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICRA ![In: Proceedings of the 1992 IEEE International Conference on Robotics and Automation, Nice, France, May 12-14, 1992, pp. 729-734, 1992, IEEE Computer Society, 0-8186-2720-4. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
19 | Andrzej Borys |
Sinusoidal oscillators with slew-rate type nonlinearity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Eur. Trans. Telecommun. ![In: Eur. Trans. Telecommun. 2(4), pp. 447-451, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
19 | Hiekeun Ko, Clark C. Davis, Edwin K. Iversen, Stephen C. Jacobsen |
High stiffness and low slew drag in an antagonistic control system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICRA ![In: Proceedings of the 1990 IEEE International Conference on Robotics and Automation, Cincinnati, Ohio, USA, May 13-18, 1990, pp. 1879-1884, 1990, IEEE, 0-8186-9061-5. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
19 | P. P. J. van den Bosch, W. Jongkind, A. C. M. van Swieten |
Adaptive attitude control for large-angle slew manoeuvres. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Autom. ![In: Autom. 22(2), pp. 209-215, 1986. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
|
12 | Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs |
RDE-based transistor-level gate simulation for statistical static timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 787-792, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
non-Monte Carlo, transistor-level modeling, statistical static timing analysis |
12 | Abhishek A. Sinkar, Nam Sung Kim |
Analyzing potential power reduction with adaptive voltage positioning optimized for multicore processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009, pp. 189-194, 2009, ACM, 978-1-60558-684-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
adaptive voltage positioning, multicore processor |
12 | Pinaki Mazumder |
Disruptive technologies and neurally-inspired architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 283-284, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
glsvlsi 2009 invited talk |
12 | Ali Dasdan, Santanu Kolay, Mustafa Yazgan |
Derating for static timing analysis: Theory and practice. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 719-727, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Kwangok Jeong, Andrew B. Kahng, Hailong Yao |
Revisiting the linear programming framework for leakage power vs. performance optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 127-134, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Nagendra Krishnapura, Shanthi Pavan |
Negative Feedback System and Circuit Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009, pp. 35-36, 2009, IEEE Computer Society, 978-0-7695-3506-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Jaime Ramírez-Angulo, Ramón González Carvajal, Antonio J. López-Martín |
Techniques for the Design of Low Voltage Power Efficient Analog and Mixed Signal Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009, pp. 26-27, 2009, IEEE Computer Society, 978-0-7695-3506-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Maik Nijhuis, Herbert Bos, Henri E. Bal, Cédric Augonnet |
Mapping and Synchronizing Streaming Applications on Cell Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Fourth International Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings, pp. 216-230, 2009, Springer, 978-3-540-92989-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Sari Onaissi, Farid N. Najm |
A Linear-Time Approach for Static Timing Analysis Covering All Process Corners. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(7), pp. 1291-1304, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Vaddadi P. Chandu, Karandeep Singh |
A Model for Multiplayer Interactive Games in Cellular Wireless Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Innovative Techniques in Instruction Technology, E-learning, E-assessment, and Education ![In: Innovative Techniques in Instruction Technology, E-learning, E-assessment, and Education, Proceedings of the 2007 International Conference on Engineering Education, Instructional Technology, Assessment, and E-learning (EIAE 2007), part of the International Joint Conferences on Computer, Information, and Systems Sciences, and Engineering (CISSE 2007), Bridgeport, CT, USA, December 3-12, 2007, pp. 241-248, 2008, Springer, 978-1-4020-8738-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Sean X. Shi, Anand Ramalingam, Daifeng Wang, David Z. Pan |
Latch Modeling for Statistical Timing Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 1136-1141, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Tao Luo 0002, David Newmark, David Z. Pan |
Total power optimization combining placement, sizing and multi-Vt through slack distribution management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 352-357, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Seulki Lee, Jerald Yoo, Hoi-Jun Yoo |
A 200Mbps 0.02nJ/b dual-mode inductive coupling transceiver for cm-range interconnection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 1954-1957, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Weixun Yan, Robert Kolm, Horst Zimmermann |
Efficient four-stage frequency compensation for low-voltage amplifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 2278-2281, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Sachin Shrivastava, Harindranath Parameswaran |
Statistical Crosstalk Noise Analysis Using First Order Parameterized Approach for Aggressor Grouping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 445-449, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
statistical crosstalk, aggressor grouping |
12 | Xin Wang, Alireza Kasnavi, Harold Levy |
An Efficient Method for Fast Delay and SI Calculation Using Current Source Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 57-61, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Delay calculation, gate-level analysis, transient simulation, SI |
12 | Vineeth Veetil, Dennis Sylvester, David T. Blaauw |
Fast and Accurate Waveform Analysis with Current Source Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 53-56, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
weibull, bicubic spline, current source model |
12 | Savithri Sundareswaran, Jacob A. Abraham, Alexandre Ardelea, Rajendran Panda |
Characterization of Standard Cells for Intra-Cell Mismatch Variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 213-219, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Statistical Characterization, Intra-Cell Variations, Random Variations, Mismatch Variations |
12 | Gerald Bortis |
Experiences with Mirth: an open source health care integration engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSE ![In: 30th International Conference on Software Engineering (ICSE 2008), Leipzig, Germany, May 10-18, 2008, pp. 649-652, 2008, ACM, 978-1-60558-079-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
health care integration, software architecture, middleware |
12 | Chih-Wen Lu, Yen-Chih Shen, Meng-Lieh Sheu |
A high-driving class-AB buffer amplifier with a new pseudo source follower. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: IFIP VLSI-SoC 2007, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Atlanta, GA, USA, 15-17 October 2007, pp. 105-109, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Run Chen, Liyuan Liu, Dongmei Li, Zhihua Wang 0001 |
Full custom design of a three-stage amplifier with 5500MHz·pF/mW Performance in 0.18 mum CMO S. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: IFIP VLSI-SoC 2007, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Atlanta, GA, USA, 15-17 October 2007, pp. 242-247, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Haoxing Ren, David Z. Pan, Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia |
Hippocrates: First-Do-No-Harm Detailed Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 141-146, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
synthesis optimizations, Hippocrates, first-do-no-harm detailed placement, pin-based timing constraint, electrical constraints, reduced wire-length |
12 | Mark Peters, Anthony Man-Cho So, Yinyu Ye 0001 |
Pari-Mutuel Markets: Mechanisms and Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WINE ![In: Internet and Network Economics, Third International Workshop, WINE 2007, San Diego, CA, USA, December 12-14, 2007, Proceedings, pp. 82-95, 2007, Springer, 978-3-540-77104-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Gianluca Giustolisi |
Two-Stage OTA Design Based on Settling-Time Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 469-472, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Mike Bichan, Anthony Chan Carusone |
Crosstalk-Aware Transmitter Pulse-Shaping for Parallel Chip-to-Chip Links. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 189-192, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Jingjing Hu, Johan H. Huijsing, Kofi A. A. Makinwa |
A Three-Stage Amplifier with Quenched Multipath Frequency Compensation for All Capacitive Loads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 225-228, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Ram Dantu, Prakash Kolan, Robert Akl, Kall Loper |
Classification of Attributes and Behavior in Risk Management Using Bayesian Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISI ![In: IEEE International Conference on Intelligence and Security Informatics, ISI 2007, New Brunswick, New Jersey, USA, May 23-24, 2007, Proceedings, pp. 71-74, 2007, IEEE, 1-4244-1329-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Jens Vygen |
Slack in static timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(9), pp. 1876-1885, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Kanak Agarwal, Mridul Agarwal, Dennis Sylvester, David T. Blaauw |
Statistical interconnect metrics for physical-design optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(7), pp. 1273-1288, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Yang Fang, Xiaobo Tan |
A Dynamic JKR Model with Application to Vibrational Release in Micromanipulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IROS ![In: 2006 IEEE/RSJ International Conference on Intelligent Robots and Systems, IROS 2006, October 9-15, 2006, Beijing, China, pp. 1341-1346, 2006, IEEE, 1-4244-0258-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Naoaki Ohkubo, Kimiyoshi Usami |
Delay modeling and static timing analysis for MTCMOS circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 570-575, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
interpolation., selective-MT, delay, leakage power, static timing analysis, MTCMOS |
12 | Fabio Lacerda, Stefano Pietri, Alfredo Olmos |
A differential switched-capacitor amplifier with programmable gain and output offset voltage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2006, Ouro Preto, MG, Brazil, August 28 - September 1, 2006, pp. 98-102, 2006, ACM. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
differential to single ended, switched capacitor stage, analog integrated circuits |
12 | Lukas Fujcik, Jiri Haze, Radimir Vrba, Thibault Mougel |
Modeling and design of novel architecture of multibit switched-capacitor sigma-delta converter with two-step quantization process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICN/ICONS/MCL ![In: Fifth International Conference on Networking and the International Conference on Systems (ICN / ICONS / MCL 2006), 23-29 April 2006, Mauritius, pp. 186, 2006, IEEE Computer Society, 0-7695-2552-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Zhanyuan Jiang, Shiyan Hu, Jiang Hu, Zhuo Li 0001, Weiping Shi |
A new RLC buffer insertion algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 553-557, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Anas A. Hamoui, T. Alhajj, Mohammad Taherzadeh-Sani |
Behavioral modeling of Opamp gain and dynamic effectsfor power optimization of Delta-Sigma modulators and pipelined ADCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006, pp. 330-333, 2006, ACM, 1-59593-462-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
sigma-delta (??) modulation, synthesis, behavioral modeling, discrete-time systems, analog-to-digital conversion |
12 | Alexey Teplinsky, Raymond Flynn, Orla Feely |
Limit cycles in bang-bang phase-locked loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Yasutaka Haga, Richard C. S. Morling, Izzet Kale |
A new bulk-driven input stage design for sub 1-volt CMOS op-amps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Mona Safi-Harb, Gordon W. Roberts |
A CMOS circuit for embedded GHz measurement of digital signal rise time degradation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Hanif Fatemi, Soroush Abbaspour, Massoud Pedram, Amir H. Ajami, Emre Tuncer |
SACI: statistical static timing analysis of coupled interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006, pp. 241-246, 2006, ACM, 1-59593-347-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
coupled interconnect, sources of variation, crosstalk noise, statistical timing analysis |
12 | Roopak Suri, C. M. Markan |
Threshold Trimming Based Design of a CMOS Programmable Operational Amplifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 717-720, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Kornika Moolpho, Jitkasame Ngarmnil |
Low Voltage High-Performance Class-AB FGMOS Buffer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 1779-1782, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Tao Luo 0002, David Newmark, David Z. Pan |
A new LP based incremental timing driven placement for high performance designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 1115-1120, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Hamid Hatamkhani, Frank Lambrecht, Vladimir Stojanovic, Chih-Kong Ken Yang |
Power-centric design of high-speed I/Os. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 867-872, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
serial link, convex optimization, I/O, power minimization, channel model |
12 | Yu Cao 0001, Xuejue Huang, Dennis Sylvester, Tsu-Jae King 0001, Chenming Hu |
Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(1), pp. 158-162, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Timothy M. Chan |
On Levels in Arrangements of Curves, II: A Simple Inequality and Its Consequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Discret. Comput. Geom. ![In: Discret. Comput. Geom. 34(1), pp. 11-24, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner |
Two-Phase Clocking and a New Latch Design for Low-Power Portable Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings, pp. 446-455, 2005, Springer, 3-540-29013-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Paolo Ferragina, Fabrizio Luccio, Giovanni Manzini, S. Muthukrishnan 0001 |
Structuring labeled trees for optimal succinctness, and beyond. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FOCS ![In: 46th Annual IEEE Symposium on Foundations of Computer Science (FOCS 2005), 23-25 October 2005, Pittsburgh, PA, USA, Proceedings, pp. 184-196, 2005, IEEE Computer Society, 0-7695-2468-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | Kalle Folkesson, Christer Svensson, B. Knuthammar, A. Dreyfert |
A high-level dynamic-error model of a pipelined analog-to-digital converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 5625-5628, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | Brock J. LaMeres, Sunil P. Khatri |
Performance model for inter-chip communication considering inductive cross-talk and cost. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4130-4133, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | Shouli Yan, Jingyu Hu, Tongyu Song |
Novel and robust constant-gm technique for rail-to-rail CMOS amplifier input stages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 2563-2566, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | Kyung Ki Kim, Yong-Bin Kim, Fabrizio Lombardi |
Data Dependent Jitter (DDJ) Characterization Methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 3-5 October 2005, Monterey, CA, USA, pp. 294-304, 2005, IEEE Computer Society, 0-7695-2464-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | Puneet Gupta 0001, Andrew B. Kahng, Puneet Sharma |
A Practical Transistor-Level Dual Threshold Voltage Assignment Methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 421-426, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | Chung-Kuan Tsai, Malgorzata Marek-Sadowska |
An Interconnect Insensitive Linear Time-Varying Driver Model for Static Timing Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 654-661, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Ram Dantu, Prakash Kolan |
Risk Management Using Behavior Based Bayesian Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISI ![In: Intelligence and Security Informatics, IEEE International Conference on Intelligence and Security Informatics, ISI 2005, Atlanta, GA, USA, May 19-20, 2005, Proceedings, pp. 115-126, 2005, Springer, 3-540-25999-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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12 | Hiran Tennakoon, Carl Sechen |
Efficient and accurate gate sizing with piecewise convex delay models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 807-812, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
piecewise convex, optimization, Lagrangian relaxation, gate sizing, delay modeling |
12 | Lakshmi Kalpana Vakati, Janet Meiling Wang |
A new multi-ramp driver model with RLC interconnect load. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2004 International Symposium on Physical Design, ISPD 2004, Phoenix, Arizona, USA, April 18-21, 2004, pp. 170-175, 2004, ACM, 1-58113-817-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
inductance criteria, multi-ramp driver model, transmission line effects, interconnect modeling, effective capacitance |
12 | Nima Maghari, Mohammad Yavari, Omid Shoaei |
An analytical model for the slewing behavior of CMOS two-stage operational transconductance amplifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 553-556, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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12 | Walter Aloisi, Stello Matteo Billé, Gaetano Palumbo |
Low-voltage linear voltage regulator suitable for memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 389-392, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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12 | Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli |
Design issues and performance limitations of a clock jitter insensitive multibit DAC architecture for high-performance low-power CT Sigma Delta modulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 1076-1079, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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12 | Amr A. Tammam, Khaled Hayatleh, Bryan L. Hart, F. John Lidgey |
High performance current-feedback op-amps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 825-828, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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12 | Mohammad Taherzadeh-Sani, Reza Lotfi, Omid Shoaei |
A pseudo-class-AB telescopic-cascode operational amplifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 737-740, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Ram Dantu, Kall Loper, Prakash Kolan |
Risk Management using Behavior based Attack Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITCC (1) ![In: International Conference on Information Technology: Coding and Computing (ITCC'04), Volume 1, April 5-7, 2004, Las Vegas, Nevada, USA, pp. 445-449, 2004, IEEE Computer Society, 0-7695-2108-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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12 | Richard Goldman, Kurt Keutzer, Clive Bittlestone, Ahsan Bootehsaz, Shekhar Y. Borkar, E. Chen, Louis Scheffer, Chandramouli Visweswariah |
Is statistical timing statistically significant? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 498, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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12 | Yatin Chawathe |
Scattercast: an adaptable broadcast distribution framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multim. Syst. ![In: Multim. Syst. 9(1), pp. 104-118, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Scattercast, Overlay networks, Content distribution, Application-layer multicast |
12 | Wen-Tsong Shiue, Weetit Wanalertlak |
Advanced Cell Modeling Techniques Based on Polynomial Expressions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 13th International Workshop, PATMOS 2003, Torino, Italy, September 10-12, 2003, Proceedings, pp. 550-558, 2003, Springer, 3-540-20074-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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12 | Timothy M. Chan |
On Levels in Arrangements of Curves, II: A Simple Inequality and Its Consequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FOCS ![In: 44th Symposium on Foundations of Computer Science (FOCS 2003), 11-14 October 2003, Cambridge, MA, USA, Proceedings, pp. 544-550, 2003, IEEE Computer Society, 0-7695-2040-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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12 | Salvador Pinillos Gimenez, Marcelo Antonio Pavanello, João Antonio Martino, Stephane Adriaensen, Denis Flandre |
Design of Operational Transconductance Amplifiers with Improved Gain by Using Graded-Channel SOI nMOSFETs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2003, Sao Paulo, Brazil, September 8-11, 2003, pp. 26-, 2003, IEEE Computer Society, 0-7695-2009-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Masanori Hashimoto, Yuji Yamada, Hidetoshi Onodera |
Capturing crosstalk-induced waveform for accurate static timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2003 International Symposium on Physical Design, ISPD 2003, Monterey, CA, USA, April 6-9, 2003, pp. 18-23, 2003, ACM, 1-58113-650-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
capacitive coupling noise, delay calculation, slope propagation, static timing analysis, crosstalk noise |
12 | Shidhartha Das, Kanak Agarwal, David T. Blaauw, Dennis Sylvester |
Optimal Inductance for On-chip RLC Interconnections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 21st International Conference on Computer Design (ICCD 2003),VLSI in Computers and Processors, 13-15 October 2003, San Jose, CA, USA, Proceedings, pp. 264-, 2003, IEEE Computer Society, 0-7695-2025-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Gerry Quilligan, D. P. Burton |
A 0.35µm CMOS voltage derivative sensor with sign and inflection outputs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 593-596, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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12 | Haibin Huang, Ezz I. El-Masry |
A fast settling CMOS operational amplifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 265-268, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Jozef Adut, José Silva-Martínez |
Cascode transconductance amplifiers for HF switched-capacitor applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 365-368, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Dirk Weiler, Ton J. J. van den Boom, Bedrich J. Hosticka |
Resolution prediction for bandpass-Sigma-Delta-modulators using SIMULINK behavior simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 309-312, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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12 | Kelvin Ka Sing Leung, Henry Shu-Hung Chung, Ron Shu-Yuen Hui |
Use of state trajectory prediction in hysteresis control for achieving fast transient response of the buck converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 439-442, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Thilak Senanayake, Tamotsu Ninomiya |
High-current clamp for fast-response load transitions of DC-DC converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 653-656, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Gianluca Giustolisi, Gaetano Palumbo |
A novel 1-V class-AB transconductor for improving speed performance in SC applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 153-156, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | M. Pauli, M. C. Ertem, E. Heidhausen |
Quick Response Airborne Deployment of Viper Muzzle Flash Detection and Location System During DC Sniper Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AIPR ![In: 32nd Applied Image Pattern Recognition Workshop (AIPR 2003), Image Data Fusion, 15-17 October 2003, Washington, DC, USA, Proceedings, pp. 221-225, 2003, IEEE Computer Society, 0-7695-2029-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | José Luis Rosselló, Jaume Segura 0001 |
Charge-based analytical model for the evaluation of powerconsumption in submicron CMOS buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(4), pp. 433-448, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Guy G. Lemieux, David M. Lewis |
Circuit design of routing switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2002, Monterey, CA, USA, February 24-26, 2002, pp. 19-28, 2002, ACM, 1-58113-452-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Hiran Tennakoon, Carl Sechen |
Gate sizing using Lagrangian relaxation combined with a fast gradient-based pre-processing step. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, ICCAD 2002, San Jose, California, USA, November 10-14, 2002, pp. 395-402, 2002, ACM / IEEE Computer Society, 0-7803-7607-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Christopher R. Wagner, Susan J. Lederman, Robert D. Howe |
A Tactile Shape Display Using RC Servomotors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Symposium on Haptic Interfaces for Virtual Environment and Teleoperator Systems ![In: 10th Symposium on Haptic Interfaces for Virtual Environment and Teleoperator Systems, HAPTICS 2002, Orlando, Florida, USA, March 24-25, 2002, Proceedings, pp. 354-356, 2002, IEEE Computer Society, 0-7695-1489-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
tactile shape display, spatially distributed forces, taction, teletaction, mechanical pin, fingertip, servo, rc servo, servomotor, tactile array, haptics, tactile display |
12 | Li Ding 0002, Pinaki Mazumder, David T. Blaauw |
Crosstalk noise estimation using effective coupling capacitance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 645-648, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
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12 | Robert M. Fox, Inchang Seo, Hyeopgoo Yeo, Okjune Jeon |
Leveraged current mirror op amp. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 41-44, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Xiaoliang Bai, Chandramouli Visweswariah, Philip N. Strenski |
Uncertainty-aware circuit optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 58-63, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
small uncertainty, optimization, process variation, nonlinear, performance optimization, transistor sizing, circuit tuning |
12 | Yehea I. Ismail, Eby G. Friedman, José Luis Neves |
Exploiting the on-chip inductance in high-speed clock distribution networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 9(6), pp. 963-973, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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12 | José Vicente Calvano, Antonio Carneiro de Mesquita Filho, Vladimir Castro Alves, Marcelo Lubaszewski |
Fault Models and Test Generation for OpAmp Circuits - The FFM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 17(2), pp. 121-138, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
test generation, fault model, analog test, operational amplifiers |
12 | Giuseppe Palmisano, Salvatore Pennisi |
Low-voltage continuous-time CMOS current amplifier with dynamic biasing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 312-315, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Amir Hossein Nejad-Malayeri, Tajinder Manku |
A 270 MHz, 1.8 V fully differential CMOS operational amplifier for switched capacitor channel select filters in wide-band wireless applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 659-662, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Alex Doboli, Ranga Vemuri |
Hierarchical performance optimization for synthesis of linear analog systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 431-434, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Rohit Khare |
Seventh Heaven - How Functions: Transcending the Web as GUI, Part I. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Internet Comput. ![In: IEEE Internet Comput. 4(1), pp. 88-90, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Kamlesh Rath |
Broadband Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Multim. ![In: IEEE Multim. 7(4), pp. 10-13, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|