Search results for "unrolling"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
19	Narasinga Rao Miniskar, Pankaj Shailendra Gode, Soma Kohli, Donghoon Yoo	Function inlining and loop unrolling for loop acceleration in reconfigurable processors.	CASES	2012	DBLP DOI BibTeX RDF
19	Mounira Bachir, Albert Cohen 0001, Sid Ahmed Ali Touati	On the effectiveness of register moves to minimise post-pass unrolling in software pipelined loops.	HPCS	2012	DBLP DOI BibTeX RDF
19	Aleksandra Boniewicz, Krzysztof Stencel, Piotr Wisniewski 0001	Unrolling SQL: 1999 Recursive Queries.	FGIT-EL/DTA/UNESST	2012	DBLP DOI BibTeX RDF
19	Weijia Che, Karam S. Chatha	Unrolling and retiming of stream applications onto embedded multicore processors.	DAC	2012	DBLP DOI BibTeX RDF
19	Qijun Zhao, Anil K. Jain 0001, Gil Abramovich	3D to 2D fingerprints: Unrolling and distortion correction.	IJCB	2011	DBLP DOI BibTeX RDF
19	Kelly Ward	Unrolling Rapunzel's hair.	SIGGRAPH Dailies	2011	DBLP DOI BibTeX RDF
19	Mounira Bachir, Frederic Brault, Sid Ahmed Ali Touati, Albert Cohen 0001	Loop unrolling minimisation in the presence of multiple register types: A viable alternative to modulo variable expansion.	HPCS	2011	DBLP DOI BibTeX RDF
19	Vladimír Guzma, Teemu Pitkänen, Jarmo Takala	Effects of loop unrolling and use of instruction buffer on processor energy consumption.	SoC	2011	DBLP DOI BibTeX RDF
19	Aaron R. Bradley	SAT-Based Model Checking without Unrolling.	VMCAI	2011	DBLP DOI BibTeX RDF
19	Oksana Samko, Yu-Kun Lai, A. David Marshall, Paul L. Rosin	Segmentation of Parchment Scrolls for Virtual Unrolling.	BMVC	2011	DBLP DOI BibTeX RDF
19	Yuet Ming Lam, José Gabriel F. Coutinho, Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk	Multiloop Parallelisation Using Unrolling and Fission.	Int. J. Reconfigurable Comput.	2010	DBLP DOI BibTeX RDF
19	Yosi Ben-Asher, Jawad Haj-Yihia	Computing the correct Increment of Induction Pointers with application to loop unrolling.	J. Syst. Archit.	2010	DBLP DOI BibTeX RDF
19	Giridhar Sreenivasa Murthy, Mahesh Ravishankar, Muthu Manikandan Baskaran, Ponnuswamy Sadayappan	Optimal loop unrolling for GPGPU programs.	IPDPS	2010	DBLP DOI BibTeX RDF
19	Shivam Bhasin, Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger	Unrolling Cryptographic Circuits: A Simple Countermeasure Against Side-Channel Attacks.	CT-RSA	2010	DBLP DOI BibTeX RDF
19	Ozana Silvia Dragomir, Todor P. Stefanov, Koen Bertels	Optimal Loop Unrolling and Shifting for Reconfigurable Architectures.	ACM Trans. Reconfigurable Technol. Syst.	2009	DBLP DOI BibTeX RDF
19	Paul Lokuciejewski, Peter Marwedel	Combining Worst-Case Timing Models, Loop Unrolling, and Static Loop Analysis for WCET Minimization.	ECRTS	2009	DBLP DOI BibTeX RDF	WCET minimization, WCET-driven optimizations, High-Level Optimizations, compiler, WCET
19	Shaobo Liu, Meikang Qiu	A Discrete Dynamic Voltage and Frequency Scaling Algorithm Based on Task Graph Unrolling for Multiprocessor System.	ScalCom-EmbeddedCom	2009	DBLP DOI BibTeX RDF
19	Roger Ferrer, Alejandro Duran, Xavier Martorell, Eduard Ayguadé	Unrolling Loops Containing Task Parallelism.	LCPC	2009	DBLP DOI BibTeX RDF
19	Mounira Bachir, David Gregg, Sid Ahmed Ali Touati	Using the Meeting Graph Framework to Minimise Kernel Loop Unrolling for Scheduled Loops.	LCPC	2009	DBLP DOI BibTeX RDF
19	Yuet Ming Lam, José Gabriel F. Coutinho, Wayne Luk, Philip Heng Wai Leong	Unrolling-based loop mapping and scheduling.	FPT	2008	DBLP DOI BibTeX RDF
19	Nicholas Nethercote, Doug Burger, Kathryn S. McKinley	Convergent Compilation Applied to Loop Unrolling.	Trans. High Perform. Embed. Archit. Compil.	2007	DBLP DOI BibTeX RDF
19	Robert P. Goldman, David J. Musliner, Mark S. Boddy, Edmund H. Durfee, Jianhui Wu 0006	"Unrolling" Complex Task Models into MDPs.	AAAI Spring Symposium: Game Theoretic and Decision Theoretic Agents	2007	DBLP BibTeX RDF
19	Karine Heydemann, François Bodin, Peter M. W. Knijnenburg, Laurent Morin	UFS: a global trade-off strategy for loop unrolling for VLIW architectures.	Concurr. Comput. Pract. Exp.	2006	DBLP DOI BibTeX RDF
19	Haralambos Michail, Athanasios Kakarountas, George N. Selimis, Costas E. Goutis	Optimizing SHA-1 Hash Function for High Throughput with a Partial Unrolling Study.	PATMOS	2005	DBLP DOI BibTeX RDF
19	Peter M. W. Knijnenburg, Toru Kisuki, Kyle A. Gallivan, Michael F. P. O'Boyle	The effect of cache models on iterative compilation for combined tiling and unrolling.	Concurr. Comput. Pract. Exp.	2004	DBLP DOI BibTeX RDF
19	Yunyang Dai, Qing Li 0001, Qi Zhang 0024, C.-C. Jay Kuo	SIMD - efficient loop unrolling design for embedded multimedia applications.	ICME	2004	DBLP BibTeX RDF
19	Ulrik Brandes, Steven R. Corman	Visual unrolling of network evolution and the analysis of dynamic discourse?	Inf. Vis.	2003	DBLP DOI BibTeX RDF
19	Litong Song, Yuhua Zhang, Krishna M. Kavi	Loop Transformation Techniques To Aid In Loop Unrolling and Multithreading.	PDCS	2003	DBLP BibTeX RDF
19	Vivek Sarkar	Optimized Unrolling of Nested Loops.	Int. J. Parallel Program.	2001	DBLP DOI BibTeX RDF
19	Fermín Sánchez, Jordi Cortadella, Rosa M. Badia	Optimal exploration of the unrolling degree for software pipelining.	J. Syst. Archit.	1999	DBLP DOI BibTeX RDF
19	Ying Zhao, Sharad Malik	Exact Memory Size Estimation for Array Computations without Loop Unrolling.	DAC	1999	DBLP DOI BibTeX RDF
19	Sin Yeung Lee, Tok Wang Ling	Unrolling Cycles to Decide Trigger Termination.	VLDB	1999	DBLP BibTeX RDF
19	Nobuhiro Kondo, Akira Koseki, Hideaki Komatsu, Yoshiaki Fukazawa	A method for applying loop unrolling and software pipelining to instruction-level parallel architectures.	Syst. Comput. Jpn.	1998	DBLP DOI BibTeX RDF
19	Rajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal	Memory bank disambiguation using modulo unrolling for Raw machines.	HiPC	1998	DBLP DOI BibTeX RDF
19	Hui Guo 0001, Sri Parameswaran	Unrolling Loops With Indeterminate Loop Counts in System Level Pipelines.	ASP-DAC	1998	DBLP DOI BibTeX RDF
19	Hesham El-Rewini, Hesham H. Ali	On Optimal Loop Unrolling in Two-processor Scheduling.	Parallel Algorithms Appl.	1995	DBLP DOI BibTeX RDF
19	Jack W. Davidson, Sanjay Jinturkar	Improving instruction-level parallelism by loop unrolling and dynamic memory disambiguation.	MICRO	1995	DBLP DOI BibTeX RDF
19	Zhong Shao, John H. Reppy, Andrew W. Appel	Unrolling Lists.	LISP and Functional Programming	1994	DBLP DOI BibTeX RDF
19	Thorn Grace	Fast Span conversion: Unrolling Short Loops.	Graphics Gems III	1992	DBLP DOI BibTeX RDF
19	Henri-Pierre Charles	Loop unrolling for processors with instruction cache.	Algorithms and Parallel VLSI Architectures	1991	DBLP BibTeX RDF
19	Karel Culík II, Jan K. Pachl	Folding and Unrolling Systolic Arrays (Preliminary Version).	PODC	1982	DBLP DOI BibTeX RDF
19	Jack J. Dongarra, A. R. Hinds	Unrolling Loops in FORTRAN.	Softw. Pract. Exp.	1979	DBLP DOI BibTeX RDF
12	Yi Yang 0018, Ping Xiang, Jingfei Kong, Huiyang Zhou	A GPGPU compiler for memory optimization and parallelism management.	PLDI	2010	DBLP DOI BibTeX RDF	compiler, gpgpu
12	Paul M. Carpenter, Alex Ramírez, Eduard Ayguadé	The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors.	SAMOS	2009	DBLP DOI BibTeX RDF
12	Malay K. Ganai, Sudipta Kundu	Reduction of Verification Conditions for Concurrent System Using Mutually Atomic Transactions.	SPIN	2009	DBLP DOI BibTeX RDF
12	Sheng Ma, Libo Huang, Zhiying Wang 0003, Kui Dai	Implementation of OpenVG Path and Paint Algorithms on Synchronous Data Triggered Architecture with Optimization.	NAS	2009	DBLP DOI BibTeX RDF
12	Liu Peng, Richard Seymour, Ken-ichi Nomura, Rajiv K. Kalia, Aiichiro Nakano, Priya Vashishta, Alexander Loddoch, Michael Netzband, William R. Volz, Chap C. Wong	High-order stencil computations on multicore clusters.	IPDPS	2009	DBLP DOI BibTeX RDF
12	Sudipta Kundu, Zachary Tatlock, Sorin Lerner	Proving optimizations correct using parameterized program equivalence.	PLDI	2009	DBLP DOI BibTeX RDF	compiler optimization, correctness, translation validation
12	Boyana Norris, Albert Hartono, Elizabeth R. Jessup, Jeremy G. Siek	Generating Empirically Optimized Composed Matrix Kernels from MATLAB Prototypes.	ICCS (1)	2009	DBLP DOI BibTeX RDF	empirical performance tuning, code generation, MATLAB
12	Reiley Jeyapaul, Sandeep Marathe, Aviral Shrivastava	Code Transformations for TLB Power Reduction.	VLSI Design	2009	DBLP DOI BibTeX RDF
12	Mohammed Fellahi, Albert Cohen 0001	Software Pipelining in Nested Loops with Prolog-Epilog Merging.	HiPEAC	2009	DBLP DOI BibTeX RDF
12	Natasa Miskov-Zivanov, Diana Marculescu	Modeling and Optimization for Soft-Error Reliability of Sequential Circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
12	Paul Biggar, Nicholas Nash, Kevin Williams 0001, David Gregg	An experimental study of sorting and branch prediction.	ACM J. Exp. Algorithmics	2008	DBLP DOI BibTeX RDF	caching, Sorting, branch prediction, pipeline architectures
12	Vasco Brattka	Borel complexity and computability of the Hahn-Banach Theorem.	Arch. Math. Log.	2008	DBLP DOI BibTeX RDF	Mathematics Subject Classification (2000) 03F60, 46S30, 03E15
12	Dilip P. Vasudevan, Aristides Efthymiou	A Partial Scan Based Test Generation for Asynchronous Circuits.	DDECS	2008	DBLP DOI BibTeX RDF
12	Li Wang 0027, Xuejun Yang, Jingling Xue, Yu Deng 0001, Xiaobo Yan, Tao Tang 0001, Quan Hoang Nguyen 0001	Optimizing scientific application loops on stream processors.	LCTES	2008	DBLP DOI BibTeX RDF	streaming, prefetching, graph coloring, data reuse, loop optimization, stream processor, software-managed cache
12	Jing Du 0002, Fujiang Ao, Xuejun Yang	MV-FT: Efficient Implementation for Matrix-Vector Multiplication on FT64 Stream Processor.	ICDS	2008	DBLP DOI BibTeX RDF
12	Pingjing Lu, Yonggang Che, Zhenghua Wang	An Effective Iterative Compilation Search Algorithm for High Performance Computing Applications.	HPCC	2008	DBLP DOI BibTeX RDF
12	Suhyun Kim, Soo-Mook Moon	Rotating register allocation with multiple rotating branches.	ICS	2008	DBLP DOI BibTeX RDF	rotating register, register allocation, software pipelining
12	Muthu Manikandan Baskaran, Uday Bondhugula, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, P. Sadayappan	A compiler framework for optimization of affine loop nests for gpgpus.	ICS	2008	DBLP DOI BibTeX RDF	empirical tuning, memory access optimization, GPU, polyhedral model
12	Mila Dalla Preda, Roberto Giacobazzi, Enrico Visentini	Hiding Software Watermarks in Loop Structures.	SAS	2008	DBLP DOI BibTeX RDF
12	Nicolas Caniart, Emmanuel Fleury, Jérôme Leroux, Marc Zeitoun	Accelerating Interpolation-Based Model-Checking.	TACAS	2008	DBLP DOI BibTeX RDF
12	Frederico Pratas, Georgi Gaydadjiev, Mladen Berekovic, Leonel Sousa, Stefanos Kaxiras	Low power microarchitecture with instruction reuse.	Conf. Computing Frontiers	2008	DBLP DOI BibTeX RDF	loop reusing technique, reorder buffer optimization, superscalar processor, power reduction
12	Malay K. Ganai, Aarti Gupta	Tunneling and slicing: towards scalable BMC.	DAC	2008	DBLP DOI BibTeX RDF	CFG, partitioning, slice, SMT, tunnel, EFSM, CSR, BMC
12	Scott Pakin	The Design and Implementation of a Domain-Specific Language for Network Performance Testing.	IEEE Trans. Parallel Distributed Syst.	2007	DBLP DOI BibTeX RDF	Interprocessor communications, Measurement techniques, Specialized application languages
12	Johann Großschädl, Stefan Tillich, Christian Rechberger, Michael Hofmann 0007, Marcel Medwed	Energy evaluation of software implementations of block ciphers under memory constraints.	DATE	2007	DBLP DOI BibTeX RDF	energy optimization, code size reduction, symmetric cipher, lightweight cryptography, memory footprint
12	Desta Tadesse, D. Sheffield, E. Lenge, R. Iris Bahar, Joel Grodstein	Accurate timing analysis using SAT and pattern-dependent delay models.	DATE	2007	DBLP DOI BibTeX RDF
12	Johann Großschädl, Stefan Tillich, Alexander Szekely	Performance Evaluation of Instruction Set Extensions for Long Integer Modular Arithmetic on a SPARC V8 Processor.	DSD	2007	DBLP DOI BibTeX RDF
12	Malay K. Ganai, Aarti Gupta	Efficient BMC for Multi-Clock Systems with Clocked Specifications.	ASP-DAC	2007	DBLP DOI BibTeX RDF	OpenCores multiclock system benchmarks, clocked specifications, multiphased clocks, level-sensitive latches, SAT-based bounded model checking, synchronous multiclock systems, clocked LTL properties, clock modeling schemes, clock constraints, loop-checks, gated clocks
12	Pan Yu, Tulika Mitra	Disjoint Pattern Enumeration for Custom Instructions Identification.	FPL	2007	DBLP DOI BibTeX RDF
12	Qing Yi, Keith Seymour, Haihang You, Richard W. Vuduc, Daniel J. Quinlan	POET: Parameterized Optimizations for Empirical Tuning.	IPDPS	2007	DBLP DOI BibTeX RDF
12	Yaobin Wang, Hong An, Bo Liang, Li Wang, Ming Cong, Yongqing Ren	Balancing Thread Partition for Efficiently Exploiting Speculative Thread-Level Parallelism.	APPT	2007	DBLP DOI BibTeX RDF
12	Joonseok Park, Pedro C. Diniz	Partial Data Reuse for Windowing Computations: Performance Modeling for FPGA Implementations.	ARC	2007	DBLP DOI BibTeX RDF	scalar replacement, loop splitting, loop interchange, Field Programmable Gate Arrays (FPGA), Reconfigurable Computing, data reuse
12	Dirk Beyer 0001, Thomas A. Henzinger, Rupak Majumdar, Andrey Rybalchenko	Path invariants.	PLDI	2007	DBLP DOI BibTeX RDF	invariant synthesis, formal verification, software model checking, predicate abstraction, abstraction refinement
12	Martin Holzer 0002, Bastian Knerr, Markus Rupp	Design Space Exploration with Evolutionary Multi-Objective Optimisation.	SIES	2007	DBLP DOI BibTeX RDF
12	Viral K. Parikh, Poras T. Balsara, Oren E. Eliezer, Jaimin Mehta	A Low Area and Low Power Digital Band-Pass Sigma-Delta Modulator for Wireless Transmitters.	ISCAS	2007	DBLP DOI BibTeX RDF
12	Miao Wang, Guiming Wu, Zhiying Wang 0003	Instruction Selection for Subword Level Parallelism Optimizations for Application Specific Instruction Processors.	ISPA	2007	DBLP DOI BibTeX RDF
12	Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, Uma Srinivasan 0003, Craig B. Zilles	Hardware atomicity for reliable software speculation.	ISCA	2007	DBLP DOI BibTeX RDF	Java, optimization, checkpoint, atomicity, speculation, isolation
12	Piotr Dollár, Vincent C. Rabaud, Serge J. Belongie	Non-isometric manifold learning: analysis and an algorithm.	ICML	2007	DBLP DOI BibTeX RDF
12	Sadaf R. Alam, Jeremy S. Meredith, Jeffrey S. Vetter	Balancing productivity and performance on the cell broadband engine.	CLUSTER	2007	DBLP DOI BibTeX RDF
12	Alireza Hodjat, Ingrid Verbauwhede	Area-Throughput Trade-Offs for Fully Pipelined 30 to 70 Gbits/s AES Processors.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	crypto-processor, security, VLSI, cryptography, Advanced Encryption Standard (AES), ASIC, hardware architectures
12	Dhananjay Kulkarni, Walid A. Najjar, Robert Rinker, Fadi J. Kurdahi	Compile-time area estimation for LUT-based FPGAs.	ACM Trans. Design Autom. Electr. Syst.	2006	DBLP DOI BibTeX RDF	Reconfigurable computing, compiler optimization, resource estimation
12	Sung-Chul Han, Franz Franchetti, Markus Püschel	Program generation for the all-pairs shortest path problem.	PACT	2006	DBLP DOI BibTeX RDF	Floyd-Warshall algorithm, SIMD vectorization, empirical search, tiling, blocking
12	Abhishek Das, William J. Dally, Peter R. Mattson	Compiling for stream processing.	PACT	2006	DBLP DOI BibTeX RDF	SRF allocation, Stream Operation Precedence (SOP) graph, StreamC, coarse-grained operations, producer-consumer locality, scoreboard slot assignment, stream scheduling, strip-mining, software-pipelining, task level parallelism, stream programming model
12	Robert P. McEvoy, Francis M. Crowe, Colin C. Murphy, William P. Marnane	Optimisation of the SHA-2 Family of Hash Functions on FPGAs.	ISVLSI	2006	DBLP DOI BibTeX RDF
12	Anuja Jayraj Thakkar, Abdel Ejnioui	Pipelining of double precision floating point division and square root operations.	ACM Southeast Regional Conference	2006	DBLP DOI BibTeX RDF	FPGA, pipelining, floating point, division, square root
12	Simon D. Hammond, David Lacey	Loop Transformations in the Ahead-of-Time Optimization of Java Bytecode.	CC	2006	DBLP DOI BibTeX RDF
12	George Ferizis, Hossam A. ElGindy	Mapping Recursive Functions to Reconfigurable Hardware.	FPL	2006	DBLP DOI BibTeX RDF
12	Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary Jane Irwin	On improving performance and energy profiles of sparse scientific applications.	IPDPS	2006	DBLP DOI BibTeX RDF
12	Jae-Jin Lee, Gi-Yong Song	High-Level Synthesis Using SPARK and Systolic Array.	ARC	2006	DBLP DOI BibTeX RDF
12	Mun-Kyu Lee, Jung Ki Min, Seok Hun Kang, Sang-Hwa Chung, Howon Kim 0001, Dong Kyue Kim	Efficient Implementation of Pseudorandom Functions for Electronic Seal Protection Protocols.	WISA	2006	DBLP DOI BibTeX RDF	electronic seal, RFID, AES, message authentication code, pseudorandom function
12	Marshall R. Mayberry, Risto Miikkulainen	Broad-Coverage Parsing with Neural Networks.	Neural Process. Lett.	2005	DBLP DOI BibTeX RDF	recursive autoassociative memory, simple recurrent network, neural networks, natural language processing, cognitive modeling, parsing
12	Xiaohua Hu 0001	A Data Mining Approach for Retailing Bank Customer Attrition Analysis.	Appl. Intell.	2005	DBLP DOI BibTeX RDF	attrition analysis, data mining, classification method
12	Gregorio Bernabé, José M. García 0001, José González 0002	Reducing 3D Fast Wavelet Transform Execution Time Using Blocking and the Streaming SIMD Extensions.	J. VLSI Signal Process.	2005	DBLP DOI BibTeX RDF	Streaming SIMD extensions, reuse, vectorization, video compression, blocking, 3D wavelet transform
12	Andrea Ferrara, Guoqiang Pan, Moshe Y. Vardi	Treewidth in Verification: Local vs. Global.	LPAR	2005	DBLP DOI BibTeX RDF
12	Jacob Katz, Ziyad Hanna, Nachum Dershowitz	Space-Efficient Bounded Model Checking.	DATE	2005	DBLP DOI BibTeX RDF
12	Michael D. Bond, Kathryn S. McKinley	Practical Path Profiling for Dynamic Optimizers.	CGO	2005	DBLP DOI BibTeX RDF
12	Franz Franchetti, Yevgen Voronenko, Markus Püschel	Formal loop merging for signal transforms.	PLDI	2005	DBLP DOI BibTeX RDF	linear signal transform, domain-specific language, DFT, discrete Fourier transform, loop optimization, automatic performance tuning
12	Kamen Yotov, Keshav Pingali, Paul Stodghill	Think globally, search locally.	ICS	2005	DBLP DOI BibTeX RDF
12	Canqun Yang, Xuejun Yang, Jingling Xue	Improving the Performance of GCC by Exploiting IA-64 Architectural Features.	Asia-Pacific Computer Systems Architecture Conference	2005	DBLP DOI BibTeX RDF