Search results for "BDDs"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
19	Malay K. Ganai, Adnan Aziz	Rarity based guided state space search.	ACM Great Lakes Symposium on VLSI	2001	DBLP DOI BibTeX RDF	simulation, formal methods, coverage, BDDs, functional verification
19	Barbara J. Czerny, Mats Per Erik Heimdahl	Identifying Domain Axioms Using Binary Decision Diagrams.	HASE	1999	DBLP DOI BibTeX RDF	Static Requirements Analysis, Domain Axioms, Spurious Errors, Completeness Analysis, False Positives, Consistency Analysis, Binary Decision Diagrams (BDDs)
19	Dirk W. Hoffmann, Thomas Kropf	Automatic Error Correction of Tri-State Circuits.	ICCD	1999	DBLP DOI BibTeX RDF	Automatic error correction, tri-states, fault diagnosis, BDDs, equivalence checking
19	Zeljko Zilic, Zvonko G. Vranesic	Using Decision Diagrams to Design ULMs for FPGAs.	IEEE Trans. Computers	1998	DBLP DOI BibTeX RDF	ULMs, classification of logic functions, synthesis of logic functions, FPGAs, BDDs
19	Edmund M. Clarke, Orna Grumberg, David E. Long	Model Checking and Abstraction.	ACM Trans. Program. Lang. Syst.	1994	DBLP DOI BibTeX RDF	model checking, temporal logic, abstract interpretation, binary decision diagrams (BDDs)
19	Dennis Dams, Rob Gerth, Gert Döhmen, Ronald Herrmann, Peter Kelb, Hergen Pargmann	Model Checking Using Adaptive State and Data Abstraction.	CAV	1994	DBLP DOI BibTeX RDF	ACTL, state partitioning, model checking, abstract interpretation, binary decision diagrams (BDDs)
10	Florian Pigorsch, Christoph Scholl 0001	An AIG-Based QBF-solver using SAT for preprocessing.	DAC	2010	DBLP DOI BibTeX RDF	Boolean satisfiability, quantified boolean formulas
10	Gianfranco Ciardo, Andrew S. Miner, Min Wan	Advanced features in SMART: the stochastic model checking analyzer for reliability and timing.	SIGMETRICS Perform. Evaluation Rev.	2009	DBLP DOI BibTeX RDF
10	Alessandro Ferrante, Margherita Napoli, Mimmo Parente	Graded-CTL: Satisfiability and Symbolic Model Checking.	ICFEM	2009	DBLP DOI BibTeX RDF
10	Martin Dietzfelbinger, Stefan Edelkamp	Perfect Hashing for State Spaces in BDD Representation.	KI	2009	DBLP DOI BibTeX RDF
10	Peter Kissmann, Stefan Edelkamp	Solving Fully-Observable Non-deterministic Planning Problems via Translation into a General Game.	KI	2009	DBLP DOI BibTeX RDF
10	Ben Hardekopf, Calvin Lin	Semi-sparse flow-sensitive pointer analysis.	POPL	2009	DBLP DOI BibTeX RDF	pointer analysis, alias analysis
10	Ehab Al-Shaer, Wilfredo Marrero, Adel El-Atawy, Khalid Elbadawi	Network Configuration in A Box: Towards End-to-End Verification of Network Reachability and Security.	ICNP	2009	DBLP DOI BibTeX RDF
10	Sagar Chaki, Arie Gurfinkel, Ofer Strichman	Decision diagrams for linear arithmetic.	FMCAD	2009	DBLP DOI BibTeX RDF
10	Robert Wille, Rolf Drechsler	BDD-based synthesis of reversible logic for large functions.	DAC	2009	DBLP DOI BibTeX RDF	synthesis, decision diagrams, reversible logic, quantum logic
10	Gianpiero Cabodi, Marco Murciano, Sergio Nocco, Stefano Quer	Boosting interpolation with dynamic localized abstraction and redundancy removal.	ACM Trans. Design Autom. Electr. Syst.	2008	DBLP DOI BibTeX RDF	Interpolant, abstraction, redundancy removal
10	John P. Gallagher, Mads Rosendahl	Approximating Term Rewriting Systems: A Horn Clause Specification and Its Implementation.	LPAR	2008	DBLP DOI BibTeX RDF
10	Sam Owre, Natarajan Shankar	A Brief Overview of PVS.	TPHOLs	2008	DBLP DOI BibTeX RDF
10	Yassine Mokhtari, Sa'ed Abed, Otmane Aït Mohamed, Sofiène Tahar, Xiaoyu Song	A New Approach for the Construction of Multiway Decision Graphs.	ICTAC	2008	DBLP DOI BibTeX RDF
10	Glenn Bruns, Michael Huth 0001	Access-Control Policies via Belnap Logic: Effective and Efficient Composition and Analysis.	CSF	2008	DBLP DOI BibTeX RDF	Belnap logic, access control, policy languages, policy analysis
10	Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman	Parallel fault backtracing for calculation of fault coverage.	ASP-DAC	2008	DBLP DOI BibTeX RDF
10	Dejvuth Suwimonteerabuth, Javier Esparza, Stefan Schwoon	Symbolic Context-Bounded Analysis of Multithreaded Java Programs.	SPIN	2008	DBLP DOI BibTeX RDF
10	José Vander Meulen, Charles Pecheur	Efficient Symbolic Model Checking for Process Algebras.	FMICS	2008	DBLP DOI BibTeX RDF
10	Paolo Bernardi, Kyriakos Christou, Michelangelo Grosso, Maria K. Michael, Ernesto Sánchez 0001, Matteo Sonza Reorda	Exploiting MOEA to Automatically Geneate Test Programs for Path-Delay Faults in Microprocessors.	EvoWorkshops	2008	DBLP DOI BibTeX RDF	microprocessor, BDD, MOEA, path-delay testing
10	Chao Wang, Malay K. Ganai, Shuvendu K. Lahiri, Daniel Kroening	Embedded software verification: challenges and solutions.	ICCAD	2008	DBLP DOI BibTeX RDF
10	Craig M. Files, Mark H. Nodine	MDD with Added Null-Value and All-Value Edges.	ISMVL	2008	DBLP DOI BibTeX RDF	Multi-valued, Synthesis, MDD, Logic, Domino Logic
10	Thomas Wahl, Nicolas Blanc, E. Allen Emerson	SVISS: Symbolic Verification of Symmetric Systems.	TACAS	2008	DBLP DOI BibTeX RDF
10	Azam Beg, P. W. Chandana Prasad, Walid Ibrahim, Emad Abu Shama	Utilizing synthesis to verify Boolean function models.	ISCAS	2008	DBLP DOI BibTeX RDF
10	Václav Dvorák	Embedded Firmware Development with Multi-way Branching.	ICONS	2008	DBLP DOI BibTeX RDF	Embedded firmware, iterative disjunctive decomposition, multi-valued functions, decision diagrams, space complexity
10	Kyriakos Christou, Maria K. Michael, Paolo Bernardi, Michelangelo Grosso, Ernesto Sánchez 0001, Matteo Sonza Reorda	A Novel SBST Generation Technique for Path-Delay Faults in Microprocessors Exploiting Gate- and RT-Level Descriptions.	VTS	2008	DBLP DOI BibTeX RDF	SBST, path-delay faults, microprocessor test
10	Arie Gurfinkel, Sagar Chaki	Combining Predicate and Numeric Abstraction for Software Model Checking.	FMCAD	2008	DBLP DOI BibTeX RDF
10	Panuchart Bunyakiati, Anthony Finkelstein, James Skene, Clovis Chapman	Using JULE to generate a compliance test suite for the UML standard.	ICSE	2008	DBLP DOI BibTeX RDF	ocl, test generation, metamodel, certification, binary decision diagram, uml
10	Mark Gabel, Zhendong Su 0001	Symbolic mining of temporal specifications.	ICSE	2008	DBLP DOI BibTeX RDF	formal specifications, dynamic analysis, specification mining
10	Shin-ichi Minato, Takeaki Uno, Hiroki Arimura	LCM over ZBDDs: Fast Generation of Very Large-Scale Frequent Itemsets Using a Compact Graph-Based Representation.	PAKDD	2008	DBLP DOI BibTeX RDF
10	Abusaleh M. Jabir, Dhiraj K. Pradhan, T. L. Rajaprabhu, Ashutosh Kumar Singh 0001	A Technique for Representing Multiple Output Binary Functions with Applications to Verification and Simulation.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	Finite or Galois Fields, Characteristic and Encoded Characteristic Functions, Simulation, Evaluation, Verification, Decision Diagrams
10	Roland Axelsson, Martin Lange	Model Checking the First-Order Fragment of Higher-Order Fixpoint Logic.	LPAR	2007	DBLP DOI BibTeX RDF
10	Natasa Miskov-Zivanov, Diana Marculescu	Soft error rate analysis for sequential circuits.	DATE	2007	DBLP DOI BibTeX RDF
10	Salem Derisavi	Signature-based Symbolic Algorithm for Optimal Markov Chain Lumping.	QEST	2007	DBLP DOI BibTeX RDF
10	Conghua Zhou, Zhenyu Chen 0001, Zhihong Tao	QBF-Based Symbolic Model Checking for Knowledge and Time.	TAMC	2007	DBLP DOI BibTeX RDF
10	Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler	Numerical Function Generators Using Edge-Valued Binary Decision Diagrams.	ASP-DAC	2007	DBLP DOI BibTeX RDF	multiterminal BDD, numerical function generators, edge-valued binary decision diagrams, segment index encoder
10	Marco Bozzano, Alessandro Cimatti, Francesco Tapparo	Symbolic Fault Tree Analysis for Reactive Systems.	ATVA	2007	DBLP DOI BibTeX RDF
10	Michael Wachter 0001, Rolf Haenni	Multi-state Directed Acyclic Graphs.	Canadian AI	2007	DBLP DOI BibTeX RDF
10	Chih-Chun Lee, Jie-Hong Roland Jiang, Chung-Yang Huang, Alan Mishchenko	Scalable exploration of functional dependency by interpolation and incremental SAT solving.	ICCAD	2007	DBLP DOI BibTeX RDF
10	Conghua Zhou, Shiguang Ju	SAT-based Bounded Model Checking for SE-LTL.	SNPD (3)	2007	DBLP DOI BibTeX RDF
10	Valentin Gherman, Hans-Joachim Wunderlich, R. D. Mascarenhas, Jürgen Schlöffel, Michael Garbers	Synthesis of irregular combinational functions with large don't care sets.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	logic synthesis, incompletely specified functions
10	Natasa Miskov-Zivanov, Diana Marculescu	MARS-S: Modeling and Reduction of Soft Errors in Sequential Circuits.	ISQED	2007	DBLP DOI BibTeX RDF
10	Rongjie Yan, Guangyuan Li, Wenliang Zhang, Yunquan Peng	Improvements for the Symbolic Verification of Timed Automata.	FORTE	2007	DBLP DOI BibTeX RDF	verification, BDD, timed systems, symbolic method
10	Martin Lukasiewycz, Michael Glaß, Christian Haubelt, Jürgen Teich	Symbolic Archive Representation for a Fast Nondominance Test.	EMO	2007	DBLP DOI BibTeX RDF
10	Daher Kaiss, Marcelo Skaba, Ziyad Hanna, Zurab Khasidashvili	Industrial Strength SAT-based Alignability Algorithm for Hardware Equivalence Verification.	FMCAD	2007	DBLP DOI BibTeX RDF
10	Antti Valmari	What the small Rubik's cube taught me about data structures, information theory, and randomisation.	Int. J. Softw. Tools Technol. Transf.	2006	DBLP DOI BibTeX RDF	Explicit state spaces
10	Kenil C. K. Cheng, Roland H. C. Yap	Applying Ad-hoc Global Constraints with the case Constraint to Still-Life.	Constraints An Int. J.	2006	DBLP DOI BibTeX RDF	Still-life problem, Ad-hoc constraint, Non-binary constraint, Modeling, Binary decision diagram
10	Peter Hawkins, Peter J. Stuckey	A Hybrid BDD and SAT Finite Domain Constraint Solver.	PADL	2006	DBLP DOI BibTeX RDF
10	Zijiang Yang 0006, Chao Wang 0001, Aarti Gupta, Franjo Ivancic	Mixed symbolic representations for model checking software programs.	MEMOCODE	2006	DBLP DOI BibTeX RDF
10	Erik Roland van der Meer, Andrzej Wasowski, Henrik Reif Andersen	Efficient interactive configuration of unbounded modular systems.	SAC	2006	DBLP DOI BibTeX RDF	interactive configuration, constraint satisfaction
10	Rüdiger Ebendt, Rolf Drechsler	A Framework for Quasi-exact Optimization Using Relaxed Best-First Search.	KI	2006	DBLP DOI BibTeX RDF
10	Charles Pecheur, Franco Raimondi	Symbolic Model Checking of Logics with Actions.	MoChArt	2006	DBLP DOI BibTeX RDF
10	Ralf Wimmer 0001, Marc Herbstritt, Holger Hermanns, Kelley Strampp, Bernd Becker 0001	Sigref- A Symbolic Bisimulation Tool Box.	ATVA	2006	DBLP DOI BibTeX RDF
10	Alastair F. Donaldson, Alice Miller 0001	Symmetry Reduction for Probabilistic Model Checking Using Generic Representatives.	ATVA	2006	DBLP DOI BibTeX RDF
10	Gary Hardy, Corinne Lucet, Nikolaos Limnios	A BDD-Based Heuristic Algorithm for Design of Reliable Networks with Minimal Cost.	MSN	2006	DBLP DOI BibTeX RDF
10	Kai Lampka, Markus Siegle, Max Walter	An Easy-to-Use, Efficient Tool-Chain to Analyze the Availability of Telecommunication Equipment.	FMICS/PDMC	2006	DBLP DOI BibTeX RDF	Reliability and Availability Analysis, State Space Explosion Binary Decision Diagram, Reliability Block Diagrams, Markov Reward Model
10	Sherif Yusuf, Wayne Luk, M. K. N. Szeto, William George Osborne	UNITE: Uniform Hardware-Based Network Intrusion deTection Engine.	ARC	2006	DBLP DOI BibTeX RDF
10	David Ward, Fabio Somenzi	Decomposing image computation for symbolic reachability analysis using control flow information.	ICCAD	2006	DBLP DOI BibTeX RDF
10	Gianpiero Cabodi, Marco Murciano, Sergio Nocco, Stefano Quer	Stepping forward with interpolants in unbounded model checking.	ICCAD	2006	DBLP DOI BibTeX RDF
10	Javier Esparza, Stefan Kiefer, Stefan Schwoon	Abstraction Refinement with Craig Interpolation and Symbolic Pushdown Systems.	TACAS	2006	DBLP DOI BibTeX RDF
10	Stelios Neophytou, Maria K. Michael, Spyros Tragoudas	Efficient Deterministic Test Generation for BIST Schemes with LFSR Reseeding.	IOLTS	2006	DBLP DOI BibTeX RDF
10	Randal E. Bryant	Formal Verification of Infinite State Systems Using Boolean Methods.	RTA	2006	DBLP DOI BibTeX RDF
10	Lihua Yuan, Jianning Mai, Zhendong Su 0001, Hao Chen 0003, Chen-Nee Chuah, Prasant Mohapatra	FIREMAN: A Toolkit for FIREwall Modeling and ANalysis.	S&P	2006	DBLP DOI BibTeX RDF
10	Jianbin Tan, George S. Avrunin, Lori A. Clarke	Managing space for finite-state verification.	ICSE	2006	DBLP DOI BibTeX RDF	FLAVERS, ZDD, BDD, finite-state verification, LTSA
10	P. W. Chandana Prasad, Bruce Mills, Ali Assi 0001, S. M. N. Arosha Senanayake, V. C. Prasad	Evaluation time Estimation for Pass Transistor Logic circuits.	DELTA	2006	DBLP DOI BibTeX RDF
10	Gopal Paul, Sambhu Nath Pradhan, Ajit Pal, Bhargab B. Bhattacharya	Low Power BDD-based Synthesis Using Dual Rail Static DCVSPG Logic.	APCCAS	2006	DBLP DOI BibTeX RDF
10	Jin S. Zhang, Alan Mishchenko, Robert K. Brayton, Malgorzata Chrzanowska-Jeske	Symmetry detection for large Boolean functions using circuit representation, simulation, and satisfiability.	DAC	2006	DBLP DOI BibTeX RDF	and-inverter graphs, classical symmetries, simulation, boolean functions, boolean satisfiability
10	Natasa Miskov-Zivanov, Diana Marculescu	MARS-C: modeling and reduction of soft errors in combinational circuits.	DAC	2006	DBLP DOI BibTeX RDF	reliability symbolic techniques, SER
10	Maurice Pagnucco	Knowledge Compilation for Belief Change.	Australian Conference on Artificial Intelligence	2006	DBLP DOI BibTeX RDF	belief revision and update, common-sense reasoning, knowledge representation and reasoning
10	Shinobu Nagayama, Tsutomu Sasao	On the optimization of heterogeneous MDDs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2005	DBLP DOI BibTeX RDF
10	Rajeev Alur, P. Madhusudan, Wonhong Nam	Symbolic computational techniques for solving games.	Int. J. Softw. Tools Technol. Transf.	2005	DBLP DOI BibTeX RDF	QBF solving, Games, Formal verification, Symbolic model checking, Bounded model checking
10	Daijue Tang, Sharad Malik, Aarti Gupta, C. Norris Ip	Symmetry Reduction in SAT-Based Model Checking.	CAV	2005	DBLP DOI BibTeX RDF
10	François Macé, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat	A Design Methodology for Secured ICs Using Dynamic Current Mode Logic.	PATMOS	2005	DBLP DOI BibTeX RDF	Differential Pull Down Networks, Side-channel attack, Differential Power Analysis, Binary Decision Diagrams
10	Rüdiger Ebendt, Rolf Drechsler	Quasi-Exact BDD Minimization Using Relaxed Best-First Search.	ISVLSI	2005	DBLP DOI BibTeX RDF
10	Reiner Hähnle, Neil V. Murray, Erik Rosenthal	Normal Forms for Knowledge Compilation.	ISMIS	2005	DBLP DOI BibTeX RDF
10	Junhao Shi, Görschwin Fey, Rolf Drechsler	Bridging fault testability of BDD circuits.	ASP-DAC	2005	DBLP DOI BibTeX RDF
10	Andrea Bobbio, Daniele Codetta Raiteri, Massimiliano De Pierro, Giuliana Franceschinis	Efficient Analysis Algorithms for Parametric Fault Trees.	FIRB-Perf	2005	DBLP DOI BibTeX RDF
10	Nina Amla, Xiaoqun Du, Andreas Kuehlmann, Robert P. Kurshan, Kenneth L. McMillan	An Analysis of SAT-Based Model Checking Techniques in an Industrial Environment.	CHARME	2005	DBLP DOI BibTeX RDF
10	Wolfgang Lenders, Christel Baier	Genetic Algorithms for the Variable Ordering Problem of Binary Decision Diagrams.	FOGA	2005	DBLP DOI BibTeX RDF
10	Kenil C. K. Cheng, Roland H. C. Yap	Ad-hoc Global Constraints for Life.	CP	2005	DBLP DOI BibTeX RDF
10	Jianwen Zhu	Towards scalable flow and context sensitive pointer analysis.	DAC	2005	DBLP DOI BibTeX RDF	high-level synthesis, binary decision diagrams, pointer analysis
10	Ofer Strichman	Accelerating Bounded Model Checking of Safety Properties.	Formal Methods Syst. Des.	2004	DBLP DOI BibTeX RDF	SAT, Bounded Model Checking
10	Geun Rae Cho, Tom Chen 0001	Synthesis of single/dual-rail mixed PTL/static logic for low-power applications.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
10	Shuo Sheng, Michael S. Hsiao	Success-Driven Learning in ATPG for Preimage Computation.	IEEE Des. Test Comput.	2004	DBLP DOI BibTeX RDF
10	Amit Goel, Randal E. Bryant	Symbolic Simulation, Model Checking and Abstraction with Partially Ordered Boolean Functional Vectors.	CAV	2004	DBLP DOI BibTeX RDF
10	Marta Z. Kwiatkowska, David Parker 0001, Yi Zhang, Rashid Mehmood	Dual-Processor Parallelisation of Symbolic Probabilistic Model Checking.	MASCOTS	2004	DBLP DOI BibTeX RDF
10	Lun Li, Mitchell A. Thornton, Stephen A. Szygenda	A Genetic Approach for Conjunction Scheduling in Symbolic Equivalence Checking.	ISVLSI	2004	DBLP DOI BibTeX RDF
10	Görschwin Fey, Junhao Shi, Rolf Drechsler	BDD Circuit Optimization for Path Delay Fault Testability.	DSD	2004	DBLP DOI BibTeX RDF
10	Christophe Mues, Jan Vanthienen	Improving the Scalability of Rule Base Verification Using Binary Decision Diagrams: An Empirical Study.	KI	2004	DBLP DOI BibTeX RDF
10	Christophe Mues, Jan Vanthienen	Efficient Rule Base Verification Using Binary Decision Diagrams.	DEXA	2004	DBLP DOI BibTeX RDF
10	Shinobu Nagayama, Tsutomu Sasao	Minimization of memory size for heterogeneous MDDs.	ASP-DAC	2004	DBLP DOI BibTeX RDF
10	Guanghui Li 0001, Xiaowei Li 0001	Circuit-Width Based Heuristic for Boolean Reasoning.	Asian Test Symposium	2004	DBLP DOI BibTeX RDF
10	Fang Wang, Sofiène Tahar, Otmane Aït Mohamed	First-Order LTL Model Checking Using MDGs.	ATVA	2004	DBLP DOI BibTeX RDF
10	Fang Yu 0001, Bow-Yaw Wang	Toward Unbounded Model Checking for Region Automata.	ATVA	2004	DBLP DOI BibTeX RDF	Region automata, Real-time systems, Model checking, Verification, Induction, BMC
10	María Alpuente, Moreno Falaschi, Alicia Villanueva	A Symbolic Model Checker for tccp Programs.	RISE	2004	DBLP DOI BibTeX RDF	Timed Concurrent Constraint Programs, DDDs, Model Checking, Lightweight formal methods
10	Marc Solé, Enric Pastor	Evaluating Symbolic Traversal Algorithms Applied to Asynchronous Concurrent Systems.	ACSD	2004	DBLP DOI BibTeX RDF