|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 3961 occurrences of 1777 keywords
|
|
|
Results
Found 46124 publication records. Showing 46122 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
26 | Jeremy Constantin, Ahmed Yasir Dogan, Oskar Andersson, Pascal Andreas Meinerzhagen, Joachim Neves Rodrigues, David Atienza, Andreas Burg |
An Ultra-Low-Power Application-Specific Processor with Sub-VT Memories for Compressed Sensing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papers, pp. 88-106, 2012, Springer, 978-3-642-45072-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Seokjoong Kim, Matthew R. Guthaus |
SEU-Aware Low-Power Memories Using a Multiple Supply Voltage Array Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papers, pp. 181-195, 2012, Springer, 978-3-642-45072-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Qiuling Zhu, Larry T. Pileggi, Franz Franchetti |
A Smart Memory Accelerated Computed Tomography Parallel Backprojection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papers, pp. 21-44, 2012, Springer, 978-3-642-45072-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Davide Sabena, Luca Sterpone, Matteo Sonza Reorda |
On the Automatic Generation of Software-Based Self-Test Programs for Functional Test and Diagnosis of VLIW Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papers, pp. 162-180, 2012, Springer, 978-3-642-45072-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Anelise Kologeski, Caroline Concatto, Fernanda Lima Kastensmidt, Luigi Carro |
Fault-Tolerant Techniques to Manage Yield and Power Constraints in Network-on-Chip Interconnections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papers, pp. 144-161, 2012, Springer, 978-3-642-45072-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Farhad Alibeygi Parsan, Scott C. Smith |
CMOS Implementation of Threshold Gates with Hysteresis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papers, pp. 196-216, 2012, Springer, 978-3-642-45072-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Jürgen Becker 0001, Marcelo O. Johann, Ricardo Reis 0001 (eds.) |
VLSI-SoC: Technologies for Systems Integration - 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianópolis, Brazil, October 12-14, 2009, Revised Selected Papers ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![Springer, 978-3-642-23119-3 The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro 0001 |
Multiplierless Design of Linear DSP Transforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Advanced Research for Systems on Chip - 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers, pp. 73-93, 2011, Springer, 978-3-642-32769-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Toshiyuki Tsuchiya, Hiroyuki Tokusaki, Yoshikazu Hirai, Koji Sugano, Osamu Tabata |
Self-dependent Equivalent Circuit Modeling of Electrostatic Comb Transducers for Integrated MEMS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Advanced Research for Systems on Chip - 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers, pp. 94-109, 2011, Springer, 978-3-642-32769-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Huan Chen 0001, João Marques-Silva 0001 |
Improvements to Satisfiability-Based Boolean Function Bi-Decomposition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Advanced Research for Systems on Chip - 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers, pp. 52-72, 2011, Springer, 978-3-642-32769-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | J. Gerardo García-Sánchez, José M. de la Rosa 0001 |
Efficient Multi-rate Hybrid Continuous-Time/Discrete-Time Cascade 2-2 Sigma-Delta Modulators for Wideband Telecom. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Advanced Research for Systems on Chip - 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers, pp. 124-143, 2011, Springer, 978-3-642-32769-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Xiaojin Zhao, Amine Bermak, Farid Boussaïd |
A Low Cost CMOS Polarimetric Ophthalmoscope Scheme for Cerebral Malaria Diagnostics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Advanced Research for Systems on Chip - 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers, pp. 1-9, 2011, Springer, 978-3-642-32769-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Xin Ming, Ze-kun Zhou, Bo Zhang 0027 |
A Low-Power Ultra-Fast Capacitor-Less LDO with Advanced Dynamic Push-Pull Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Advanced Research for Systems on Chip - 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers, pp. 34-51, 2011, Springer, 978-3-642-32769-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Brendan Mullane, Vincent O'Brien |
A 100dB SFDR 0.5V pk-pk Band-Pass DAC Implemented on a Low Voltage CMOS Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Advanced Research for Systems on Chip - 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers, pp. 144-157, 2011, Springer, 978-3-642-32769-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Ernesto Sánchez 0001, Matteo Sonza Reorda, Alberto Paolo Tonda |
On the Functional Test of Branch Prediction Units Based on the Branch History Table Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Advanced Research for Systems on Chip - 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers, pp. 110-123, 2011, Springer, 978-3-642-32769-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Wing-Hung Ki, Yan Lu 0002, Feng Su, Chi-Ying Tsui |
Analysis and Design Strategy of On-Chip Charge Pumps for Micro-power Energy Harvesting Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Advanced Research for Systems on Chip - 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers, pp. 158-186, 2011, Springer, 978-3-642-32769-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Ji Kong, Peilin Liu |
A novel reconfigurable scratchpad memory for audio applications on cost-effective SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: 18th IEEE/IFIP VLSI-SoC 2010, IEEE/IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Madrid, Spain, 27-29 September 2010, pp. 402-407, 2010, IEEE. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Luc Claesen, Peter Vandoren, Tom Van Laerhoven, Andy Motten, Domien Nowicki, Tom De Weyer, Frank Van Reeth, Eddy Flerackers |
Smart camera SoC system for interactive real-time real-brush based digital painting systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: 18th IEEE/IFIP VLSI-SoC 2010, IEEE/IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Madrid, Spain, 27-29 September 2010, pp. 247-252, 2010, IEEE. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Andy Motten, Luc Claesen |
A binary adaptable window SoC architecture for a stereo vision based depth field processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: 18th IEEE/IFIP VLSI-SoC 2010, IEEE/IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Madrid, Spain, 27-29 September 2010, pp. 25-30, 2010, IEEE. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Gabriel Caffarena, Angel Fernandez Herrero, Juan A. López, Carlos Carreras |
Fast Fixed-Point Optimization of DSP Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers, pp. 182-205, 2010, Springer, 978-3-642-28565-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Rafik Khereddine, Louay Abdallah, Emmanuel Simeu, Salvador Mir, Fabio Cenni |
Adaptive Logical Control of RF LNA Performances for Efficient Energy Consumption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers, pp. 43-68, 2010, Springer, 978-3-642-28565-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Tsung-Yi Ho, Sheng-Hung Liu |
Fast Legalization for Standard Cell Placement with Simultaneous Wirelength and Displacement Minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers, pp. 291-311, 2010, Springer, 978-3-642-28565-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Eliyah Kilada, Kenneth S. Stevens |
Design and Verification of Lazy and Hybrid Implementations of the SELF Protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers, pp. 206-232, 2010, Springer, 978-3-642-28565-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Maher Jridi, Ayman Alfalou |
Joint Optimization of Low-Power DCT Architecture and Efficient Quantization Technique for Embedded Image Compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers, pp. 155-181, 2010, Springer, 978-3-642-28565-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Aaron V. T. Do, Chirn Chye Boon, Manthena Vamshi Krishna, Manh Anh Do, Kiat Seng Yeo |
A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers, pp. 1-21, 2010, Springer, 978-3-642-28565-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Christoph Studer, Markus Wenk, Andreas Burg |
VLSI Implementation of Hard- and Soft-Output Sphere Decoding for Wide-Band MIMO Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers, pp. 128-154, 2010, Springer, 978-3-642-28565-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Luc Claesen, Peter Vandoren, Tom Van Laerhoven, Andy Motten, Fabian Di Fiore, Frank Van Reeth, Jing Liao 0001, Jinhui Yu |
Smart Camera System-on-Chip Architecture for Real-Time Brush Based Interactive Painting Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers, pp. 339-353, 2010, Springer, 978-3-642-28565-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Christian Benkeser, Qiuting Huang |
Design and Optimization of a Digital Baseband Receiver ASIC for GSM/EDGE. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers, pp. 100-127, 2010, Springer, 978-3-642-28565-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Rémi Busseuil, Gabriel Marchesan Almeida, Luciano Ost, Sameer Varyani, Gilles Sassatelli, Michel Robert |
Adaptation Strategies in Multiprocessors System on Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers, pp. 233-257, 2010, Springer, 978-3-642-28565-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Oscar Alonso, Ángel Diéguez |
Control Electronics Integration toward Endoscopic Capsule Robot Performing Legged Locomotion and Illumination. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers, pp. 312-338, 2010, Springer, 978-3-642-28565-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Hailong Jiao, Volkan Kursun |
Tri-mode Operation for Noise Reduction and Data Preservation in Low-Leakage Multi-Threshold CMOS Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers, pp. 258-290, 2010, Springer, 978-3-642-28565-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Manthena Vamshi Krishna, Xuan Jie, Manh Anh Do, Chirn Chye Boon, Kiat Seng Yeo, Aaron V. T. Do |
A 1.8-V 3.6-mW 2.4-GHz Fully Integrated CMOS Frequency Synthesizer for the IEEE 802.15.4. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers, pp. 69-99, 2010, Springer, 978-3-642-28565-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Oussama Elissati, Sébastien Rieubon, Eslam Yahya, Laurent Fesquet |
Self-Timed Rings: A Promising Solution for Generating High-Speed High-Resolution Low-Phase Noise Clocks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers, pp. 22-42, 2010, Springer, 978-3-642-28565-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Faiz-ul Hassan, B. Cheng, Wim Vanderbauwhede, Fernando Rodríguez Salazar |
Impact of device variability in the communication structures for future synchronous SoC designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: 2008 IEEE International Symposium on System-on-Chip, SOC 2009, Tampere, Finland, October 6-7, 2008, pp. 68-72, 2009, IEEE, 978-1-4244-4465-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Joël Porquet, Christian Schwarz, Alain Greiner |
Multi-compartment: A new architecture for secure co-hosting on SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: 2008 IEEE International Symposium on System-on-Chip, SOC 2009, Tampere, Finland, October 6-7, 2008, pp. 124-127, 2009, IEEE, 978-1-4244-4465-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Alzemiro Henrique Lucas da Silva, Alexandre M. Amory, Fernando Gehm Moraes |
Crosstalk Fault Tolerant NoC: Design and Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: Technologies for Systems Integration - 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianópolis, Brazil, October 12-14, 2009, Revised Selected Papers, pp. 81-93, 2009, Springer, 978-3-642-23119-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Ian O'Connor, Junchen Liu, Kotb Jabeur, Nataliya Yakymets, Renaud Daviot, David Navarro, Pierre-Emmanuel Gaillardon, Fabien Clermidy, Maimouna Amadou, Gabriela Nicolescu |
Emerging Technologies and Nanoscale Computing Fabrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: Technologies for Systems Integration - 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianópolis, Brazil, October 12-14, 2009, Revised Selected Papers, pp. 1-20, 2009, Springer, 978-3-642-23119-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | António Gusmão, Luís Miguel Silveira, José Monteiro 0001 |
Power Macro-Modeling Using an Iterative LS-SVM Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: Technologies for Systems Integration - 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianópolis, Brazil, October 12-14, 2009, Revised Selected Papers, pp. 118-134, 2009, Springer, 978-3-642-23119-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Dieison Antonello Deprá, Sergio Bampi |
Techniques for Architecture Design for Binary Arithmetic Decoder Engines Based on Bitstream Flow Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: Technologies for Systems Integration - 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianópolis, Brazil, October 12-14, 2009, Revised Selected Papers, pp. 181-197, 2009, Springer, 978-3-642-23119-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Amine Dehbaoui, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert |
Enhancing Electromagnetic Attacks Using Spectral Coherence Based Cartography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: Technologies for Systems Integration - 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianópolis, Brazil, October 12-14, 2009, Revised Selected Papers, pp. 135-155, 2009, Springer, 978-3-642-23119-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Yann Oddos, Katell Morin-Allory, Dominique Borrione |
From Assertion-Based Verification to Assertion-Based Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: Technologies for Systems Integration - 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianópolis, Brazil, October 12-14, 2009, Revised Selected Papers, pp. 94-117, 2009, Springer, 978-3-642-23119-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Ayse Kivilcim Coskun, José L. Ayala, David Atienza, Tajana Simunic Rosing |
Thermal Modeling and Management of Liquid-Cooled 3D Stacked Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: Technologies for Systems Integration - 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianópolis, Brazil, October 12-14, 2009, Revised Selected Papers, pp. 34-55, 2009, Springer, 978-3-642-23119-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Gustavo Girão, Daniel Barcelos, Flávio Rech Wagner |
Performance and Energy Evaluation of Memory Organizations in NoC-Based MPSoCs under Latency and Task Migration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: Technologies for Systems Integration - 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianópolis, Brazil, October 12-14, 2009, Revised Selected Papers, pp. 56-80, 2009, Springer, 978-3-642-23119-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Sergio Bampi, Ricardo Reis 0001 |
Challenges and Emerging Technologies for System Integration beyond the End of the Roadmap of Nano-CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: Technologies for Systems Integration - 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianópolis, Brazil, October 12-14, 2009, Revised Selected Papers, pp. 21-33, 2009, Springer, 978-3-642-23119-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Petru Bogdan Bacinschi, Manfred Glesner |
A Multistep Extrapolated S-Parameter Model for Arbitrary On-Chip Interconnect Structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: Technologies for Systems Integration - 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianópolis, Brazil, October 12-14, 2009, Revised Selected Papers, pp. 156-180, 2009, Springer, 978-3-642-23119-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Mohammad Arjomand, Hamid Sarbazi-Azad, S. Hamid Amiri |
Multi-Objective Genetic optimized multiprocessor SoC design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: 2008 IEEE International Symposium on System-on-Chip, SOC 2008, Tampere, Finland, November 5-6, 2008, pp. 1-4, 2008, IEEE, 978-1-4244-2541-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Ning Ma, Zhibo Pang, Hannu Tenhunen, Lirong Zheng 0001 |
An ASIC-design-based configurable SOC architecture for networked media. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: 2008 IEEE International Symposium on System-on-Chip, SOC 2008, Tampere, Finland, November 5-6, 2008, pp. 1-4, 2008, IEEE, 978-1-4244-2541-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Manuel Ortiz, María Brox, Francisco Javier Quiles-Latorre, Andrés Gersnoviez, Carlos Diego Moreno-Moreno, M. Montijano |
Using soft processors for component design in SOC: A case-study of timers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: 2008 IEEE International Symposium on System-on-Chip, SOC 2008, Tampere, Finland, November 5-6, 2008, pp. 1-4, 2008, IEEE, 978-1-4244-2541-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Muhammad E. S. Elrabaa |
A two-phase return-to-zero (RZ) asynchronous transceiver circuit for pipe-lined SoC interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: 2008 IEEE International Symposium on System-on-Chip, SOC 2008, Tampere, Finland, November 5-6, 2008, pp. 1-4, 2008, IEEE, 978-1-4244-2541-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Maoxiang Yi, Huaguo Liang, Zhengfeng Huang |
Balancing wrapper chains of SoC core based on best interchange decreasing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: 2008 IEEE International Symposium on System-on-Chip, SOC 2008, Tampere, Finland, November 5-6, 2008, pp. 1-4, 2008, IEEE, 978-1-4244-2541-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Ricardo Augusto da Luz Reis, Adam Osseiran, Hans-Jörg Pfleiderer (eds.) |
VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![Springer, 978-0-387-73660-0 The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
26 | Brian Cody, Justin Madigan, Spencer MacDonald, Kenneth W. Hsu |
High speed SOC design for blowfish cryptographic algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: IFIP VLSI-SoC 2007, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Atlanta, GA, USA, 15-17 October 2007, pp. 284-287, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Julien Dalmasso, Marie-Lise Flottes, Bruno Rouzeyre |
Compression-based SoC Test Infrastructures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: Advanced Topics on Systems on a Chip - A Selection of Extended Versions of the Best Papers of the Fourteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2007), October 15-17, 2007, Atlanta, USA, pp. 1-15, 2007, Springer, 978-0-387-93845-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Heikki Orsila, Erno Salminen, Marko Hännikäinen, Timo Hämäläinen 0001 |
Optimal Subset Mapping And Convergence Evaluation of Mapping Algorithms for Distributing Task Graphs on Multiprocessor SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: International Symposium on System-on-Chip, SoC 2007, Tampere, Finland, November 20-21, 2007, pp. 1-6, 2007, IEEE, 978-1-4244-1368-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Sergio Tota, Mario R. Casu, Paolo Motto Ros, Massimo Ruo Roch, Maurizio Zamboni |
The NoCRay Graphic Accelerator: a Case-study for MP-SoC Network-on-Chip Design Methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: International Symposium on System-on-Chip, SoC 2007, Tampere, Finland, November 20-21, 2007, pp. 1-4, 2007, IEEE, 978-1-4244-1368-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Maher Assaad, David R. S. Cumming |
CMOS IC Design and Verilog-A Modelling of 10-Gb/s PLL-Based Deserializer for Inter-Chip Communication in SOC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: International Symposium on System-on-Chip, SoC 2007, Tampere, Finland, November 20-21, 2007, pp. 1-4, 2007, IEEE, 978-1-4244-1368-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Guido Schreiner |
Development of Complex SoC Devices Require New Design Technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: International Symposium on System-on-Chip, SoC 2007, Tampere, Finland, November 20-21, 2007, pp. 1, 2007, IEEE, 978-1-4244-1368-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Steve Leibson |
Reduce SOC Energy Consumption through Processor ISA Extension. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: International Symposium on System-on-Chip, SoC 2007, Tampere, Finland, November 20-21, 2007, pp. 1-4, 2007, IEEE, 978-1-4244-1368-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Manfred Glesner, Ricardo Augusto da Luz Reis, Leandro Soares Indrusiak, Vincent John Mooney III, Hans Eveking (eds.) |
VLSI-SOC: From Systems to Chips - IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![Springer, 978-0-387-33402-8 The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
26 | Jacques Benkowski |
The system is really in the SoC : new investment opportunities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
26 | Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Fernando Gehm Moraes |
A Leak Resistant SoC to Counteract Side Channel Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: International Symposium on System-on-Chip, SoC 2006, Tampere, Finland, November 13-16, 2006, pp. 1-4, 2006, IEEE, 1-4244-0621-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
26 | Daniel Iancu, Hua Ye 0003, Vladimir Kotlyar, Murugappan Senthilvelan, John Glossner, Gary Nacer, Andrei Iancu, Jarmo Takala |
Analog Television, WiMAX and DVB-H on the Same SoC Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: International Symposium on System-on-Chip, SoC 2006, Tampere, Finland, November 13-16, 2006, pp. 1-4, 2006, IEEE, 1-4244-0621-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
26 | Chantal Ykman-Couvreur, Vincent Nollet, Francky Catthoor, Henk Corporaal |
Fast Multi-Dimension Multi-Choice Knapsack Heuristic for MP-SoC Run-Time Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: International Symposium on System-on-Chip, SoC 2006, Tampere, Finland, November 13-16, 2006, pp. 1-4, 2006, IEEE, 1-4244-0621-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
26 | Leandro Soares Indrusiak |
Exploring Application-Level Concurrency in SoC Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: International Symposium on System-on-Chip, SoC 2006, Tampere, Finland, November 13-16, 2006, pp. 1-4, 2006, IEEE, 1-4244-0621-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
26 | Tomi Westerlund, Juha Plosila |
Formal Modelling of Multiclocked SoC Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: International Symposium on System-on-Chip, SoC 2006, Tampere, Finland, November 13-16, 2006, pp. 1-4, 2006, IEEE, 1-4244-0621-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
26 | Steve Leibson |
The Future of Nanometer SOC Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: International Symposium on System-on-Chip, SoC 2006, Tampere, Finland, November 13-16, 2006, pp. 1-6, 2006, IEEE, 1-4244-0621-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
26 | Paul D. Franzon, David Nackashi, Christian Amsinck, Neil Di Spigna, Sachin Sonkusale |
Molecular Electronics - Devices and Circuits Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 1-10, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Achraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur |
On-chip Pseudorandom Testing for Linear and Nonlinear MEMS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 245-266, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Leonardo Londero de Oliveira, Cristiano Santos, Daniel Lima Ferrão, Eduardo A. C. da Costa, José Monteiro 0001, João Baptista dos Santos Martins, Sergio Bampi, Ricardo Augusto da Luz Reis |
A Comparison of Layout Implementations of Pipelined and Non-Pipelined Signed Radix-4 Array Multiplier and Modified Booth Multiplier Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 25-39, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Thilo Pionteck, Thomas Stiefmeier, Thorsten Staake, Manfred Glesner |
On The Design of A Dynamically Reconfigurable Function-Unit for Error Detection and Correction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 283-297, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Cristiano Lazzari, Lorena Anghel, Ricardo Reis 0001 |
A Transistor Placement Technique Using Genetic Algorithm and Analytical Programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 331-344, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Alberto Donato, Fabrizio Ferrandi, Massimo Redaelli, Marco D. Santambrogio, Donatella Sciuto |
Caronte: A methodology for the Implementation of Partially dynamically Self-Reconfiguring Systems on FPGA Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 87-109, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Jun-Cheol Park, Vincent John Mooney III |
Pareto Points in SRAM Design Using the Sleepy Stack Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 163-177, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici |
A Methodology for Reliability Enhancement of Nanometer-Scale Digital Systems Based on a-priori Functional Fault- Tolerance Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 111-125, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | César A. M. Marcon, José Carlos S. Palma, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Ricardo Augusto da Luz Reis |
Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 179-194, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Shankar Mahadevan, Federico Angiolini, Jens Sparsø, Luca Benini, Jan Madsen |
A Traffic Injection Methodology with Support for System-Level Synchronization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 145-161, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | G. Fraidy Bouesse, Marc Renaudin, Gilles Sicard |
Improving DPA Resistance of Quasi Delay Insensitive Circuits Using Randomly Time-shifted Acknowledgment Signals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 11-24, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Bertrand Folco, Vivian Brégier, Laurent Fesquet, Marc Renaudin |
Technology Mapping for Area Optimized Quasi Delay Insensitive Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 55-69, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Markus Koester, Heiko Kalte, Mario Porrmann, Ulrich Rückert 0001 |
Defragmentation Algorithms for Partially Reconfigurable Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 41-53, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Chul Kim, A. M. Rassau, Stefan Lachowicz, Saeid Nooshabadi, Kamran Eshraghian |
3D-SoftChip: A Novel 3D Vertically Integrated Adaptive Computing System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 71-86, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Rüdiger Ebendt, Rolf Drechsler |
Exact BDD Minimization for Path-Related Objective Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 299-315, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Jerome Quartana, Laurent Fesquet, Marc Renaudin |
Modular Asynchronous Network-on-Chip: Application to GALS Systems Rapid Prototyping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 195-207, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Nabil Badereddine, Patrick Girard 0001, Serge Pravossoudovitch, Arnaud Virazel, Christian Landrault |
Scan Cell Reordering for Peak Power Reduction during Scan Test Cycles. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 267-281, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Muhsen Aljada, Kamal E. Alameh, Adam Osseiran, Khalid Al-Begain |
A Novel MicroPhotonic Structure for Optical Header Recognition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 209-219, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | João M. S. Silva, L. Miguel Silveira |
Issues in Model Reduction of Power Grids. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 127-144, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Michel Robert, Guy Cathébras, Gilles Sassatelli, Fernando Gehm Moraes |
Current Mask Generation: an Analog Circuit to Thwart DPA Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia, pp. 317-330, 2005, Springer, 978-0-387-73660-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Youngchul Cho, Ganghee Lee, Kiyoung Choi, Sungjoo Yoo, Nacer-Eddine Zergainoh |
Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Embedded Software for SoC ![In: Embedded Software for SoC, pp. 125-136, 2003, Kluwer / Springer, 978-1-4020-7528-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
26 | Sungjoo Yoo, Ahmed Amine Jerraya |
Introduction to Hardware Abstraction Layers for SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Embedded Software for SoC ![In: Embedded Software for SoC, pp. 179-186, 2003, Kluwer / Springer, 978-1-4020-7528-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
26 | Imed Moussa, Thierry Grellier, Giang Nguyen |
Exploring SW Performance Using SoC Transaction-Level Modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Embedded Software for SoC ![In: Embedded Software for SoC, pp. 97-109, 2003, Kluwer / Springer, 978-1-4020-7528-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
26 | Shervin Sharifi, Mohammad Hosseinabady, Zainalabedin Navabi |
Selective Trigger Scan Architecture for Reducing Power, Time and Data Volume in SoC Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SOC ![In: IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003, pp. 215-220, 2003, Technische Universität Darmstadt, Insitute of Microelectronic Systems, 3-901882-17-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
26 | Timm Ostermann, Wolfgang Gut, Christian Bacher, Bernd Deutschmann |
Measures to Reduce the Electromagnetic Emission of a SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SOC ![In: IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003, pp. 31-, 2003, Technische Universität Darmstadt, Insitute of Microelectronic Systems, 3-901882-17-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
26 | Michael S. McCorquodale, Eric D. Marsman, Robert M. Senger, Fadi H. Gebara, Richard B. Brown |
Microsystem and SoC Design with UMIPS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SOC ![In: IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003, pp. 324-, 2003, Technische Universität Darmstadt, Insitute of Microelectronic Systems, 3-901882-17-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
26 | Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sören Moch, Mark Bernd Kulaczewski, Peter Pirsch |
HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SOC ![In: IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003, pp. 155-160, 2003, Technische Universität Darmstadt, Insitute of Microelectronic Systems, 3-901882-17-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
26 | Wei Zou, Chris Chu, Sudhakar M. Reddy, Irith Pomeranz |
Optimizing SOC Test Resources using Dual Sequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SOC ![In: IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003, pp. 180-185, 2003, Technische Universität Darmstadt, Insitute of Microelectronic Systems, 3-901882-17-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
26 | Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan |
Crosstalk Immune Coding from Area and Power Perspective for high performance AMBA based SoC systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SOC ![In: IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003, pp. 314-317, 2003, Technische Universität Darmstadt, Insitute of Microelectronic Systems, 3-901882-17-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
26 | Arkadiy Morgenshtein, Michael Moreinis, Israel A. Wagner, Avinoam Kolodny |
Logic Gates as Repeaters (LGR) for Timing Optimization of SoC Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SOC ![In: IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003, pp. 99-104, 2003, Technische Universität Darmstadt, Insitute of Microelectronic Systems, 3-901882-17-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
26 | Jürgen Becker 0001, Alexander Thomas, Maik Scheer |
Asynchronous Integration of Coarse-Grained Reconfigurable XPP-Arrays Into Pipelined Risc Processor Datapath. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SOC: From Systems to Chips - IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany, pp. 263-279, 2003, Springer, 978-0-387-33402-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
26 | Alexandre M. Amory, Leandro A. Oliveira, Fernando Gehm Moraes |
Software-Based Test for Nonprogrammable Cores in Bus-Based System-On-Chip Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SOC: From Systems to Chips - IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany, pp. 165-179, 2003, Springer, 978-0-387-33402-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
26 | Thilo Pionteck, Lukusa D. Kabulepa, Manfred Glesner |
Exploring the Capabilities of Reconfigurable Hardware for OFDM-Based Wlans. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SOC: From Systems to Chips - IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany, pp. 149-164, 2003, Springer, 978-0-387-33402-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
26 | Vijay Degalahal, Rajaraman Ramanarayanan, Narayanan Vijaykrishnan, Yuan Xie 0001, Mary Jane Irwin |
Effect of Power Optimizations on Soft Error Rate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SOC: From Systems to Chips - IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany, pp. 1-20, 2003, Springer, 978-0-387-33402-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
Displaying result #401 - #500 of 46122 (100 per page; Change: ) Pages: [ <<][ 1][ 2][ 3][ 4][ 5][ 6][ 7][ 8][ 9][ 10][ 11][ 12][ 13][ 14][ >>] |
|