Search results for "Programmability"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
9	Ronen Vaisenberg	Exploiting Semantics for Event Detection Systems.	PerCom	2009	DBLP DOI BibTeX RDF
9	Gang Chen 0012, Guobo Li, Songwen Pei, Baifeng Wu	GPGPU supported cooperative acceleration in molecular dynamics.	CSCWD	2009	DBLP DOI BibTeX RDF
9	Hoeteck Wee	Zero Knowledge in the Random Oracle Model, Revisited.	ASIACRYPT	2009	DBLP DOI BibTeX RDF	sequential composition, zero-knowledge, obfuscation, random oracle model
9	Chengmo Yang, Mingjing Chen, Alex Orailoglu	Squashing microcode stores to size in embedded systems while delivering rapid microcode accesses.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	microcode compression, microcoded processors
9	Han Wan, Xiaopeng Gao, Xiang Long, Zhiqiang Wang	GCSim: A GPU-Based Trace-Driven Simulator for Multi-level Cache.	APPT	2009	DBLP DOI BibTeX RDF	parallel algorithms, caches, GPGPU, CUDA, trace-driven simulation
9	Rob van Nieuwpoort, John W. Romein	Using many-core hardware to correlate radio astronomy signals.	ICS	2009	DBLP DOI BibTeX RDF	lofar, correlator, many-core
9	Yongjun Park 0001, Hyunchul Park 0001, Scott A. Mahlke	CGRA express: accelerating execution using dynamic operation fusion.	CASES	2009	DBLP DOI BibTeX RDF	latency-constrained, subgraph accelerator, modulo scheduling, coarse-grained reconfigurable architecture
9	Yuwen Sun, Shimeng Huang, Joseph Oresko, John Krais, Allen C. Cheng	A programmable implementation of neural signal processing on a smartdust for brain-computer interfaces.	ISLPED	2009	DBLP DOI BibTeX RDF	brain-implantable computing, smartdust, brain-computer interface, tinyOS, DVFS
9	Ronny Ronen	Larrabee: a many-core Intel architecture for visual computing.	Conf. Computing Frontiers	2009	DBLP DOI BibTeX RDF	graphics architecture, many-core computing, parrallel processing, processor arechitecture, software rendering
9	Hassan Shojania, Baochun Li	Pushing the Envelope: Extreme Network Coding on the GPU.	ICDCS	2009	DBLP DOI BibTeX RDF
9	Lucas Vespa, Mini Mathew, Ning Weng	P3FSM: Portable Predictive Pattern Matching Finite State Machine.	ASAP	2009	DBLP DOI BibTeX RDF
9	Mihaela Malita, Gheorghe Stefan	Integral Parallel Architecture & Berkeley's Motifs.	ASAP	2009	DBLP DOI BibTeX RDF
9	Francine Berman	Kennedy award: Laying the groundwork for success in the information age.	SC	2009	DBLP DOI BibTeX RDF
9	Sumant Tambe, Aniruddha S. Gokhale	LEESA: Embedding Strategic and XPath-Like Object Structure Traversals in C++.	DSL	2009	DBLP DOI BibTeX RDF
9	Chih-Cheng Lu, Hsin Chen	Current-Mode Computation with Noise in a Scalable and Programmable Probabilistic Neural VLSI System.	ICANN (1)	2009	DBLP DOI BibTeX RDF	Probabilistic VLSI, scalable and programmable systems, noise
9	Scott Schneider 0001, Jae-Seung Yeom, Benjamin Rose, John C. Linford, Adrian Sandu, Dimitrios S. Nikolopoulos	A comparison of programming models for multiprocessors with explicitly managed memory hierarchies.	PPoPP	2009	DBLP DOI BibTeX RDF	explicitly managed memory hierarchies, programming models, cell be
9	Gregorio Quintana-Ortí, Francisco D. Igual, Enrique S. Quintana-Ortí, Robert A. van de Geijn	Solving dense linear systems on platforms with multiple hardware accelerators.	PPoPP	2009	DBLP DOI BibTeX RDF	algorithms-by-blocks, depencency analysis, dynamic scheduling, out-of-order execution, gpus
9	Mark Woh, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner	AnySP: anytime anywhere anyway signal processing.	ISCA	2009	DBLP DOI BibTeX RDF	fully programmable architecture, high-end signal processing, single-instruction multiple-data parallelism, software defined radio, low-power architecture, simd
9	Mohit Tiwari, Hassan M. G. Wassel, Bita Mazloom, Shashidhar Mysore, Frederic T. Chong, Timothy Sherwood	Complete information flow tracking from the gates up.	ASPLOS	2009	DBLP DOI BibTeX RDF	provably sound, gate level, information flow tracking
9	Weiming Wang, Ligang Dong, Bin Zhuge	Analysis and Implementation of an Open Programmable Router Based on Forwarding and Control Element Separation.	J. Comput. Sci. Technol.	2008	DBLP DOI BibTeX RDF	open programmable, network element, architecture, protocol, computer network, router, ForCES
9	William J. Dally, James D. Balfour, David Black-Schaffer, James Chen, R. Curtis Harting, Vishal Parikh, JongSoo Park, David Sheffield	Efficient Embedded Computing.	Computer	2008	DBLP DOI BibTeX RDF
9	Fabrice Urban, Ronan Poullaouec, Jean-François Nezan, Olivier Déforges	A Flexible Heterogeneous Hardware/Software Solution for Real-Time HD H.264 Motion Estimation.	IEEE Trans. Circuits Syst. Video Technol.	2008	DBLP DOI BibTeX RDF
9	Ji-Jon Sit, Rahul Sarpeshkar	A Cochlear-Implant Processor for Encoding Music and Lowering Stimulation Power.	IEEE Pervasive Comput.	2008	DBLP DOI BibTeX RDF	fine-timing information, electrode stimulation, analog processor, phase information, music processor, neural stimulation, low power, asynchronous, cochlear implant
9	Xiangrong Zhou, Peter Petrov	Direct address translation for virtual memory in energy-efficient embedded systems.	ACM Trans. Embed. Comput. Syst.	2008	DBLP DOI BibTeX RDF	virtual memory, address translation, Low-power embedded systems
9	Zhenjiang Hu, Shin-Cheng Mu, Masato Takeichi	A programmable editor for developing structured documents based on bidirectional transformations.	High. Order Symb. Comput.	2008	DBLP DOI BibTeX RDF	Bidirectional transformation, Functional programming, View updating, Document engineering, Structured editor
9	Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. Wouters, Andreas Kanstein, Steven Dupont	Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	H.264/AVC decoder, FPGA, multimedia, embedded system, reconfigurable architecture, VLIW
9	Jonah Probell	Architecture Considerations for Multi-Format Programmable Video Processors.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	software programmable processor, hardwired processor, data tiling, SIMD, VLIW, processor architecture, multiprocessing
9	Yanmei Qu, Yun He, Shunliang Mei	A Novel Cost-Effective and Programmable VLSI Architecture of CAVLC Decoder for H.264/AVC.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	group-based VLD, VLSI, H.264/AVC, CAVLC
9	Guillermo Talavera, Murali Jayapala, Jordi Carrabina, Francky Catthoor	Address Generation Optimization for Embedded High-Performance Processors: A Survey.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	optimization, embedded, address generation
9	Glenn S. Wasson, Norm Beekwilder, David Del Vecchio, Mark M. Morgan, Marty Humphrey	Resource-oriented Computing: Design, Implementation, and Evaluation of WSRF.NET.	J. Grid Comput.	2008	DBLP DOI BibTeX RDF	stateful services, web services, Grid computing, middleware, WSRF
9	Ted Huffmire, Brett Brotherton, Timothy Sherwood, Ryan Kastner, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine	Managing Security in FPGA-Based Embedded Systems.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF
9	Yotam Livny, Michael Press, Jihad El-Sana	Interactive GPU-based adaptive cartoon-style rendering.	Vis. Comput.	2008	DBLP DOI BibTeX RDF	Cartoon rendering, Hardware acceleration, View-dependent rendering
9	Larry Seiler, Doug Carmean, Eric Sprangle, Tom Forsyth, Michael Abrash, Pradeep Dubey, Stephen Junkins, Adam T. Lake, Jeremy Sugerman, Robert Cavin, Roger Espasa, Ed Grochowski, Toni Juan, Pat Hanrahan	Larrabee: a many-core x86 architecture for visual computing.	ACM Trans. Graph.	2008	DBLP DOI BibTeX RDF	graphics architecture, many-core computing, realtime graphics, software rendering, throughput computing, visual computing, parallel processing, GPGPU, SIMD
9	Philip T. Cox, Patrick K. Nicholson	Unification of Arrays in Spreadsheets with Logic Programming.	PADL	2008	DBLP DOI BibTeX RDF	logic programming, Spreadsheet, unification, array
9	Lawrence K. Au, Winston H. Wu, Maxim A. Batalin, Thanos Stathopoulos, William J. Kaiser	Demonstration of Active Guidance with SmartCane.	IPSN	2008	DBLP DOI BibTeX RDF
9	Qing Cao, Tarek F. Abdelzaher, John A. Stankovic, Tian He 0001	The LiteOS Operating System: Towards Unix-Like Abstractions for Wireless Sensor Networks.	IPSN	2008	DBLP DOI BibTeX RDF	LiteOS, wireless sensor networks, operating system
9	P. Sudhakara Rao, A. Narmada	Fully automated commando training system.	EIT	2008	DBLP DOI BibTeX RDF
9	J. Rubén Titos Gil, Manuel E. Acacio, José Manuel García Carrasco	Characterization of Conflicts in Log-Based Transactional Memory (LogTM).	PDP	2008	DBLP DOI BibTeX RDF	abort, Transactional Memory, hardware, conflict
9	Torsten Hoefler, Florian Lorenzen, Andrew Lumsdaine	Sparse Non-blocking Collectives in Quantum Mechanical Calculations.	PVM/MPI	2008	DBLP DOI BibTeX RDF
9	George Bosilca	The Next Frontier.	PVM/MPI	2008	DBLP DOI BibTeX RDF
9	Shahana Thottathikkulam Kassim, Babita R. Jose, Rekha K. James, K. Poulose Jacob, Sreela Sasi	RNS Based Programmable Multi-Mode Decimation Filter for WCDMA and WiMAX.	VTC Spring	2008	DBLP DOI BibTeX RDF
9	Jennifer B. Sartor, Martin Hirzel, Kathryn S. McKinley	No bit left behind: the limits of heap data compression.	ISMM	2008	DBLP DOI BibTeX RDF	compression, heap
9	Bastian Ristau, Torsten Limberg, Gerhard P. Fettweis	A Mapping Framework for Guided Design Space Exploration of Heterogeneous MP-SoCs.	DATE	2008	DBLP DOI BibTeX RDF
9	Francesco D'Ascoli, Luca Bacciarelli, Massimiliano Melani, Luca Fanucci, G. Ricotti, Enrico Pardi, Federico Vincis, Massimiliano Forliti, Marco De Marinis	A Programmable and Low-EMI Integrated Half-Bridge Driver in BCD Technology.	DATE	2008	DBLP DOI BibTeX RDF
9	John McGlone, Alan Marshall 0001, Roger F. Woods	A real-time flow monitor architecture encompassing on-demand monitoring functions.	NOMS	2008	DBLP DOI BibTeX RDF
9	Luca Bassi, Enrico Boni, Andrea Cellai, Alessandro Dallai, Francesco Guidi, Stefano Ricci, Piero Tortoli	A Novel Digital Ultrasound System for Experimental Research Activities.	DSD	2008	DBLP DOI BibTeX RDF
9	Jeffrey Kuskin, Cliff Young, J. P. Grossman, Brannon Batson, Martin M. Deneroff, Ron O. Dror, David E. Shaw	Incorporating flexibility in Anton, a specialized machine for molecular dynamics simulation.	HPCA	2008	DBLP DOI BibTeX RDF
9	KyungHo Kim	Best ways to use billions of devices on a wireless mobile SoC.	ASP-DAC	2008	DBLP DOI BibTeX RDF
9	Bruno Bougard, Min Li 0001, David Novo, Liesbet Van der Perre, Francky Catthoor	Bridging the energy gap in size, weight and power constrained software defined radio: Agile baseband processing as a key enabler.	ICASSP	2008	DBLP DOI BibTeX RDF
9	Natalia Kryvinska, Christine Strauss, Lukas Auer, Peter Zinterhof	Hierarchical Modelling and an Approximate Analysis of Parallel Queues Models to the NGN SCEs.	FIS	2008	DBLP DOI BibTeX RDF	Next Generation Network (NGN), Queuing theory, Hierarchical modeling, Parallel queues, Service Creation Environment (SCE)
9	Kalyan S. Perumalla, Brandon G. Aaby	Data parallel execution challenges and runtime performance of agent simulations on GPUs.	SpringSim	2008	DBLP DOI BibTeX RDF	graphical processing units, parallel simulation, agent-based simulation, emergent behavior, large-scale simulation
9	Young-Su Kwon, Bontae Koo, Nak-Woong Eum	Application-adaptive reconfiguration of memory address shuffler for FPGA-embedded instruction-set processor.	FPL	2008	DBLP DOI BibTeX RDF
9	Konstantine Arkoudas, Selmer Bringsjord	Toward Formalizing Common-Sense Psychology: An Analysis of the False-Belief Task.	PRICAI	2008	DBLP DOI BibTeX RDF
9	Naveen K. Yanduru	Highly integrated, re-configurable RF front-ends in deep sub-micron CMOS: (with an example of a WCDMA, GSM/GPRS/EDGE receiver without inter-stage SAW filter).	SBCCI	2008	DBLP DOI BibTeX RDF	RF design
9	N. Fujimoto	Faster matrix-vector multiplication on GeForce 8800GTX.	IPDPS	2008	DBLP DOI BibTeX RDF
9	Fabio Campi, Luca Ciccarelli, Claudio Mucci	Sustainable (re-) configurable solutions for the high volume SoC market.	IPDPS	2008	DBLP DOI BibTeX RDF
9	Afshin Niktash, Hooman Parizi, Amir Hosein Kamalizad, Nader Bagherzadeh	RECFEC: A Reconfigurable FEC Processor for Viterbi, Turbo, Reed-Solomon and LDPC Coding.	WCNC	2008	DBLP DOI BibTeX RDF
9	Seung-Hun Yoo, Yun-Seok Lee, Sung-Up Jo, Chang-Sung Jeong	GPU Implementation of a Clustering Based Image Registration.	ICIC (1)	2008	DBLP DOI BibTeX RDF	Clustering, GPU, Image registration
9	Antonio Carlos Schneider Beck, Mateus B. Rutzig, Georgi Gaydadjiev, Luigi Carro	Run-time Adaptable Architectures for Heterogeneous Behavior Embedded Systems.	ARC	2008	DBLP DOI BibTeX RDF
9	Ahmed M. Amin, Mithuna Thottethodi, T. N. Vijaykumar, Steven Wereley, Stephen C. Jacobson	Automatic volume management for programmable microfluidics.	PLDI	2008	DBLP DOI BibTeX RDF	fluid volume management, programmable lab on a chip, microfluidics
9	Rhushabh Goradia, Prekshu Ajmera, Sharat Chandran	GPU-Based Hierarchical Computations for View Independent Visibility.	ICVGIP	2008	DBLP DOI BibTeX RDF
9	Torsten Hoefler, Andrew Lumsdaine	Overlapping Communication and Computation with High Level Communication Routines.	CCGRID	2008	DBLP DOI BibTeX RDF	non-blocking collective communication, MPI, program optimization, Overlap
9	Luís D. Pedrosa, Pedro Melo, Rui Manuel Rocha, Rui Neves 0001	A Flexible Approach to WSN Deployment.	ICCCN	2008	DBLP DOI BibTeX RDF
9	Mauro Tiziani, Nicola Massari, Syed A. Jawed, Massimo Gottardi	A self-adapting high dynamic-range visual representation algorithm for AER imagers.	ISCAS	2008	DBLP DOI BibTeX RDF
9	Juan M. Carrillo, J. Francisco Duque-Carrillo, Guido Torelli	1-V continuously tunable CMOS bulk-driven transconductor for Gm-C filters.	ISCAS	2008	DBLP DOI BibTeX RDF
9	Dieter Brückmann	Design and realization of continuous-time wave digital filters.	ISCAS	2008	DBLP DOI BibTeX RDF
9	Hong-Wei Huang, Wei-Lun Hsieh, Ke-Horng Chen	Programmable voltage-to-current converter with linear voltage control resistor.	ISCAS	2008	DBLP DOI BibTeX RDF
9	Ravi Kumar Satzoda, Ramya Muralidharan, Chip-Hong Chang	Programmable LSB-first and MSB-first modular multipliers for ECC in GF(2m).	ISCAS	2008	DBLP DOI BibTeX RDF
9	Alexey Lopich, Piotr Dudek	ASPA: Focal Plane digital processor array with asynchronous processing capabilities.	ISCAS	2008	DBLP DOI BibTeX RDF
9	Shahana Thottathikkulam Kassim, Babita R. Jose, Rekha K. James, K. Poulose Jacob, Sreela Sasi	Dual-mode RNS based programmable decimation filter for WCDMA and WLANa.	ISCAS	2008	DBLP DOI BibTeX RDF
9	Shuo Wang, Jianwei Dai, El-Sayed A. M. Hasaneen, Lei Wang 0003, Faquir C. Jain	Programmable threshold voltage using quantum dot transistors for low-power mobile computing.	ISCAS	2008	DBLP DOI BibTeX RDF
9	Takayuki Onishi, Takashi Sano, Koyo Nitta, Mitsuo Ikeda, Jiro Naganuma	Multi-reference and multi-block-size motion estimation with flexible mode selection for professional 4: 2: 2 H.264/AVC encoder LSI.	ISCAS	2008	DBLP DOI BibTeX RDF
9	Yousr M. Abdelmaksoud, Khaled M. Sharaf	A varactorless technique for tuning LC oscillators based on loop gain adjustment.	ISCAS	2008	DBLP DOI BibTeX RDF
9	Wei Wu, Hai-Bing Su, Qin-Zhang Wu	A High Performance Serial ATA Host Controller.	CSSE (4)	2008	DBLP DOI BibTeX RDF
9	Ziyi Liu, Wenjing Ma	Exploiting Computing Power on Graphics Processing Unit.	CSSE (2)	2008	DBLP DOI BibTeX RDF
9	Xin Zhao, Ahmet T. Erdogan, Tughrul Arslan	OFDM symbol timing synchronization system on a Reconfigurable Instruction Cell Array.	SoCC	2008	DBLP DOI BibTeX RDF
9	Mark Hammerquist, Roman L. Lysecky	Design space exploration for application specific FPGAS in system-on-a-chip designs.	SoCC	2008	DBLP DOI BibTeX RDF
9	Marcos B. S. Tavares, Steffen Kunze, Emil Matús, Gerhard P. Fettweis	Architecture and VLSI realization of a high-speed programmable decoder for LDPC convolutional codes.	ASAP	2008	DBLP DOI BibTeX RDF
9	Mythri Alle, Keshavan Varadarajan, Ramesh C. Ramesh, Joseph Nimmy, Alexander Fell, Adarsha Rao, S. K. Nandy 0001, Ranjani Narayan	Synthesis of application accelerators on Runtime Reconfigurable Hardware.	ASAP	2008	DBLP DOI BibTeX RDF
9	Su-Jun Li, Ling-Da Wu	GPU-Based Simulation of Large-Scope Ocean Wave.	MUE	2008	DBLP DOI BibTeX RDF
9	Sebastian Fischmeister, Insup Lee 0001, Robert Trausmuth	Hardware acceleration for verifiable, adaptive real-time communication.	ETFA	2008	DBLP DOI BibTeX RDF
9	Dennis Hofheinz, Eike Kiltz	Programmable Hash Functions and Their Applications.	CRYPTO	2008	DBLP DOI BibTeX RDF
9	Shane Ryoo, Christopher I. Rodrigues, Sara S. Baghsorkhi, Sam S. Stone, David Blair Kirk, Wen-mei W. Hwu	Optimization principles and application performance evaluation of a multithreaded GPU using CUDA.	PPoPP	2008	DBLP DOI BibTeX RDF	parallel computing, GPU computing
9	Qihang Huang, Zhiyi Huang 0001, Paul Werstein, Martin K. Purvis	GPU as a General Purpose Computing Resource.	PDCAT	2008	DBLP DOI BibTeX RDF
9	Myoung-Cheol Shin, In-Cheol Park	SIMD Processor-Based Turbo Decoder Supporting Multiple Third-Generation Wireless Standards.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
9	Chung-Kai Chen, Yu-Hao Chang, Yu-Tin Chen, Chih-Chieh Yang, Jenq Kuen Lee	Switching supports for stateful object remoting on network processors.	J. Supercomput.	2007	DBLP DOI BibTeX RDF	.NET Remoting, Load-balancing scheduler, Grid computing, Distributed computing, Network processor
9	Weiguo Liu, Bertil Schmidt, Gerrit Voss, Wolfgang Müller-Wittig	Streaming Algorithms for Biological Sequence Alignment on GPUs.	IEEE Trans. Parallel Distributed Syst.	2007	DBLP DOI BibTeX RDF	dynamic programming, graphics hardware, GPGPU, multiple sequence alignment, Streaming architectures, pairwise sequence alignment
9	Oriana Riva, Cristian Borcea	The Urbanet Revolution: Sensor Power to the People!	IEEE Pervasive Comput.	2007	DBLP DOI BibTeX RDF	sensor networks, distributed systems, mobile computing, ubiquitous computing, mobile applications, distributed programming
9	Tiago R. Balen, José Vicente Calvano, Marcelo Lubaszewski, Michel Renovell	Built-In Self-Test of Field Programmable Analog Arrays based on Transient Response Analysis.	J. Electron. Test.	2007	DBLP DOI BibTeX RDF	Analog built-in self-test, Transient response analysis, FPAA
9	Weiguo Liu, Bertil Schmidt, Wolfgang Müller-Wittig	Performance Analysis of General-Purpose Computation on Commodity Graphics Hardware: A Case Study Using Bioinformatics.	J. VLSI Signal Process.	2007	DBLP DOI BibTeX RDF	dynamic programming, graphics hardware, performance prediction, GPGPU, pairwise sequence alignment
9	Fei Su, Jun Zeng	Computer-Aided Design and Test for Digital Microfluidics.	IEEE Des. Test Comput.	2007	DBLP DOI BibTeX RDF	digital microfluidics, simulation, test, computer-aided design, CAD, reconfiguration, synthesis
9	Andreas Hansson 0001, Kees Goossens	Trade-offs in the Configuration of a Network on Chip for Multiple Use-Cases.	NOCS	2007	DBLP DOI BibTeX RDF
9	Kyueun Yi, Jean-Luc Gaudiot	Architectural Implications of Cache Coherence Protocols with Network Applications on Chip MultiProcessors.	NPC	2007	DBLP DOI BibTeX RDF
9	Woongki Baek, Chi Cao Minh, Martin Trautmann, Christos Kozyrakis, Kunle Olukotun	The OpenTM Transactional Application Programming Interface.	PACT	2007	DBLP DOI BibTeX RDF
9	Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin 0002, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner	The Next Generation Challenge for Software Defined Radio.	SAMOS	2007	DBLP DOI BibTeX RDF
9	Thomas Schuster, Bruno Bougard, Praveen Raghavan, Robert Priewasser, David Novo, Liesbet Van der Perre, Francky Catthoor	Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals.	SAMOS	2007	DBLP DOI BibTeX RDF
9	Arndt Bode	High Performance Computing in the Multi-core Area.	ISPDC	2007	DBLP DOI BibTeX RDF
9	Jing Fu 0003, Olof Hagsand, Gunnar Karlsson	Queuing Behavior and Packet Delays in Network Processor Systems.	MASCOTS	2007	DBLP DOI BibTeX RDF	queueing behavior, network processor, router
9	George Bosilca	The X-Scale Challenge.	PVM/MPI	2007	DBLP DOI BibTeX RDF
9	Tiago R. Balen, Fernanda Lima Kastensmidt, Marcelo Lubaszewski, Michel Renovell	Single Event Upset in SRAM-based Field Programmable Analog Arrays: Effects and Mitigation.	ISVLSI	2007	DBLP DOI BibTeX RDF