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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 1693 occurrences of 1230 keywords
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Results
Found 7065 publication records. Showing 7062 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
26 | |
Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010 ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![IEEE Computer Society, 978-0-7695-3978-2 The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
26 | Byung Hoon Na, Kwang Mo Park, Sooraj R., Bong Kyu Jeong, Young Min Song, Yong Tak Lee, Chang-Soo Park |
Design, Fabrication and Characterization of Asymmetric Fabry-Perot Modulator for Large Size Optical Shutter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 35-38, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Electroabsorption modulator, quantum confined Stark effect, asymmetric Fabry-Perot cavity, multiple quantum well, 3D image |
26 | Manuel J. Barragan Asian, Gloria Huertas, Adoración Rueda, José Luis Huertas |
(Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 8-13, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Wei-Yuan Chiu, Jiun-Wei Horng, Hung Lee, Chen-Chuan Huang |
DVCC-Based Voltage-Mode Biquadratic Filter with High-Input Impedance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 121-125, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
universal biquad, current conveyor, active filter |
26 | Cuong Pham-Quoc, Anh-Vu Dinh-Duc |
Hazard-free Muller Gates for Implementing Asynchronous Circuits on Xilinx FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 289-292, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Dalila Salhi, Balwant Godara |
A 75dB-gain Low-power, Low-noise Amplifier for Low-frequency Bio-signal Recording. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 51-53, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
bio-amplifier, bio-signals, low frequency, low-power, Analog design, biomedical application, OTA, low-noise |
26 | Chacko John Deepu, Xiaoyuan Xu, Xiaodan Zou, Libin Yao, Yong Lian 0001 |
An ECG-on-Chip for Wearable Cardiac Monitoring Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 225-228, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
QRS detection, ECG-on-Chip, Low Power design, Wearable devices, Electrocardiography |
26 | Qingzheng Li, Guixuan Liang, Amine Bermak |
A High-speed 32-bit Signed/Unsigned Pipelined Multiplier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 207-211, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
signed/unsigned multiplier, fast adder, Booth Encoding, Wallace Tree |
26 | Janusz Sosnowski, Lukasz Tupaj |
CPU Testability in Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 108-112, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
CPU testing, embedded systems, testability, software-based-self-test |
26 | Gustavo Pamplona Rehder, Salvador Mir, Libor Rufer, Emmanuel Simeu, Hoang Nam Nguyen |
Low Frequency Test for RF MEMS Switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 350-354, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
RF MEMS, low frequency test, switch, S-Parameters |
26 | Yuan Cao 0003, Fang Tang, Amine Bermak, Thinh M. Le |
A Smart CMOS Image Sensor with On-chip Hot Pixel Correcting Readout Circuit for Biomedical Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 103-107, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
hot pixel correction, biomedical applications, CMOS image sensor |
26 | Toshinobu Matsuba, Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada |
Aggressive Register Unsharing Based on SSA Transformation for Clock Enhancement in High-Level Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 87-92, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
static single assignment transformation, high-level synthesis, multiplexer |
26 | Xuan-Thang Vu, Nguyen Anh Duc, Trinh Anh Vu |
16-QAM Transmitter and Receiver Design Based on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 95-98, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
FGPA design, Carrier Synchronization, Symbol Recovery, 16-QAM Modulation |
26 | Dimitar Nikolov, Urban Ingelsson, Virendra Singh, Erik Larsson |
Estimating Error-probability and its Application for Optimizing Roll-back Recovery with Checkpointing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 281-285, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
roll-back recovery with checkpointing, error-probability estimation, optimization |
26 | Linwei Niu |
Leakage-Aware Scheduling for (m, k)-Firm Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 63-, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
26 | Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard 0001, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine |
Impact of Resistive-Bridging Defects in SRAM Core-Cell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 265-269, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
core-cell, resistive-bridging defects, SRAM |
26 | Donald G. Bailey, Christopher T. Johnston |
Algorithm Transformation for FPGA Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 77-81, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
FPGA, algorithm, architecture, compilation, hardware description languages, automated design |
26 | Alberto Bosio, Patrick Girard 0001, Serge Pravossoudovitch, Paolo Bernardi, Matteo Sonza Reorda |
An Exact and Efficient Critical Path Tracing Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 164-169, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Fault models, Fault Simulation, Critical Path Tracing |
26 | Mark S. K. Lau, Keck Voon Ling, Yun-Chung Chu, Arun Bhanu |
Modeling of Probabilistic Ripple-Carry Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 201-206, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
ripple-carry adder, noies modeling, error propagation, Probabilistic computation |
26 | Peter J. Green, Desmond P. Taylor |
FPGA Implementation of a Real Time Maximum Likelihood Space-Time Decoder on a MIMO Software Radio Test Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 139-143, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Alamouti, maximum likelihood decoder, software radio test platform, FPGA, MIMO, real-time implementation |
26 | Trong Tu Bui, Tadashi Shibata |
A Low-Power Associative Processor with the R-th Nearest-Match Hamming-Distance Search Engine Employing Time-Domain Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 54-57, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
time-domain techniques, ROF, Hamming distance, CAM, associative processor |
26 | Yannick Bornat, Matthieu Raoux, Youssef Boutaib, Fabrice Morin, Gilles Charpentier, Jochen Lang 0002, Sylvie Renaud |
Detection of Electrical Activity of Pancreatic Beta-cells Using Micro-electrode Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 233-236, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Micro-electrode arrays, Closed-loop insulin delivery, Biosensors |
26 | Abhishek Pathak, Sushanta K. Mandal, Raj Kumar Nagpal, Rakesh Malik |
Modelling of Power Distribution Network and Decoupling Network Design for High Speed VLSI Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 194-, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
26 | Tomoo Inoue, Nobukazu Izumi, Yuki Yoshikawa, Hideyuki Ichihara |
A Fast Threshold Test Generation Algorithm Based on 5-Valued Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 345-349, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
acceptable faults, threshold test generation, error significance, 5-valued logic, PODEM |
26 | Paul Beckett, Heiko Rudolph |
Run. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 245-249, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
low power computer architecture, modeling, SOI, VHDL-AMS, double gate |
26 | Adam Burdeniuk, Kiet N. To, Cheng-Chew Lim, Michael J. Liebelt |
An Event-Assisted Sequencer to Accelerate Matrix Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 158-163, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
macroinstructions, event mechanism, sequencing, acceleration, Matrix |
26 | N. Khalid, Jugdutt Singh, Hai Phuong Le, Kriyang Shah, John Devlin, Z. Sauli |
Very High Q, NEMS Inductor for 12GHz Wireless Sensor Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 319-324, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
High Q inductor, Micro/Nano Electro-Mechanical Systems (MEMS/NEMS), Silicon-on-sapphire |
26 | Loren Nolan, Moi-Tin Chew, Serge N. Demidenko, Melanie Po-Leen Ooi |
Virtual Instrumentation Based IC Parametric Tester for Engineering Education. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 310-315, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Electronic education, functional testing, data acquisition, virtual instrumentation, parametric testing |
26 | Dinh Sy Hien |
Development of Quantum Device Simulator, NEMO-VN2. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 170-173, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
quantum device simulator, phonon scattering, planar CNTFET, coaxial CNTFET |
26 | Julien Villemejane, Guillaume Mottet, Olivier Français, Bruno Le Pioufle, Jean-Pierre Lefevre, Marion Woytasik, Elisabeth Dufour-Gergam, Lluis M. Mir |
Nanomanipulation of Living Cells on a Chip Using Electric Field: General Concepts and Microdevices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 229-232, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
electric field, electropermeabilization, dielectrophoresis, cell therapy, biochip |
26 | Christopher T. Johnston, Donald G. Bailey, Paul J. Lyons |
Notations for Multiphase Pipelines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 212-216, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
FPGA, Visual Languages, Hardware Description Languages |
26 | Stephen Paul van der Velden, Jugdutt Singh |
Reconfigurable multivariable MEMS sensor array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 325-329, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
SHM, sensor, reconfigurable, UAV, array, MEMS |
26 | Zeng Lertmanorat, Dominique M. Durand |
Integrated Multiplexer for Nerve Electrodes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 237, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Flat interface nerve electrode (FINE), functional electrical stimulation (FES), neural prostheses, selective stimulation |
26 | Chun Wei Lin, Sheng-Feng Lin, Chi Fu Wang |
Wide Band Linear Voltage-to-Current Converter Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 115-120, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
voltage to current converter (VIC), mobility degradation, transconductance, PSRR |
26 | Zwikamu Dubani, Ben Soh, Chris Seeling |
A Novel Design Framework for Business Process Modelling in Automotive Industry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 250-255, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Business Process Modelling, BPEL |
26 | Tezaswi Raja, Samiha Mourad |
Digital Logic Implementation in Memristor-Based Crossbars - A Tutorial. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 303-309, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
memristor, crossbar, logical implication |
26 | Amara Amara, Bastien Giraud, Olivier Thomas |
An Innovative 6T Hybrid SRAM Cell in sub-32 nm Double-Gate MOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 241-244, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
SRAM cell, Planar Double-Gate (DG), Fully Depleted SOI (FD-SOI), read and write tradeoffs, Ultra Low Voltage (ULV) |
26 | Chih-Sheng Hou, Jin-Fu Li 0001, Che-Wei Chou |
Test and Repair Scheduling for Built-In Self-Repair RAMs in SOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 3-7, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
test, test scheduling, repair, RAM, built-in self-repair |
26 | Ho Pham Huy Anh, Nguyen Huu Phuc |
Inverse Neural MIMO NARX Model Identification of Nonlinear System Optimized with PSO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 144-149, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
pneumatic artificial muscle (PAM), 2-axes PAM robot arm, neural Inverse Dynamic MIMO NARX (Neural IDMN) model, modelling and identification, Particle Swarm optimisation (PSO) algorithm |
26 | Raghu Sunnadkal, Ben Soh, Hien Phan |
A Four-Stage Design Approach Towards Securing a Vehicular Ad Hoc Networks Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 177-182, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Security, VANETs |
26 | Jongwoo Jun, Jinyi Lee, Jaesun Lee |
The Discrimination of Metallic Coins Using a Scan Type Magnetic Camera. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 355-359, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
discrimination of metallic coin, Hall sensor array, magnetic flux leakage, induced current |
26 | Tsuyoshi Iwagaki, Mineo Kaneko |
A Pseudo-Boolean Technique for Generating Compact Transition Tests with All-Output-Propagation Properties. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 293-296, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
pseudo-Boolean model, all-output-propagation (AOP), test set reduction, transition fault |
26 | Hans G. Kerkhoff, Xiao Zhang 0002 |
Design of an Infrastructural IP Dependability Manager for a Dependable Reconfigurable Many-Core Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 270-275, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
DfX, reliability, SoC, dependability, reconfiguration, availability, BIST, many-core processors |
26 | A. Price, R. Rimington, Moi-Tin Chew, Serge N. Demidenko |
Project-Based Learning in Robotics and Electronics in Undergraduate Engineering Program Setting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 188-193, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
electrical and electronic design, instrumentation and measurement, robotics competition, robotics, sensing |
26 | Young Jin Park, Hong Jun Choi, Cheol Hong Kim, Jong-Myon Kim |
Energy-aware Filter Cache Architecture for Multicore Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 58-62, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
energy consumption, multicore processor, instruction cache, victim cache, filter cache |
26 | Thuong Le-Tien, Dien Vo-Ngoc, Lan Ngo-Hoang, Sungyoung Lee |
Independent Component Analysis Applied to Watermark Extraction and its Implemented Model on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 71-76, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Psychoacoustic masking, Spartan-3, FPGA, ICA, Audio watermarking, LSB |
26 | Huu Phu Bui, Le Khoa Dang, Anh Vinh Nguyen |
Channel Auto-Correlation and Doppler Spectrum of MIMO Systems Using Circular Array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 135-138, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Doppler spectrum, Channel correlation, Circular array, MIMO systems |
26 | Diem Tran, Thi To, Thuan Huynh, Phuong Nguyen |
Designing a Harware Accelerator for Face Recognition Using Vector Quantization and Principal Component Analysis as a Component of SoPC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 82-86, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
DSP using FPGA, Face Recognition, PCA, Vector Quantization, Hardware Accelerator, SoPC |
26 | Arun Bhanu, Mark S. K. Lau, Keck Voon Ling, Vincent John Mooney III, Anshul Singh |
A More Precise Model of Noise Based PCMOS Errors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 99-102, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | Thinh Ngoc Tran, Surin Kittitornkun |
Massively Parallel Cuckoo Pattern Matching Applied for NIDS/NIPS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 217-221, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
NIDS/NIPS, FPGA, Pattern Matching, Massively Parallel Processing, Cuckoo Hashing |
26 | Thuong Le-Tien, Vu Phung-The |
Routing and Tracking System for Mobile Vehicles in Large Area. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 297-300, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
ARM Cortex M3, WMP100, YAS529, KXSC72050, GPS, GSM, Google Map |
26 | Andreas Habegger, Andreas Stahel, Josef Goette, Marcel Jacomet |
An Efficient Hardware Implementation for a Reciprocal Unit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 183-187, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Arithmetic inversion, polynomial initialization, Nelder-Mead, reciprocal, hardware algorithm, Newton-Raphson |
26 | Fang Tang, Amine Bermak |
Read-out Circuit Analysis for High-speed Low-noise VCO Based APS CMOS Image Sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 330-335, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
APS imager, high speed, CMOS image sensor, low noise |
26 | Jian Wei Cheng, Melanie Po-Leen Ooi, Chris Chan, Ye Chow Kuang, Serge N. Demidenko |
Evaluating the Performance of Different Classification Algorithms for Fabricated Semiconductor Wafers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 360-366, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
data mining, clusters, classification, recognition, feature, classifier, defects |
26 | Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman |
Fast Fault Simulation for Extended Class of Faults in Scan Path Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 14-19, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
extended fault classes, parallel exact critical path tracing, fault simulation, digital circuits, fault analysis |
26 | Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre |
Evaluation of Resistance to Differential Power Analysis: Execution Time Optimizations for Designers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 256-261, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
DPA Robustness Evaluation, Design of secure devices |
26 | Hoang-Anh Pham, Van-Hieu Bui, Anh-Vu Dinh-Duc |
An Adaptive Huffman Decoding Algorithm for MP3 Decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 153-157, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Huffman decoding, Single-side growing Huffman coding |
26 | Hiroshi Iwata, Satoshi Ohtake, Hideo Fujiwara |
Enabling False Path Identification from RTL for Reducing Design and Test Futileness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 20-25, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
path mapping, false path, functional equivalence, high level testing |
26 | David Fitrio, Goran Panjkovic, Suhardi Tjoa, Andrew Berry 0003 |
Modelling, Simulation and Design of Front End Electronics for Radiation Detectors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 336-, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
26 | Melanie Po-Leen Ooi, Chris Chan, Wey Jean Tee, Ye Chow Kuang, Lindsay Kleeman, Serge N. Demidenko |
Fast and Accurate Automatic Defect CLuster Extraction for Semiconductor Wafers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 276-280, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
data mining, clusters, segmentation, detection, defects |
26 | Andrew Gilman, Donald G. Bailey, Stephen Marsland |
Least-squares Optimal Interpolation for Fast Image Super-resolution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 29-34, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
non-uniform interpolation, image reconstruction, least squares, super-resolution, image fusion, resampling |
26 | Soheil Ziabakhsh, Majid Ebrahimian |
A 1.5-V, 2.4-GHz-Band CMOS Low-Noise Amplifier with Modified Input Matching Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 126-, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
26 | Ka Lai Lau, Sylvain Léomant, Amine Bermak |
A Hybrid CMOS DPS with Conditional Data Readout Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 44-47, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
DPS, conditional readout, PWM |
26 | |
4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008 ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![IEEE Computer Society, 978-0-7695-3110-6 The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP BibTeX RDF |
|
26 | Jongsoo Yim, Gunbae Kim, Incheol Nam, Sangki Son, Jonghyoung Lim, Hwacheol Lee, Sangseok Kang, Byungheon Kwak, Jinseok Lee, Sungho Kang |
A Prevenient Voltage Stress Test Method for High Density Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 516-520, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
voltage stress test, acceleration factor, burn-in test, junction temperature, constant voltage stress, voltage ramp stress, reliability |
26 | Camel Tanougast, Serge Weber, Gilles Millerioux, Jamal Daafouz, Ahmed Bouridane |
VLSI Architecture and FPGA Implementation of a Hybrid Message-Embedded Self-Synchronizing Stream Cipher. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 386-389, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Cryptography system, self-synchronising stream cipher, FPGA, VLSI design |
26 | Amir Zjajo, José Pineda de Gyvez |
Calibration and Debugging of Multi-step Analog to Digital Converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 512-515, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multi-step ADC, debugging, calibration, design-for-test |
26 | Alessio Montone, Marco D. Santambrogio, Donatella Sciuto |
A Design Workflow for the Identification of Area Constraints in Dynamic Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 450-453, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Area Constraints, Dynamic Reconfigurable System |
26 | Raimund Ubar, Sergei Devadze, Maksim Jenihhin, Jaan Raik, Gert Jervan, Peeter Ellervee |
Hierarchical Calculation of Malicious Faults for Evaluating the Fault-Tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 222-227, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
high-level decision diagrams, fault tolerance, fault simulation |
26 | Dongchul Kim, Taehoon Kim, Jung-A Lee, Yungseon Eo |
Experimental Characterisations of Coupled Transmission Lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 262-265, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
interconnect lines, signal transient, crosstalk, transmission line, s-parameters |
26 | Byung-Heon Kang, Dong-Ho Lee, Chun-Pyo Hong |
High-Performance Pseudorandom Number Generator Using Two-Dimensional Cellular Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 597-602, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Isabell Jahnich, Ina Podolski, Achim Rettberg |
Integrating Dynamic Load Balancing Strategies into the Car-Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 435-440, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Load Balancing, Middleware, Automotive Systems, Task Distribution |
26 | Weibo Hu, Chung Len Lee 0001, Xin'an Wang |
Arbitrary Waveform Generator Based on Direct Digital Frequency Synthesizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 567-570, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Xiaojun Zhang, Jiangtao Xi, Yanguang Yu, Joe F. Chicharo |
The Fourier Spectrum Analysis of Optical Feedback Self-Mixing Signal under Weak and Moderate Feedback. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 491-495, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Optical Feedback Self-Mixing interferometry, Fourier transforms, Spectral analysis |
26 | Chi-Hao Wu 0001 |
Multi-Phase Charge Pump Generating Positive and Negative High Voltages for TFT-LCD Gate Driving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 179-183, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
regulated charge pump, TFT-LCD gate driver |
26 | Bei Cao, Liyi Xiao, Yongsheng Wang |
A Low Power Deterministic Test Pattern Generator for BIST Based on Cellular Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 266-269, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Shrutisagar Chandrasekaran, Abbes Amira |
High Performance FPGA Implementation of the Mersenne Twister. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 482-485, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
RC1000, FPGA, Mersenne Twister, Handel C |
26 | Matthew J. Baker, Jingtai Xi, Joe F. Chicharo |
Elimination of Gamma Non-linear Luminance Effects for Digital Video Projection Phase Measuring Profilometers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 496-501, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Gamma, Non-linear Luminance, Fringe, Profilometry, PMP, Digital, Harmonics, Focusing, Defocus |
26 | Christopher T. Johnston, Paul J. Lyons, Donald G. Bailey |
A Visual Notation for Processor and Resource Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 296-301, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Hardware design Languages, FPGA, Image Processing, Finite state machines, Visual Languages |
26 | Charles Thangaraj, Tom Chen 0001 |
Early Design Phase Power Performance Trade-Offs Using In-Situ Macro Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 539-544, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
pareto-front, What-if analysis, Power-performance trade-off |
26 | Sang Gyun Kim, Woo Sik Kim, Seung Ho Ok, Byung In Moon |
High-Speed Priority Queue Architecture for Multiple Out Links. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 410-414, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Quality of Service, Priority Queue |
26 | Jianhua Feng, Guoliang Li |
A Test Data Compression Method for System-on-a-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 270-273, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
FDR code, Hybrid Run-length code, MFDR code, Test data compression |
26 | Stefan Lachowicz, Hans-Jörg Pfleiderer |
Fast Evaluation of the Square Root and Other Nonlinear Functions in FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 474-477, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
FPGA, square root, nonlinear function |
26 | Ki-Jin Kim, Kwang-Ho Ahn, T. H. Lim |
Low Phase Noise Bond Wire VCO for DVB-H. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 103-106, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
bond wire, low phase noise, DVB-H |
26 | Helene Schilke, Achim Rettberg, Florian Dittmann 0001 |
Towards a Petri Net Based Approach to Model and Synthesise Dynamic Reconfiguration for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 561-566, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Model-based Design Flow, FPGA, Petri-net, Dynamic Reconfiguration |
26 | JinKyung Kim, Sung-Kyu Jung, Ji-Hoon Jung, Sang-Kyung Sung, Kang-Yoon Lee, Chul Nam, Bong Hyuk Park, Sang-Sung Choi |
A Design of the Frequency Synthesizer for UWB Application in 0.13 µm RF CMOS Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 441-445, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
single-sideband (SSB) mixer, UWB, phase-locked loop (PLL), Frequency Synthesizer |
26 | Michael Yap San Min, Philippe Maurine, Magali Bastian, Michel Robert |
A Novel Dummy Bitline Driver for Read Margin Improvement in an eSRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 107-110, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
dummy bitline driver, self-timed memory, low power, SRAM, statistical design |
26 | Do Joon Jung, Kyung Su Kwon, Se Hyun Park, Jong Bae Kim, Hang Joon Kim |
Model-Based Gaze Direction Estimation in Office Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 470-473, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Gaze Direction Estimation, Overlapped Elliptical Head Model, Bayesian Network |
26 | Wing-Man Tang, Cheung H. Leung, Pui-To Lai |
Effects of Insulator Thickness on the Sensing Properties of MISiC Schottky-Diode Hydrogen Sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 171-174, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Hydrogen sensor, silicon carbide, SiO2 |
26 | Hyun Min Choi, Chun Pyo Hong, Chang Hoon Kim |
High Performance Elliptic Curve Cryptographic Processor Over GF(2^163). ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 290-295, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Cryptographic Processor, VLSI, Finite Field, Elliptic Curve Cryptosystem, Gaussian Normal Basis |
26 | Kyu-Yeul Wang, Seung-Yerl Lee, Byung-Soo Kim, Sang-Seol Lee, Jae-Yeon Song, Dong-Sun Kim 0002, Duck-Jin Chung |
Robust JPEG2000 Image Transmission over IEEE 802.15.4. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 253-257, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
UEP, AUEP, FEC, IEEE 802.15.4, JPEG2000 |
26 | D. Meena, L. G. M. Prakasam |
FPGA Based Real Time Solution for Sensitivity Time Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 244-248, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Sensitivity Time Control, FPGA, CORDIC, Attenuation |
26 | Farid Flitti, Aïcha Far, Bin Guo 0011, Amine Bermak |
Drift Invariant Gas Recognition Technique for On Chip Tin Oxide Gas Sensor Array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 421-424, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Gasrecognition, Vector angle, Electronic nose, Drift |
26 | Da Wang, Rui Li, Yu Hu 0001, Huawei Li 0001, Xiaowei Li 0001 |
A Case Study on At-Speed Testing for a Gigahertz Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 326-331, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
test power consumption, test coverage, at-speed testing, test time, test data volume |
26 | Fei Wang, Yu Hu 0001, Xiaowei Li 0001 |
Adaptive Diagnostic Pattern Generation for Scan Chains. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 129-132, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
very large scale integration (VLSI), testing, diagnosis, Boolean satisfiability, scan chain |
26 | Yaohua Yu, Zhengjie Liu |
Research on System Usability of Digital Libraries in China. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 95-98, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
System Usability, Digital Libraries, Usability Evaluation |
26 | Zsófia Ruttkay, Ton J. Mouthaan |
CreaTe: A New Programme to Attract Engineers as Design Artists. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 592-596, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
creative technology, education, interaction design, industrial design |
26 | Fabian Diet, Erik H. D'Hollander, Kristof Beyls, Harald Devos |
Embedding Smart Buffers for Window Operations in a Stream-Oriented C-to-VHDL Compiler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 142-147, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
C-to-VHDL compiling, Impulse-C, Smart buffer, FPGA, High-performance computing |
26 | Zhihua Wang 0001, Songping Mai, Chun Zhang |
Power Issues on Circuit Design for Cochlear Implants. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 163-166, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
low power, power efficiency, cochlear implant |
26 | Te-Jen Su, Chun-Hsiang Kuo, Wen-Pin Tsai, Cheng-Chih Hou |
A Hybrid of Clonal Selection Algorithm and Frequency Sampling Method for Designing a 2-D FIR Filter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 274-278, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Clonal Selection Algorithm (CSA), Finite-impulse response (FIR) filters, Frequency Sampling Method (FSM) |
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