Search results for "SAMOS"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Cor Meenderinck, Sorin Cotofana	High-Radix Addition and Multiplication in the Electron Counting Paradigm Using Single Electron Tunneling Technology.	SAMOS	2006	DBLP DOI BibTeX RDF
1	Jari Heikkinen, Jarmo Takala	Effects of Program Compression.	SAMOS	2006	DBLP DOI BibTeX RDF
1	Aram Hovsepyan, Stefan Van Baelen, Bert Vanhooff, Wouter Joosen, Yolande Berbers	Key Research Challenges for Successfully Applying MDD Within Real-Time Embedded Software Development.	SAMOS	2006	DBLP DOI BibTeX RDF
1	Jinsung Choi	Reconfigurable Platform for Digital Convergence Terminals.	SAMOS	2006	DBLP DOI BibTeX RDF
1	Stamatis Vassiliadis, Stephan Wong, Timo Hämäläinen 0001 (eds.)	Embedded Computer Systems: Architectures, Modeling, and Simulation, 6th International Workshop, SAMOS 2006, Samos, Greece, July 17-20, 2006, Proceedings	SAMOS	2006	DBLP DOI BibTeX RDF
1	Holger Blume, Daniel Becker 0001, Martin Botteck, Jörg Brakensiek, Tobias G. Noll	Hybrid Functional and Instruction Level Power Modeling for Embedded Processors.	SAMOS	2006	DBLP DOI BibTeX RDF
1	Daniel Iancu, Hua Ye 0003, Emanoil Surducan, Murugappan Senthilvelan, John Glossner, Vasile Surducan, Vladimir Kotlyar, Andrei Iancu, Gary Nacer, Jarmo Takala	Software Implementation of WiMAX on the Sandbridge SandBlaster Platform.	SAMOS	2006	DBLP DOI BibTeX RDF
1	Stefan Tillich, Martin Feldhofer, Johann Großschädl	Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box.	SAMOS	2006	DBLP DOI BibTeX RDF
1	Gabor Madl, Nikil D. Dutt	Domain-Specific Modeling of Power Aware Distributed Real-Time Embedded Systems.	SAMOS	2006	DBLP DOI BibTeX RDF
1	Mladen Berekovic, Tim Niggemeier	A Scalable, Multi-thread, Multi-issue Array Processor Architecture for DSP Applications Based on Extended Tomasulo Scheme.	SAMOS	2006	DBLP DOI BibTeX RDF
1	Song-Hwa Park, Tae-Hoon Lee, Ki-Dong Chung	A Flash File System to Support Fast Mounting for NAND Flash Memory Based Embedded Systems.	SAMOS	2006	DBLP DOI BibTeX RDF
1	Tero Rintaluoma, Olli Silvén, Juuso Raekallio	Interface Overheads in Embedded Multimedia Software.	SAMOS	2006	DBLP DOI BibTeX RDF
1	Ondrej Hyncica, Peter Kacz, Petr Fiedler, Zdenek Bradác, Pavel Kucera, Radimir Vrba	On Security of PAN Wireless Systems.	SAMOS	2006	DBLP DOI BibTeX RDF
1	Uwe Brinkschulte, Alexander von Renteln, Mathias Pacher	A Scheduling Strategy for a Real-Time Dependable Organic Middleware.	SAMOS	2006	DBLP DOI BibTeX RDF	organic real-time scheduling, OSA+ middleware, Self-organization, self-healing
1	Jan W. M. Jacobs, Rui Dai, Gerard J. M. Smit	Mining Dynamic Document Spaces with Massively Parallel Embedded Processors.	SAMOS	2006	DBLP DOI BibTeX RDF
1	Philippe Marchand, Purnendu Sinha	A Hardware Accelerator for Controlling Access to Multiple-Unit Resources in Safety/Time-Critical Systems.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis	Interprocedural Optimization for Dynamic Hardware Configurations.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Erno Salminen, Tero Kangas, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna, Timo D. Hämäläinen	Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Timo D. Hämäläinen, Andy D. Pimentel, Jarmo Takala, Stamatis Vassiliadis (eds.)	Embedded Computer Systems: Architectures, Modeling, and Simulation 5th International Workshop, SAMOS 2005, Samos, Greece, July 18-20, 2005, Proceedings	SAMOS	2005	DBLP DOI BibTeX RDF
1	Sung-Hoon Shim, Jong Wook Kwak, Cheol Hong Kim, Sung Tae Jhang, Chu Shik Jhon	Power-Aware Branch Logic: A Hardware Based Technique for Filtering Access to Branch Logic.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Tomi Westerlund, Juha Plosila	Formal Specification of a Protocol Processor.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Sangduck Park, Hyunjin Lim, Hoseok Chang, Wonyong Sung	Compressed Swapping for NAND Flash Memory Based Embedded Systems.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Marcel Beemster, Hans van Someren 0001, Liam Fitzpatrick, Ruben van Royen	Generating Stream Based Code from Plain C.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Ricardo S. Ferreira 0001, João M. P. Cardoso, Andre Toledo, Horácio C. Neto	Data-Driven Regular Reconfigurable Arrays: Design Space Exploration and Mapping.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Olli Silvén, Kari Jyrkkä	Observations on Power-Efficiency Trends in Mobile Communication Devices.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Mihai-Lucian Cristea, Claudiu Zissulescu, Ed F. Deprettere, Herbert Bos	FPL-3E: Towards Language Support for Reconfigurable Packet Processing.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Stefan Farfeleder, Andreas Krall, R. Nigel Horspool	Ultra Fast Cycle-Accurate Compiled Emulation of Inorder Pipelined Architectures.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Yu Hu 0002, Tong Jing, Xianlong Hong, Xiaodong Hu 0001, Guiying Yan	A Routing Paradigm with Novel Resources Estimation and Routability Models for X-Architecture Based Physical Design.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Marijn Temmerman, Edgar G. Daylight, Francky Catthoor, Serge Demeyer, Tom Dhaene	Moving Up to the Modeling Level for the Transformation of Data Structures in Embedded Multimedia Applications.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Sören Sonntag, Matthias Gries, Christian Sauer 0001	SystemQ: A Queuing-Based Approach to Architecture Performance Evaluation with SystemC.	SAMOS	2005	DBLP DOI BibTeX RDF
1	John McAllister, Roger F. Woods, Darren Gerard Reilly, Scott Fischaber, R. Hasson	Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Cheol Hong Kim, Sung-Hoon Shim, Jong Wook Kwak, Sung Woo Chung, Chu Shik Jhon	First-Level Instruction Cache Design for Reducing Dynamic Energy Consumption.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Leonardo Taglietti, José O. Carlomagno Filho, Daniel C. Casarotto, Olinto J. V. Furtado, Luiz C. V. dos Santos	Automatic ADL-Based Assembler Generation for ASIP Programming Support.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Petri Kukkala, Marko Hännikäinen, Timo D. Hämäläinen	Design and Implementation of a WLAN Terminal Using UML 2.0 Based Design Flow.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Jani Paakkulainen, Seppo Virtanen, Jouni Isoaho	Tuning a Protocol Processor Architecture Towards DSP Operations.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Humberto Calderon, Stamatis Vassiliadis	Reconfigurable Multiple Operation Array.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Pierre Bomel, Nabil Abdelli, Eric Martin 0001, Anne-Marie Fouilliart, Emmanuel Boutillon, Philippe Kajfasz	DVB-DSNG Modem High Level Synthesis in an Optimized Latency Insensitive System Context.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Andy D. Pimentel	A Case for Visualization-Integrated System-Level Design Space Exploration.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Dinesh C. Suresh, Walid A. Najjar, Jun Yang 0002	Power Efficient Instruction Caches for Embedded Systems.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Chunhui Zhang, Yun Long, Fadi J. Kurdahi	A Scalable Embedded JPEG2000 Architecture.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Yiyu Tan, Chihang Yau, Kaiman Lo, Pak Lun Mok, Anthony S. Fong	A Novel JAVA Processor for Embedded Devices.	SAMOS	2005	DBLP DOI BibTeX RDF
1	SungHwan Lee, JongSu Yi, JunSeong Kim	Real-Time Stereo Vision on a Reconfigurable System.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Maziar Goudarzi, Shaahin Hessabi	The ODYSSEY Tool-Set for System-Level Synthesis of Object-Oriented Models.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Frederik Vandeputte, Lieven Eeckhout, Koen De Bosschere	Offline Phase Analysis and Optimization for Multi-configuration Processors.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Georgi Gaydadjiev, Stamatis Vassiliadis	Flux Caches: What Are They and Are They Useful?	SAMOS	2005	DBLP DOI BibTeX RDF
1	Mauri Kuorilehto, Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen	High Abstraction Level Design and Implementation Framework for Wireless Sensor Networks.	SAMOS	2005	DBLP DOI BibTeX RDF
1	C. John Glossner, Sean Dorward, Sanjay Jinturkar, Mayan Moudgill, Erdem Hokenek, Michael J. Schulte, Stamatis Vassiliadis	Sandbridge Software Tools.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Dan Zhang, Zeng-zhi Li, Hong Song, Long Liu	A Programming Model for an Embedded Media Processing Architecture.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Holger Ruckdeschel, Hritam Dutta, Frank Hannig, Jürgen Teich	Automatic FIR Filter Generation for FPGAs.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Guillermo Payá Vayá, Javier Martín-Langerwerf, Peter Pirsch	RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Ali Manzak, Hüseyin Göksu	Application of Very Fast Simulated Reannealing (VFSR) to Low Power Design.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Sangchul Han, Moonju Park, Yookun Cho	Fast Real-Time Job Selection with Resource Constraints Under Earliest Deadline First.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Manfred Glesner, Heiko Hinkelmann, Thomas Hollstein, Leandro Soares Indrusiak, Tudor Murgan, Abdulfattah Mohammad Obeid, Mihail Petrov, Thilo Pionteck, Peter Zipf	Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Teemu Pitkänen, Tommi Rantanen, Andrea G. M. Cilio, Jarmo Takala	Hardware Cost Estimation for Application-Specific Processor Design.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Holger Blume, Thorsten von Sydow, Daniel Becker 0001, Tobias G. Noll	Modeling NoC Architectures by Means of Deterministic and Stochastic Petri Nets.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Fei Gao, Suleyman Sair	Exploiting Intra-function Correlation with the Global History Stack.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Mihai Sima, John Glossner, Daniel Iancu, Hua Ye 0003, Andrei Iancu, A. Joseph Hoane	CORDIC-Augmented Sandbridge Processor for Channel Equalization.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Pablo Robelly, Arne Lehmann, Gerhard P. Fettweis	Two-Dimensional Fast Cosine Transform for Vector-STA Architectures.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Robert A. Iannucci	Platform Thinking in Embedded Systems.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Sunil Kim	Pattern Matching Acceleration for Network Intrusion Detection Systems.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Stefan Eilers, Christian Müller-Schloer	s Mixed Virtual/Real Prototypes for Incremental System Design - A Proof of Concept.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Kyriakos Stavrou, Paraskevas Evripidou, Pedro Trancoso	DDM-CMP: Data-Driven Multithreading on a Chip Multiprocessor.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Guy Gogniat, Wayne P. Burleson, Lilian Bossuet	Configurable Computing for High-Security/High-Performance Ambient Systems.	SAMOS	2005	DBLP DOI BibTeX RDF
1	David Guevorkian, Petri Liuha, Aki Launiainen, Konsta Punkka, Ville Lappalainen	A Radix-8 Multiplier Design and Its Extension for Efficient Implementation of Imaging Algorithms.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Lucanus J. Simonson, Lei He 0001	Micro-architecture Performance Estimation by Formula.	SAMOS	2005	DBLP DOI BibTeX RDF
1	Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matús, Marcus Bronzel, Gerhard P. Fettweis	Synchronous Transfer Architecture (STA).	SAMOS	2004	DBLP DOI BibTeX RDF
1	Cagkan Erbas, Simon Polstra, Andy D. Pimentel	IDF Models for Trace Transformations: A Case Study in Computational Refinement.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun	Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis	Dynamic Hardware Reconfigurations: Performance Impact for MPEG2.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Chia-Jui Hsu, Fuat Keceli, Ming-Yung Ko, Shahrooz Shahparnia, Shuvra S. Bhattacharyya	DIF: An Interchange Format for Dataflow-Based Design Tools.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Andy D. Pimentel, Stamatis Vassiliadis (eds.)	Computer Systems: Architectures, Modeling, and Simulation, Third and Fourth International Workshops, SAMOS 2003 and SAMOS 2004, Samos, Greece, July 21-23, 2003 and July 19-21, 2004, Proceedings	SAMOS	2004	DBLP DOI BibTeX RDF
1	Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis	Power, Performance and Area Exploration for Data Memory Assignment of Multimedia Applications.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Jérôme Lemaitre, Sylvain Alliot, Ed F. Deprettere	On the (Re-)Use of IP-Components in Re-configurable Platforms.	SAMOS	2004	DBLP DOI BibTeX RDF
1	François Charot, Madeleine Nyamsi, Patrice Quinton, Charles Wagner	Architecture Exploration for 3G Telephony Applications Using a Hardware-Software Prototyping Platform.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Christian Haubelt, Dirk Koch, Jürgen Teich	Basic OS Support for Distributed Reconfigurable Hardware.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Miia Viitanen, Timo D. Hämäläinen	Comparison of Data Dependence Analysis Tests.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Holger Blume, Thorsten von Sydow, Tobias G. Noll	Performance Analysis of SoC Communication by Application of Deterministic and Stochastic Petri Nets.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Tero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen	A Communication-Centric Design Flow for HIBI-Based SoCs.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Carsten Reuter, Javier Martín-Langerwerf, Hans-Joachim Stolberg, Peter Pirsch	Performance Estimation of Streaming Media Applications for Reconfigurable Platforms.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Ulrich Heinkel, Claus Mayer, Charles F. Webb, Hans Sahm, Werner Haas 0003, Stefan Gossens	An Optimized Flow for Designing High-Speed, Large-Scale CMOS ASIC SoCs.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Ioan Cimpian, Alexandru Turjan, Ed F. Deprettere, Erwin A. de Kock	Communication Optimization in Compaan Process Networks.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Stéphane Chevobbe, Nicolas Ventroux, Frédéric Blanc 0001, Thierry Collette	RAMPASS: Reconfigurable and Advanced Multi-processing Architecture for Future Silicon Systems.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Pedro C. Diniz	Design Space Exploration for Configurable Architectures and the Role of Modeling, High-Level Program Analysis and Learning Techniques.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Iosif Antochi, Ben H. H. Juurlink, Stamatis Vassiliadis, Petri Liuha	Memory Bandwidth Requirements of Tile-Based Rendering.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Esther Salamí, Mateo Valero	Initial Evaluation of Multimedia Extensions on VLIW Architectures.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr	Early ISS Integration into Network-on-Chip Designs.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Jens Peter Wittenburg, Ulrich Schreiber, Ulrich Gries, Markus Schneider 0003, Tim Niggemeier	A Cost-Efficient RISC Processor Platform for Real Time Audio Applications.	SAMOS	2004	DBLP DOI BibTeX RDF
1	João M. P. Cardoso, Pedro C. Diniz	Modeling Loop Unrolling: Approaches and Open Issues.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Georgi Kuzmanov, Georgi Gaydadjiev, Stamatis Vassiliadis	Loading rho-µ-Code: Design Considerations.	SAMOS	2004	DBLP DOI BibTeX RDF	MOLEN, loading microcode, implementation, Reconfigurable architectures
1	Joel Cambonie, Sylvain Guérin, Ronan Keryell, Loïc Lagadec, Bernard Pottier, Olivier Sentieys, Bernt Weber, Samar Yazdani	Compiler and System Techniques for soc Distributed Reconfigurable Accelerators.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis	A Novel Data-Path for Accelerating DSP Kernels.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Jürgen Teich, Shuvra S. Bhattacharyya	Analysis of Dataflow Programs with Interval-Limited Data-Rates.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Jarmo Takala, Konsta Punkka	Scalable FFT Processors and Pipelined Butterfly Units.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Erno Salminen, Vesa Lahtinen, Tero Kangas, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen	HIBI v.2 Communication Network for System-on-Chip.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Michael J. Schulte, C. John Glossner, Suman Mamidi, Mayan Moudgill, Stamatis Vassiliadis	A Low-Power Multithreaded Processor for Baseband Communication Systems.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Nainesh Agarwal, Nikitas J. Dimopoulos	Using CoDeL to Rapidly Prototype Network Processsor Extensions.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Radhakrishnan Sivakumar, Vassilios V. Dimakopoulos, Nikitas J. Dimopoulos	CoDeL: Automatically Synthesizing Network Interface Controllers.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero	Performance and Power Evaluation of Clustered VLIW Processors with Wide Functional Units.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Nicolas Telle, Wayne Luk, Ray C. C. Cheung	Customising Hardware Designs for Elliptic Curve Cryptography.	SAMOS	2004	DBLP DOI BibTeX RDF
1	Laurentiu Nicolae, Ed F. Deprettere	Constraints Derivation and Propagation for Large-Scale Embedded Systems Exploration.	SAMOS	2004	DBLP DOI BibTeX RDF

Publications at "SAMOS"( http://dblp.L3S.de/Venues/SAMOS )