Search results for "configurable"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
13	Varvana Myllärniemi, Mikko Raatikainen, Tomi Männistö	Using a Configurator for Predictable Component Composition.	EUROMICRO-SEAA	2007	DBLP DOI BibTeX RDF
13	Daniel Lohmann, Jochen Streicher, Olaf Spinczyk, Wolfgang Schröder-Preikschat	Interrupt synchronization in the CiAO operating system: experiences from implementing low-level system policies by AOP.	ACP4IS	2007	DBLP DOI BibTeX RDF	CiAO, aspect-aware operating system, aspect-oriented programming (AOP), configurability, AspectC++
13	Qibin Sun, Dajun He, Qi Tian 0002	A Secure and Robust Authentication Scheme for Video Transcoding.	IEEE Trans. Circuits Syst. Video Technol.	2006	DBLP DOI BibTeX RDF
13	Jack R. Smith, Tian Xia, Charles E. Stroud	An Automated BIST Architecture for Testing and Diagnosing FPGA Interconnect Faults.	J. Electron. Test.	2006	DBLP DOI BibTeX RDF	stuck-at faults, bridging faults, delay faults
13	Youngsoo Kim, William W. Edmonson	H.264 Video Decoder Design: Beyond RTL Design Implementation.	SiPS	2006	DBLP DOI BibTeX RDF
13	Ada S. Y. Poon	An Energy-Efficient Reconfigurable Baseband Processor for Flexible Radios.	SiPS	2006	DBLP DOI BibTeX RDF
13	Nastaran Baradaran, Pedro C. Diniz	Memory Parallelism Using Custom Array Mapping to Heterogeneous Storage Structures.	FPL	2006	DBLP DOI BibTeX RDF
13	John D. DeHart, Fred Kuhns, Jyoti Parwatikar, Jonathan S. Turner, Charlie Wiseman, Ken Wong	The open network laboratory.	SIGCSE	2006	DBLP DOI BibTeX RDF	experimental computer science, education, real-time displays
13	Gianluca Tempesti, Pierre-André Mudry, Guillaume Zufferey	Hardware/Software Coevolution of Genome Programs and Cellular Processors.	AHS	2006	DBLP DOI BibTeX RDF
13	Abel Guilhermino Silva-Filho, Pablo Viana, Edna Barros, Manoel Eusébio de Lima	Tuning Mechanism for Two-Level Cache Hierarchy Intended for Instruction Caches and Low Energy Consumption.	SBAC-PAD	2006	DBLP DOI BibTeX RDF
13	I-Hsin Chung, Robert Walkup, Hui-Fang Wen, Hao Yu	MPI tools and performance studies - MPI performance analysis tools on Blue Gene/L.	SC	2006	DBLP DOI BibTeX RDF	performance tuning, performance tool
13	Nachiketh R. Potlapally, Srivaths Ravi 0001, Anand Raghunathan, Ruby B. Lee, Niraj K. Jha	Impact of Configurability and Extensibility on IPSec Protocol Execution on Embedded Processors.	VLSI Design	2006	DBLP DOI BibTeX RDF	Performance, Embedded Systems, Security Protocols, Configurability, Extensibility, Embedded Processors, IPSec, Embedded Security
13	Sebastian Wallner	Micro-Task Processing in Heterogeneous Reconfigurable Systems.	J. Comput. Sci. Technol.	2005	DBLP DOI BibTeX RDF	reconfigurable heterogeneous architectures, configuration instructions, system-on-chip, signal processing, descriptors, parallel processing system
13	Chul Kim, A. M. Rassau, Stefan Lachowicz, Saeid Nooshabadi, Kamran Eshraghian	3D-SoftChip: A Novel 3D Vertically Integrated Adaptive Computing System.	VLSI-SoC	2005	DBLP DOI BibTeX RDF
13	Roman L. Lysecky, Kris Miller, Frank Vahid, Kees A. Vissers	Firm-core Virtual FPGA for Just-in-Time FPGA Compilation (abstract only).	FPGA	2005	DBLP DOI BibTeX RDF
13	Ray C. C. Cheung, Wayne Luk, Peter Y. K. Cheung	Reconfigurable Elliptic Curve Cryptosystems on a Chip.	DATE	2005	DBLP DOI BibTeX RDF
13	Shiwen Hu, Madhavi Gopal Valluri, Lizy Kurian John	Effective Adaptive Computing Environment Management via Dynamic Optimization.	CGO	2005	DBLP DOI BibTeX RDF
13	Sara Bouchenak, Fabienne Boyer, Daniel Hagimont, Sacha Krakowiak, Noel De Palma, Vivien Quéma, Jean-Bernard Stefani	Architecture-Based Autonomous Repair Management: Application to J2EE Clusters.	ICAC	2005	DBLP DOI BibTeX RDF
13	Mohammed Y. Niamat, Surya S. Hejeebu, Mansoor Alam	A BIST Approach for Testing FPGAs Using JBITS.	FCCM	2005	DBLP DOI BibTeX RDF
13	Wilhelm Dangelmaier, Jens Heidenreich, Ulrich Pape	Supply Chain Management: A Multi-Agent System for Collaborative Production Planning.	EEE	2005	DBLP DOI BibTeX RDF
13	Johannes Meinecke, Martin Nussbaumer, Martin Gaedke	Building Blocks for Identity Federations.	ICWE	2005	DBLP DOI BibTeX RDF
13	Daniel Lohmann, Wolfgang Schröder-Preikschat, Olaf Spinczyk	The Design of Application-Tailorable Operating System Product Lines.	CASSIS	2005	DBLP DOI BibTeX RDF
13	Sara Bouchenak, Fabienne Boyer, Sacha Krakowiak, Daniel Hagimont, Adrian Mos, Jean-Bernard Stefani, Noel De Palma, Vivien Quéma	Architecture-Based Autonomous Repair Management: An Application to J2EE Clusters.	SRDS	2005	DBLP DOI BibTeX RDF
13	Greg Stitt, Frank Vahid, Shawn Nematbakhsh	Energy savings and speedups from partitioning critical software loops to hardware in embedded systems.	ACM Trans. Embed. Comput. Syst.	2004	DBLP DOI BibTeX RDF	FPGA, embedded systems, synthesis, platforms, speedup, low energy, Hardware/software partitioning
13	Chris Dick, Fred Harris 0001, Michael Rice	FPGA Implementation of Carrier Synchronization for QAM Receivers.	J. VLSI Signal Process.	2004	DBLP DOI BibTeX RDF	carrier recovery, system generator, FPGA, synchronization, wireless communication, software define radio, CORDIC, QAM
13	Gilles Pokam, François Bodin	Energy-Efficiency Potential of a Phase-Based Cache Resizing Scheme for Embedded Systems.	Interaction between Compilers and Computer Architectures	2004	DBLP DOI BibTeX RDF
13	Daniel Schneider 0008, Jano Moreira de Souza, Sergio P. J. Medeiros, Geraldo Xexéo	CEJ - An Environment for Flexible Definition and Execution of Scientific Publication Processes.	CSCWD (Selected papers)	2004	DBLP DOI BibTeX RDF
13	John M. D. Hill, Kenneth L. Alford	A distributed task environment for teaching artificial intelligence with agents.	SIGCSE	2004	DBLP DOI BibTeX RDF	agent environments, artificial intelligence, intelligent agents
13	Ernesto Exposito, Patrick Sénac, Michel Diaz	UML-SDL modelling of the FPTP QoS oriented transport protocol.	MMM	2004	DBLP DOI BibTeX RDF	transport mechanisms, QoS, UML, congestion control, transport protocol, SDL
13	Guangzhi Li, Dongmei Wang, Jennifer Yates, Robert D. Doverspike, Charles R. Kalmanek	Detailed Study of IP/ Reconfigurable Optical Networks.	BROADNETS	2004	DBLP DOI BibTeX RDF
13	Junfeng Wang 0008, Mingtian Zhou, Hongxia Zhou	Providing Network Monitoring Service for Grid Computing.	FTDCS	2004	DBLP DOI BibTeX RDF
13	Nitin Deo, Behrooz Zahiri, Ivo Bolsens, Jason Cong, Bhusan Gupta, Philip Lopresti, Christopher B. Reynolds, Chris Rowen, Ray Simar	What happened to ASIC?: Go (recon)figure?	DAC	2004	DBLP DOI BibTeX RDF
13	Yang Xu 0017, Lawrence T. Pileggi, Stephen P. Boyd	ORACLE: optimization with recourse of analog circuits including layout extraction.	DAC	2004	DBLP DOI BibTeX RDF	optimization with recourse
13	Konstantinos Tatas, Kostas Siozios, Nikolaos Vassiliadis, D. J. Soudris, Spiridon Nikolaidis 0001, Stilianos Siskos, Adonios Thanailakis	FPGA Architecture Design and Toolset for Logic Implementation.	PATMOS	2003	DBLP DOI BibTeX RDF
13	Antonio Cañas, Eva M. Ortigosa, Antonio F. Díaz, Julio Ortega 0001	XMLP: A Feed-Forward Neural Network with Two-Dimensional Layers and Partial Connectivity.	IWANN (2)	2003	DBLP DOI BibTeX RDF
13	Hiroaki Takada, Shinya Honda, Reiji Nishiyama, Hiroshi Yuyama	Hardware/Software Co-Configuration for Multiprocessor SoPC.	WSTFES	2003	DBLP DOI BibTeX RDF
13	Fabio Campi, Andrea Cappelli, Roberto Guerrieri, Andrea Lodi 0002, Mario Toma, Alberto La Rosa, Luciano Lavagno, Claudio Passerone, Roberto Canegallo	A Reconfigurable Processor Architecture and Software Development Environment for Embedded Systems.	IPDPS	2003	DBLP DOI BibTeX RDF
13	Christian Siemers, Volker Winterstein	Modelling Programmable Logic Devices and Reconfigurable, Microprocessor-Related Architectures.	IPDPS	2003	DBLP DOI BibTeX RDF
13	James R. Heath	A systems approach to molecular electronics.	ISLPED	2003	DBLP DOI BibTeX RDF
13	S. Kameshwaran, Y. Narahari	e-Procurement Using Goal Programming.	EC-Web	2003	DBLP DOI BibTeX RDF
13	Shridhar Mubaraq Mishra, A. Guruprasad, Chun Feng Hu, Pramod K. Pandey, Ming Hung	Wire-speed traffic management in Ethernet switches.	ISCAS (2)	2003	DBLP DOI BibTeX RDF
13	Joshua W. Haines, Stephen A. Goulet, Robert S. Durst, Terrence G. Champion	LLSIM: Network Simulation for Correlation and Response Testing.	DISCEX (2)	2003	DBLP DOI BibTeX RDF
13	Greg Stitt, Roman L. Lysecky, Frank Vahid	Dynamic hardware/software partitioning: a first approach.	DAC	2003	DBLP DOI BibTeX RDF	self-improving chips, FPGA, embedded systems, synthesis, dynamic optimization, system-on-a-chip, platforms, codesign, hardware/software partitioning
13	Elias Procópio Duarte Jr., Luis Carlos Erpen De Bona	A Dependable SNMP-based Tool for Distributed Network Management.	DSN	2002	DBLP DOI BibTeX RDF
13	Deshanand P. Singh, Stephen Dean Brown	Integrated retiming and placement for field programmable gate arrays.	FPGA	2002	DBLP DOI BibTeX RDF
13	Vania Marangozova, Daniel Hagimont	Non-functional Replication Management in the Corba Component Model.	OOIS	2002	DBLP DOI BibTeX RDF
13	William C. Athas, Lynn Youngs, Andrew Reinhart	Compact models for estimating microprocessor frequency and power.	ISLPED	2002	DBLP DOI BibTeX RDF	VLSI, low-power, microprocessors, ASIC, power estimation, curve-fitting, delay modeling
13	Sandra Teixeira, Pedro Vicente, Alexandre S. Pinto, Hugo Miranda, Luís E. T. Rodrigues, Jorge Martins, António Rito Silva	Configuring the Communication Middleware to Support Multi-user Object-Oriented Environments.	OTM	2002	DBLP DOI BibTeX RDF
13	Pawel T. Wojciechowski, Sergio Mena, André Schiper	Semantics of Protocol Modules Composition and Interaction.	COORDINATION	2002	DBLP DOI BibTeX RDF
13	Enrico Denti, Andrea Omicini, Alessandro Ricci	tu Prolog: A Light-Weight Prolog for Internet Applications and Infrastructures.	PADL	2001	DBLP DOI BibTeX RDF
13	Matti A. Hiltunen, Richard D. Schlichting, Carlos A. Ugarte	Enhancing Survivability of Security Services Using Redundanc.	DSN	2001	DBLP DOI BibTeX RDF
13	Reiner W. Hartenstein	Reconfigurable Computing: A New Business Model and its Impact on SoC Design.	DSD	2001	DBLP DOI BibTeX RDF
13	Yann Bajot, Habib Mehrez	Customizable DSP architecture for ASIP core design.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
13	Jun He, Matti A. Hiltunen, Mohan Rajagopalan, Richard D. Schlichting	Providing QoS Customization in Distributed Object Systems.	Middleware	2001	DBLP DOI BibTeX RDF
13	Oscal T.-C. Chen, Wei-Lung Liu	An FIR processor with programmable dynamic data ranges.	IEEE Trans. Very Large Scale Integr. Syst.	2000	DBLP DOI BibTeX RDF
13	Eddie Kohler, Robert Tappan Morris, Benjie Chen, John Jannotti, M. Frans Kaashoek	The click modular router.	ACM Trans. Comput. Syst.	2000	DBLP DOI BibTeX RDF	software router performance, routers, component systems
13	Khaldoun Ateyeh, Jutta A. Mülle, Peter C. Lockemann	Modular Development of Multimedia Courseware.	WISE (2)	2000	DBLP DOI BibTeX RDF	Reusable courseware, courseware development, Hypermedia
13	Joerg Abke, Erich Barke	CoMGen: Direct Mapping of Arbitrary Components into LUT-Based FPGAs.	FPL	2000	DBLP DOI BibTeX RDF
13	Ricardo Salem Zebulum, Adrian Stoica, Didier Keymeulen	A Flexible Model of a CMOS Field Programmable Transistor Array Targeted for Hardware Evolution.	ICES	2000	DBLP DOI BibTeX RDF
13	Lev Kirischian	Optimization of Parallel Task Execution on the Adaptive Reconfigurable Group Organized Computing System.	PARELEC	2000	DBLP DOI BibTeX RDF	Reconfigurable architecture: FPGA, Architecture selection graph, Graph arrangement
13	Samuel Z. Guyer, Calvin Lin	Optimizing the Use of High Performance Software Libraries.	LCPC	2000	DBLP DOI BibTeX RDF
13	Natalya Fridman Noy, Ray W. Fergerson, Mark A. Musen	The Knowledge Model of Protégé-2000: Combining Interoperability and Flexibility.	EKAW	2000	DBLP DOI BibTeX RDF
13	Rameshsharma Ramloll, John A. Mariani	Moksha: exploring ubiquity in event filtration-control at the multi-user desktop.	WACC	1999	DBLP DOI BibTeX RDF	multi-users desktop system, awareness, auditory display, common information space, multimedia browsing
13	Pak K. Chan, Mark J. Boyd, Sezer Gören 0001, K. Klenk, V. Kodavati, R. Kundu, M. Margolese, J. Sun, Katsuharu Suzuki, E. Thorne, X. Wang, J. Xu, M. Zhu	Reducing Compilation Time of Zhong's FPGA-Based SAT Solver.	FCCM	1999	DBLP DOI BibTeX RDF
13	Gordon S. Blair, Fábio M. Costa, Geoff Coulson, Hector A. Duran, Nikos Parlavantzas, Fabien Delpiano, Bruno Dumant, François Horn, Jean-Bernard Stefani	The Design of a Resource-Aware Reflective Middleware Architecture.	Reflection	1999	DBLP DOI BibTeX RDF
13	Mehrdad Nourani, Christos A. Papachristou	A Bypass Scheme for Core-Based System Fault Testing.	DATE	1998	DBLP DOI BibTeX RDF
13	Kiran Bondalapati, Viktor K. Prasanna	Mapping Loops onto Reconfigurable Architectures.	FPL	1998	DBLP DOI BibTeX RDF
13	Peixin Zhong, Margaret Martonosi, Pranav Ashar, Sharad Malik	Solving Boolean Satisfiability with Dynamic Hardware Configurations.	FPL	1998	DBLP DOI BibTeX RDF
13	Uwe Tangen, John S. McCaskill	Hardware Evolution with a Massively Parallel Dynamically Reconfigurable Computer: POLYP.	ICES	1998	DBLP DOI BibTeX RDF
13	Maya B. Gokhale, Janice M. Stone	NAPA C: Compiling for a Hybrid RISC/FPGA Architecture.	FCCM	1998	DBLP DOI BibTeX RDF
13	R. S. Fish, J. M. Graham, Roger J. Loader	DRoPS: Kernel Support For Runtime Adaptable Protocols.	EUROMICRO	1998	DBLP DOI BibTeX RDF
13	Narasimhan Ramasubramanian, Ram Subramanian, Santosh Pande	Automatic Analysis of Loops to Exploit Operator Parallelism on Reconfigurable Systems.	LCPC	1998	DBLP DOI BibTeX RDF
13	Michel Renovell, Jean-Michel Portal, Joan Figueras, Yervant Zorian	Test Pattern and Test Configuration Generation Methodology for the Logic of RAM-Based FPGA.	Asian Test Symposium	1997	DBLP DOI BibTeX RDF	FPGA, VLSI, Test, CMOS, IC
13	Uwe Tangen, Ludger Schulte, John S. McCaskill	A parallel hardware evolvable computer POLYP.	FCCM	1997	DBLP DOI BibTeX RDF
13	Harold C. Forbes, Karsten Schwan	Object technologies and real-time scheduling.	OOPS Messenger	1996	DBLP DOI BibTeX RDF	Concurrent C
11	Zhan Sun, Guangliang Hu, Yijie Wang 0002, Yueshi Guan, Dianguo Xu 0001	Analysis and Design of Configurable Rectifier With Compensated Near-Zero Impedance Angle for Megahertz Wireless Power Transfer.	IEEE Trans. Ind. Electron.	2024	DBLP DOI BibTeX RDF
11	Haiming Huang, Shijie Tang, Wenqing Chai, Fuchun Sun 0001, Di'en Wu, Shengyi Miao, Daming Zhong, Haobin Hou, Mingjie Dong	MCSG: A Morphology Configurable Soft Gripper With Self-Adaption Modular Composite Finger.	IEEE Trans. Ind. Electron.	2024	DBLP DOI BibTeX RDF
11	Youzheng Wang, Hongchen Liu, Patrick W. Wheeler, Fengjiang Wu	Implementation and Analysis of an Efficient Soft-Switching Battery Wireless Charger with Re-Configurable Rectifier.	IEEE Trans. Ind. Electron.	2024	DBLP DOI BibTeX RDF
11	Mahabub Hasan Mahalat, Shyam Subba, Anindan Mondal, Biplab K. Sikdar, Rajat Subhra Chakraborty, Bibhash Sen	CAPUF: Design of a configurable circular arbiter PUF with enhanced security and hardware efficiency.	Integr.	2024	DBLP DOI BibTeX RDF
11	Wisam Hayder Mahdi, Necmi Taspinar	Bee System-Based Self Configurable Optimized Resource Allocation Technique in Device-to-Device (D2D) Communication Networks.	IEEE Access	2024	DBLP DOI BibTeX RDF
11	Rella Mareta, Ardianto Satriawan, Phap Duong-Ngoc, Hanho Lee	A Bootstrapping-Capable Configurable NTT Architecture for Fully Homomorphic Encryption.	IEEE Access	2024	DBLP DOI BibTeX RDF
11	Pietro Nannipieri, Giacomo Bartolacci, Matteo Bertolucci, Luca Fanucci	Design and Implementation of a Configurable Fully Compliant DVB-S2 LDPC Encoder for High Data-Rate Downlink Payload.	IEEE Access	2024	DBLP DOI BibTeX RDF
11	Seyed Ali Kashani Gharavi, Saeed Safari	Performance Improvement of Processor Through Configurable Approximate Arithmetic Units in Multicore Systems.	IEEE Access	2024	DBLP DOI BibTeX RDF
11	Ziyu Zhou, Pengjun Wang, Gang Li	Bagua Protocol: A Whole-Process Configurable Protocol for IoT Sensing Devices Security Based on Strong PUF.	IEEE Internet Things J.	2024	DBLP DOI BibTeX RDF
11	Si-Huang Liu, Chia-Yi Kuo, Yannan Mo, Tao Su	An Area-Efficient, Conflict-Free, and Configurable Architecture for Accelerating NTT/INTT.	IEEE Trans. Very Large Scale Integr. Syst.	2024	DBLP DOI BibTeX RDF
11	Jiaji Ma, Jin Hu 0006, Yang Liu 0106, Xiayu Wang, Dong Li, Rui Ma 0007, Zhangming Zhu	A 64 × 64 Pixel Image Sensor With Gain-Configurable Photodiodes and Combined Subrange Method.	IEEE Trans. Instrum. Meas.	2024	DBLP DOI BibTeX RDF
11	Sonya Crowe, Luca Grieco, Thomas Monks, Brad Keogh, Marion L. Penn, Mike Clancy, Samer Elkhodair, Cecilia Vindrola-Padros, Naomi J. Fulop, Martin Utley	Here's something we prepared earlier: Development, use and reuse of a configurable, inter-disciplinary approach for tackling overcrowding in NHS hospitals.	J. Oper. Res. Soc.	2024	DBLP DOI BibTeX RDF
11	Noha Ahmed Bayomy, Ayman E. Khedr, Laila A. Abd-Elmegid	A configurable mining approach for enhancing the business processes' performance.	Knowl. Inf. Syst.	2024	DBLP DOI BibTeX RDF
11	Husam Kareem, Dmitriy Dunaev	A novel low hardware configurable ring oscillator (CRO) PUF for lightweight security applications.	Microprocess. Microsystems	2024	DBLP DOI BibTeX RDF
11	Nasrin Akhter, Md. Redowan Mahmud, Jiong Jin, Jason But, Iftekhar Ahmad, Yong Xiang 0001	Configurable Harris Hawks Optimisation for Application Placement in Space-Air-Ground Integrated Networks.	IEEE Trans. Netw. Serv. Manag.	2024	DBLP DOI BibTeX RDF
11	Alexander D. Fuchs, Johannes A. F. Lehmeyer, Heinz Junkes, Heiko B. Weber, Michael Krieger	NOMAD CAMELS: Configurable Application for Measurements, Experiments and Laboratory Systems.	J. Open Source Softw.	2024	DBLP DOI BibTeX RDF
11	Qingyuan Wang 0002, Barry Cardiff, Antoine Frappé, Benoit Larras, Deepu John	DyCE: Dynamic Configurable Exiting for Deep Learning Compression and Scaling.	CoRR	2024	DBLP DOI BibTeX RDF
11	Mootez Saad, Tushar Sharma 0001	CONCORD: Towards a DSL for Configurable Graph Code Representation.	CoRR	2024	DBLP DOI BibTeX RDF
11	Alberto Maria Metelli	Performance Improvement Bounds for Lipschitz Configurable Markov Decision Processes.	CoRR	2024	DBLP DOI BibTeX RDF
11	Ferhat Erata, Arda Goknil, Bedir Tekinerdogan, Geylani Kardas	A Tool for Automated Reasoning About Traces Based on Configurable Formal Semantics.	CoRR	2024	DBLP DOI BibTeX RDF
11	Karolina Milano, Bruno B. P. Cafeo	Navigating Expertise in Configurable Software Systems through the Maze of Variability.	CoRR	2024	DBLP DOI BibTeX RDF
11	Huan-Ke Hsu, I-Chyn Wey, T. Hui Teo	SF-MMCN: A Low Power Re-configurable Server Flow Convolution Neural Network Accelerator.	CoRR	2024	DBLP DOI BibTeX RDF
11	Víctor Gallego	Configurable Safety Tuning of Language Models with Synthetic Preference Data.	CoRR	2024	DBLP DOI BibTeX RDF
11	Shuming Shi 0001, Enbo Zhao, Deng Cai 0002, Leyang Cui, Xinting Huang, Huayang Li	Inferflow: an Efficient and Highly Configurable Inference Engine for Large Language Models.	CoRR	2024	DBLP DOI BibTeX RDF
11	Mohammad Ghufran, Sourish Tetakayala, Jack Hughes 0003, Aron Wilson, Hossein Rastgoftar	Quadcopter Team Configurable Motion Guided by a Quadruped.	CoRR	2024	DBLP DOI BibTeX RDF