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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 4193 occurrences of 1488 keywords
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Results
Found 3723 publication records. Showing 3723 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
18 | John Chapin, Stephen Alan Herrod, Mendel Rosenblum, Anoop Gupta |
Memory System Performance of UNIX on CC-NUMA Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1995 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems, Ottawa, Canada, May 15-19, 1995, pp. 1-13, 1995, ACM, 0-89791-695-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
18 | Robert W. Wisniewski, Leonidas I. Kontothanassis, Michael L. Scott |
High Performance Synchronization Algorithms for Multiprogrammed Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the Fifth ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming (PPOPP), Santa Barbara, California, USA, July 19-21, 1995, pp. 199-206, 1995, ACM, 0-89791-700-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
18 | Alvin R. Lebeck, David A. Wood 0001 |
Dynamic Self-Invalidation: Reducing Coherence Overhead in Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 22nd Annual International Symposium on Computer Architecture, ISCA '95, Santa Margherita Ligure, Italy, June 22-24, 1995, pp. 48-59, 1995, ACM, 0-89791-698-0. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
18 | Akhilesh Kumar, Phanindra K. Mannava, Laxmi N. Bhuyan |
Efficient and scalable cache coherence schemes for shared memory hypercube multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings Supercomputing '94, Washington, DC, USA, November 14-18, 1994, pp. 498-507, 1994, IEEE Computer Society, 0-8186-6605-6. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
18 | Beng-Hong Lim, Anant Agarwal |
Waiting Algorithms for Synchronization in Large-Scale Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 11(3), pp. 253-294, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
producer-consumer synchronization, competitive analysis, locks, blocking, spinning, waiting time, barriers |
18 | Cathy McCann, Raj Vaswani, John Zahorjan |
A Dynamic Processor Allocation Policy for Multiprogrammed Shared-memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 11(2), pp. 146-178, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
shared memory parallel processors, threads, two-level scheduling |
18 | Hiroyuki Nakahira, Masakatsu Maruyama, Hideshi Ueda, Haruyasu Yamada |
An image processing system using Image Signal Multiprocessors (ISMPs). ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 5(2-3), pp. 133-140, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
18 | Josep Torrellas, Andrew Tucker, Anoop Gupta |
Benefits of Cache-Affinity Scheduling in Shared-Memory Multiprocessors: A Summary. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and modeling of computer systems, Santa Clara, California, USA, May 10-14, 1993, pp. 272-274, 1993, ACM, 0-89791-580-1. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
UNIX System V |
18 | Xiaodong Zhang 0001 |
Dynamic and static load balancing for solving block bordered circuit equations on multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(9), pp. 1086-1094, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
18 | J. E. Smith, W. R. Taylor |
Characterizing memory performance in vector multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 6th international conference on Supercomputing, ICS 1992, Washington, DC, USA, July 19-24, 1992, pp. 35-44, 1992, ACM, 0-89791-485-6. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
18 | Senthil Krishnamoorthy, Alok N. Choudhary |
An Evaluation of Set-Associativity in Two-Level Caches for Shared Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARLE ![In: PARLE '92: Parallel Architectures and Languages Europe, 4th International PARLE Conference, Paris, France, June 15-18, 1992, Proceedings, pp. 751-766, 1992, Springer, 3-540-55599-4. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
18 | Lubomir Bic, John M. A. Roy, Mark Nagel |
Declarative Programming for Conventional MIMD Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARLE ![In: PARLE '92: Parallel Architectures and Languages Europe, 4th International PARLE Conference, Paris, France, June 15-18, 1992, Proceedings, pp. 569-583, 1992, Springer, 3-540-55599-4. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
18 | John M. Mellor-Crummey, Michael L. Scott |
Algorithms for Scalable Synchronization on Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 9(1), pp. 21-65, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
18 | Marc Engels, Rudy Lauwereins, J. A. Peperstraete |
Rapid Prototyping for DSP Systems with Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 8(2), pp. 52-62, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
18 | Thomas Bemmerl, Arndt Bode |
An Integrated Environment for Programming Distributed Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDMCC ![In: Distributed Memory Computing, 2nd European Conference, EDMCC2, Munich, FRG, April 22-24, 1991, Proceedings, pp. 130-142, 1991, Springer, 3-540-53951-4. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
18 | Agustín Fernández, José M. Llabería, Juan J. Navarro, Miguel Valero-García |
Interleaving Partitions of Systolic Algorithms for Programming Distributed Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDMCC ![In: Distributed Memory Computing, 2nd European Conference, EDMCC2, Munich, FRG, April 22-24, 1991, Proceedings, pp. 90-99, 1991, Springer, 3-540-53951-4. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
18 | Jordi Torres, Eduard Ayguadé, Jesús Labarta, José M. Llabería, Mateo Valero |
On Automatic Loop Data-Mapping for Distributed-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDMCC ![In: Distributed Memory Computing, 2nd European Conference, EDMCC2, Munich, FRG, April 22-24, 1991, Proceedings, pp. 173-182, 1991, Springer, 3-540-53951-4. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
18 | Songnian Zhou, Tim Brecht |
Processor-Pool-Based Scheduling for Large-Scale NUMA Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1991 ACM SIGMETRICS conference on Measurement and modeling of computer systems, San Diego, California, USA, May 21-24, 1991, pp. 133-142, 1991, ACM, 0-89791-392-2. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
18 | Steven L. Scott, Gurindar S. Sohi |
The Use of Feedback in Multiprocessors and Its Application to Tree Saturation Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 1(4), pp. 385-398, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
tree saturation control, feedback control schemes, hot-spot accesses, feedback, feedback, multiprocessor interconnection networks, multiprocessing systems, multiprocessor systems, multistage interconnection networks |
18 | Manu Thapar, Bruce Delagi |
Scalable Cache Coherence for Large Shared Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CONPAR ![In: CONPAR 90 - VAPP IV, Joint International Conference on Vector and Parallel Processing, Zurich, Switzerland, September 10-13, 1990, Proceedings, pp. 592-603, 1990, Springer, 3-540-53065-7. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
18 | Sang Lyul Min, Jean-Loup Baer, Hyoung-Joo Kim |
An efficient caching support for critical sections in large-scale shared-memory multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 4th international conference on Supercomputing, ICS 1990, Amsterdam, The Netherlands, June 11-15, 1990, pp. 34-47, 1990, ACM, 0-89791-369-8. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
18 | Vittorio Zecca, Aladin Kamel |
Elastodynamics on clustered vector multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 4th international conference on Supercomputing, ICS 1990, Amsterdam, The Netherlands, June 11-15, 1990, pp. 281-290, 1990, ACM, 0-89791-369-8. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
FORTRAN |
18 | Mazin S. Algudady, Chita R. Das, Matthew Thazhuthaveetil |
A write update cache coherence protocol for MIN-based multiprocessors with accessibility-based split caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings Supercomputing '90, New York, NY, USA, November 12-16, 1990, pp. 544-553, 1990, IEEE Computer Society, 0-89791-412-0. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
18 | Gung-Chung Yang |
PARASPICE: A Parallel Circuit Simulator for Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, Florida, USA, June 24-28, 1990., pp. 400-405, 1990, IEEE Computer Society Press, 0-89791-363-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
18 | Paul S. Wang |
Parallel Univariate Polynomial Factorization on Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSAC ![In: Proceedings of the International Symposium on Symbolic and Algebraic Computation, ISSAC '90, Tokyo, Japan, August 20-24, 1990, pp. 145-151, 1990, ACM, 0-201-54892-5. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
18 | Thomas E. Anderson, Edward D. Lazowska, Henry M. Levy |
The Performance Implications of Thread Management Alternatives for Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1989 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, Berkeley, California, USA, May 23-26, 1989, pp. 49-60, 1989, ACM, 0-89791-315-9. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
18 | Andrew Tucker, Anoop Gupta |
Process Control and Scheduling Issues for Multiprogrammed Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SOSP ![In: Proceedings of the Twelfth ACM Symposium on Operating System Principles, SOSP 1989, The Wigwam, Litchfield Park, Arizona, USA, December 3-6, 1989, pp. 159-166, 1989, ACM, 0-89791-338-8. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
18 | Ferenc Szelényi, Wolfgang E. Nagel |
A comparison of parallel processing on Cray X-MP AND IBM 3090 VF multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 3rd international conference on Supercomputing, ICS 1989, Heraklion, Crete, Greece, June 5-9, 1989, pp. 271-282, 1989, ACM, 0-89791-309-4. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
FORTRAN |
18 | Krishnan Padmanabhan |
The composite binary cube - a family of interconnection networks for multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 3rd international conference on Supercomputing, ICS 1989, Heraklion, Crete, Greece, June 5-9, 1989, pp. 62-71, 1989, ACM, 0-89791-309-4. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
18 | James R. Slagle, Ashim Bose, P. Busalacchi, C. Wee |
Enhanced simulated annealing for automatic reconfiguration of multiprocessors in space. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEA/AIE (1) ![In: Proceedings of the Second International Conference on Industrial & Engineering Applications of Artificial Intelligence & Expert Systems, IEA/AIE 1989, June 6-9, 1989, Tullahoma, TN, USA - Volume 1, pp. 401-408, 1989, ACM, 0-89791-320-5. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
LISP |
18 | Per Stenström |
A Cache Consistency Protocol for Multiprocessors with Multistage Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, Israel, June 1989, pp. 407-415, 1989, ACM, 0-89791-319-1. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
18 | Ziya Aral, Ilya Gertner, Greg Schaffer |
Efficient Debugging Primitives for Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-III Proceedings - Third International Conference on Architectural Support for Programming Languages and Operating Systems, Boston, Massachusetts, USA, April 3-6, 1989., pp. 87-95, 1989, ACM Press, 0-89791-300-0. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
18 | Wolf-Dietrich Weber, Anoop Gupta |
Analysis of Cache Invalidation Patterns in Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-III Proceedings - Third International Conference on Architectural Support for Programming Languages and Operating Systems, Boston, Massachusetts, USA, April 3-6, 1989., pp. 243-256, 1989, ACM Press, 0-89791-300-0. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
18 | James R. Goodman, Mary K. Vernon, Philip J. Woest |
Efficent Synchronization Primitives for Large-Scale Cache-Coherent Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-III Proceedings - Third International Conference on Architectural Support for Programming Languages and Operating Systems, Boston, Massachusetts, USA, April 3-6, 1989., pp. 64-75, 1989, ACM Press, 0-89791-300-0. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
18 | Hemant Kanakia, David R. Cheriton |
The VMP network adapter board (NAB): high-performance network communication for multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGCOMM ![In: Proceedings of the ACM Symposium on Communications Architectures and Protocols, SIGCOMM 1988, Stanford, CA, USA, August 16-18, 1988, pp. 175-187, 1988, ACM, 0-89791-279-9. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
18 | Bradley J. Lucier |
Performance Evaluation for Multiprocessors Programmed Using Monitors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1988 ACM SIGMETRICS conference on Measurement and modeling of computer systems, Santa Fe, New Mexico, USA, May 24-27, 1988, pp. 22-29, 1988, ACM, 0-89791-254-3. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
18 | Andrew W. Appel, John R. Ellis, Kai Li 0001 |
Real-Time Concurrent Collection on Stock Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN'88 Conference on Programming Language Design and Implementation (PLDI), Atlanta, Georgia, USA, June 22-24, 1988, pp. 11-20, 1988, ACM, 0-89791-269-1. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
LISP, Modula-2 |
18 | Andrew W. Appel |
Real-time concurrent collection on stock multiprocessors (with retrospective) ![Search on Bibsonomy](Pics/bibsonomy.png) |
Best of PLDI ![In: 20 Years of the ACM SIGPLAN Conference on Programming Language Design and Implementation 1979-1999, A Selection, pp. 205-216, 1988, ACM, 1-58113-623-4. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
18 | Efstratios Gallopoulos, D. Lee |
Boundary integral domain decomposition of hierarchical memory multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 2nd international conference on Supercomputing, ICS 1988, Saint Malo, France, July 4-8, 1988, pp. 488-499, 1988, ACM, 0-89791-272-1. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
18 | Robert J. Fowler, Thomas J. LeBlanc, John M. Mellor-Crummey |
An Integrated Approach to Parallel Program Debugging and Performance Analysis of Large-Scal Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Workshop on Parallel and Distributed Debugging ![In: Proceedings of the ACM SIGPLAN and SIGOPS Workshop on Parallel and Distributed Debugging, University of Wisconsin, Madison, Wisconsin, USA, May 5-6, 1988, pp. 163-173, 1988, ACM, 0-89791-296-9. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
18 | C. Mani Krishna 0001, Kang G. Shin |
Queueing analysis of a canonical model of real-time multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the International Conference on Measurements and Modeling of Computer Systems, SIGMETRICS 1983, August 29-31, 1983, Minneapolis, Minnesota, USA, pp. 175-189, 1983, ACM, 0-89791-112-1. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
|
18 | Michel Dubois 0001, Faye A. Briggs |
Effects of cache coherency in multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 9th International Symposium on Computer Architecture (ISCA 1982), Austin, TX, USA, April 26-29, 1982, pp. 299-308, 1982, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP BibTeX RDF |
|
18 | Javier Lira, Carlos Molina, Antonio González 0001 |
The auction: optimizing banks usage in Non-Uniform Cache Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 24th International Conference on Supercomputing, 2010, Tsukuba, Ibaraki, Japan, June 2-4, 2010, pp. 37-47, 2010, ACM, 978-1-4503-0018-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
bank replacement policy, non-uniform cache architecture (NUCA), chip multiprocessors (CMP) |
18 | Eddy Z. Zhang, Yunlian Jiang, Xipeng Shen |
Does cache sharing on modern CMP matter to the performance of contemporary multithreaded programs? ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2010, Bangalore, India, January 9-14, 2010, pp. 203-212, 2010, ACM, 978-1-60558-877-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
parallel program optimizations, chip multiprocessors, shared cache, thread scheduling |
18 | Guy E. Blelloch, Phillip B. Gibbons, Harsha Vardhan Simhadri |
Low depth cache-oblivious algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2010: Proceedings of the 22nd Annual ACM Symposium on Parallelism in Algorithms and Architectures, Thira, Santorini, Greece, June 13-15, 2010, pp. 189-199, 2010, ACM, 978-1-4503-0079-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
sparse-matrix vector multiply, schedulers, parallel algorithms, multiprocessors, sorting, graph algorithms, cache-oblivious algorithms |
18 | Cor Meenderinck, Arnaldo Azevedo, Ben H. H. Juurlink, Mauricio Alvarez 0001, Alex Ramírez |
Parallel Scalability of Video Decoders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 57(2), pp. 173-194, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Scalability, Parallel processing, Chip multiprocessors, H.264, Video codecs |
18 | Suk-Bok Lee, Sai-Wang Tam, Ioannis Pefkianakis, Songwu Lu, M. Frank Chang, Chuanxiong Guo, Glenn Reinman, Chunyi Peng 0001, Mishali Naik, Lixia Zhang 0001, Jason Cong |
A scalable micro wireless interconnect structure for CMPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MobiCom ![In: Proceedings of the 15th Annual International Conference on Mobile Computing and Networking, MOBICOM 2009, Beijing, China, September 20-25, 2009, pp. 217-228, 2009, ACM, 978-1-60558-702-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
on-chip wireless interconnection network, chip multiprocessors |
18 | James H. Anderson, Vasile Bud, UmaMaheswari C. Devi |
An EDF-based restricted-migration scheduling algorithm for multiprocessor soft real-time systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Syst. ![In: Real Time Syst. 38(2), pp. 85-131, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Scheduling, Multiprocessors, Partitioning, Migrations, Earliest-deadline-first, Soft real-time, Global scheduling, Tardiness |
18 | Fredrik Warg, Per Stenström |
Dual-thread Speculation: A Simple Approach to Uncover Thread-level Parallelism on a Simultaneous Multithreaded Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 36(2), pp. 166-183, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Computer architecture, Chip multiprocessors, Thread-level speculation, Thread-level parallelism, Simultaneous multithreading |
18 | F. Ryan Johnson, JoAnn M. Paul |
Interrupt modeling for efficient high-level scheduler design space exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 13(1), pp. 10:1-10:22, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
scenario oriented design, MESH, Heterogeneous chip multiprocessors |
18 | Jianguo Yao, Xue Liu 0001, Mingxuan Yuan, Zonghua Gu 0001 |
Online adaptive utilization control for real-time embedded multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 85-90, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multiprocessors, real-time scheduling, feedback control |
18 | Nidhi Aggarwal, Parthasarathy Ranganathan, Norman P. Jouppi, James E. Smith 0001 |
Isolation in Commodity Multicore Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 40(6), pp. 49-59, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
chip multiprocessors, multicore processors, fault isolation |
18 | Niti Madan, Rajeev Balasubramonian |
Power Efficient Approaches to Redundant Multithreading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 18(8), pp. 1066-1079, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
redundant multi-threading (RMT), dynamic frequency scaling, Reliability, power, soft errors, transient faults, heterogeneous chip multiprocessors |
18 | Sebastian Burckhardt, Rajeev Alur, Milo M. K. Martin |
CheckFence: checking consistency of concurrent data types on relaxed memory models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN 2007 Conference on Programming Language Design and Implementation, San Diego, California, USA, June 10-13, 2007, pp. 12-21, 2007, ACM, 978-1-59593-633-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
lock-free synchronization, shared-memory multiprocessors, multi-threading, software model checking, memory models, sequential consistency, concurrent data structures |
18 | Sungjune Youn, Hyunhee Kim, Jihong Kim 0001 |
A reusability-aware cache memory sharing technique for high-performance low-power CMPs with private L2 caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007, Portland, OR, USA, August 27-29, 2007, pp. 56-61, 2007, ACM, 978-1-59593-709-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
chip multiprocessors (CMPS), performance, embedded systems, architecture, low-power, L2 cache |
18 | Anders Gidenstam, Marina Papatriantafilou |
LFthreads: A Lock-Free Thread Library. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OPODIS ![In: Principles of Distributed Systems, 11th International Conference, OPODIS 2007, Guadeloupe, French West Indies, December 17-20, 2007. Proceedings, pp. 217-231, 2007, Springer, 978-3-540-77095-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
synchronization, multiprocessors, shared memory, multithreading, multicores, lock-free |
18 | Nidhi Aggarwal, Parthasarathy Ranganathan, Norman P. Jouppi, James E. Smith 0001 |
Configurable isolation: building high availability systems with commodity multi-core processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 34th International Symposium on Computer Architecture (ISCA 2007), June 9-13, 2007, San Diego, California, USA, pp. 470-481, 2007, ACM, 978-1-59593-706-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
chip multiprocessors, high availability, fault isolation |
18 | Luis Ceze, James Tuck 0001, Pablo Montesinos, Josep Torrellas |
BulkSC: bulk enforcement of sequential consistency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 34th International Symposium on Computer Architecture (ISCA 2007), June 9-13, 2007, San Diego, California, USA, pp. 278-289, 2007, ACM, 978-1-59593-706-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
bulk, chip multiprocessors, programmability, sequential consistency, memory consistency models |
18 | Shimin Chen, Phillip B. Gibbons, Michael Kozuch, Vasileios Liaskovitis, Anastassia Ailamaki, Guy E. Blelloch, Babak Falsafi, Limor Fix, Nikos Hardavellas, Todd C. Mowry, Chris Wilkerson |
Scheduling threads for constructive cache sharing on CMPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2007: Proceedings of the 19th Annual ACM Symposium on Parallelism in Algorithms and Architectures, San Diego, California, USA, June 9-11, 2007, pp. 105-115, 2007, ACM, 978-1-59593-667-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
constructive cache sharing, parallel depth first, thread granularity, working set profiling, chip multiprocessors, scheduling algorithms, work stealing |
18 | Jose Renau, Karin Strauss, Luis Ceze, Wei Liu 0014, Smruti R. Sarangi, James Tuck 0001, Josep Torrellas |
Energy-Efficient Thread-Level Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 26(1), pp. 80-91, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
out-of-order task spawning, chip multiprocessors, Thread-level speculation |
18 | Weiwu Hu, Rui Hou, Jun-Hua Xiao, Long-Bin Zhang |
High Performance General-Purpose Microprocessors: Past and Future. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 21(5), pp. 631-640, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
high performance general-purpose microprocessor, Godson processor, chip multiprocessors, instruction level parallelism, thread level parallelism, data level parallelism |
18 | Iñigo Artundo, Daniel Manjarres, Wim Heirman, Christof Debaes, Joni Dambre, Jan M. Van Campenhout, Hugo Thienpont |
Reconfigurable Interconnects in DSM Systems: A Focus on Context Switch Behavior. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA Workshops ![In: Frontiers of High Performance Computing and Networking - ISPA 2006 Workshops, ISPA 2006 International Workshops, FHPCN, XHPC, S-GRACE, GridGIS, HPC-GTP, PDCE, ParDMCom, WOMP, ISDF, and UPWN, Sorrento, Italy, December 4-7, 2006, Proceedings, pp. 311-321, 2006, Springer, 3-540-49860-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
interconnection network, multiprocessors, Reconfiguration, distributed shared memory, context switch |
18 | Vasileios Liaskovitis, Shimin Chen, Phillip B. Gibbons, Anastassia Ailamaki, Guy E. Blelloch, Babak Falsafi, Limor Fix, Nikos Hardavellas, Michael Kozuch, Todd C. Mowry, Chris Wilkerson |
Parallel depth first vs. work stealing schedulers on CMP architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2006: Proceedings of the 18th Annual ACM Symposium on Parallelism in Algorithms and Architectures, Cambridge, Massachusetts, USA, July 30 - August 2, 2006, pp. 330, 2006, ACM, 1-59593-452-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
scheduling, caches, chip multiprocessors |
18 | Shimin Chen, Babak Falsafi, Phillip B. Gibbons, Michael Kozuch, Todd C. Mowry, Radu Teodorescu, Anastassia Ailamaki, Limor Fix, Gregory R. Ganger, Bin Lin 0002, Steven W. Schlosser |
Log-based architectures for general-purpose monitoring of deployed code. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASID ![In: Proceedings of the 1st Workshop on Architectural and System Support for Improving Software Dependability, ASID 2006, San Jose, California, USA, October 21, 2006, pp. 63-65, 2006, ACM, 1-59593-576-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
general-purpose task monitoring, log-based architectures, chip multiprocessors |
18 | Qiang Wu, Philo Juang, Margaret Martonosi, Li-Shiuan Peh, Douglas W. Clark |
Formal Control Techniques for Power-Performance Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 25(5), pp. 52-62, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Power performance management, dynamic voltage, frequency sealing, chip multiprocessors, multiple-clock-domain |
18 | Gaëlle Largeteau, Dominique Geniet, Eric Andres |
Discrete Geometry Applied in Hard Real-Time Systems Validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DGCI ![In: Discrete Geometry for Computer Imagery, 12th International Conference, DGCI 2005, Poitiers, France, April 13-15, 2005, Proceedings, pp. 23-33, 2005, Springer, 3-540-25513-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
operational validation, Real-time, multiprocessors, geometrical modeling, resource sharing |
18 | Manohar K. Prabhu, Kunle Olukotun |
Exposing speculative thread parallelism in SPEC2000. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2005, June 15-17, 2005, Chicago, IL, USA, pp. 142-152, 2005, ACM, 1-59593-080-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
SPEC CPU2000, feedback-driven optimization, manual parallel programming, chip multiprocessors, multithreading, thread-level speculation |
18 | Lisa Higham, Jalal Kawash |
Impact of Instruction Re-Ordering on the Correctness of Shared-Memory Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 8th International Symposium on Parallel Architectures, Algorithms, and Networks, ISPAN 2005, December 7-9. 2005, Las Vegas, Nevada, USA, pp. 25-32, 2005, IEEE Computer Society, 0-7695-2509-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Instruction re-ordering, High-performance multiprocessors, Mutual exclusion, Sequential consistency, Critical Sections, Memory consistency models |
18 | Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee |
Reducing False Sharing and Improving Spatial Locality in a Unified Compilation Framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 14(4), pp. 337-354, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
loop and memory layout transformations, shared-memory multiprocessors, Data reuse, cache locality, false sharing |
18 | Jim Nilsson, Anders Landin, Per Stenström |
The Coherence Predictor Cache: A Resource-Efficient and Accurate Coherence Prediction Infrastructure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings, pp. 10, 2003, IEEE Computer Society, 0-7695-1926-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
coherence message prediction, memory overhead, caches, Shared-memory multiprocessors |
18 | V. Carl Hamacher, Hong Jiang |
Hierarchical Ring Network Configuration and Performance Modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(1), pp. 1-12, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
hierarchical rings, message-passing performance, Interconnection networks, shared-memory multiprocessors, queuing models, slotted rings |
18 | Min-You Wu, Wei Shu, Jun Gu |
Efficient Local Search for DAG Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 12(6), pp. 617-627, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
fast local search, complexity, multiprocessors, quality, DAG scheduling |
18 | Csaba Andras Moritz, Donald Yeung, Anant Agarwal |
SimpleFit: A Framework for Analyzing Design Trade-Offs in Raw Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 12(7), pp. 730-742, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
modeling, architecture, Multiprocessors, microprocessors |
18 | Young-Joo Suh, Binh Vien Dao, José Duato, Sudhakar Yalamanchili |
Software-Based Rerouting for Fault-Tolerant Pipelined Communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 11(3), pp. 193-211, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
E-cube routing, livelock freedom, fault tolerance, interconnection networks, multiprocessors, adaptive routing, wormhole switching, oblivious routing, deadlock freedom, virtual cut-through switching |
18 | Luiz André Barroso, Kourosh Gharachorloo, Andreas Nowatzyk, Ben Verghese |
Impact of Chip-Level Integration on Performance of OLTP Workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, Toulouse, France, January 8-12, 2000, pp. 3-14, 2000, IEEE Computer Society, 0-7695-0550-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
chip-level integration, database workloads, multiprocessors, memory system performance |
18 | Hock-Beng Lim, Pen-Chung Yew |
Efficient Integration of Compiler-Directed Cache Coherence and Data Prefetching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), Cancun, Mexico, May 1-5, 2000, pp. 331-340, 2000, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Compiler-directed Cache Coherence, Shared-memory Multiprocessors, Data Prefetching, Memory System Design |
18 | Takayuki Sato, Kazuhiko Ohno, Hiroshi Nakashima |
A Mechanism for Speculative Memory Accesses Following Synchronizing Operations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), Cancun, Mexico, May 1-5, 2000, pp. 145-154, 2000, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
synchronization, shared memory multiprocessors, speculative execution |
18 | Marius Pirvu, Nan Ni, Laxmi N. Bhuyan |
Exploring the Switch Design Space in a CC-NUMA Multiprocessor Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), Cancun, Mexico, May 1-5, 2000, pp. 703-710, 2000, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
input buffer management, CC-NUMA multiprocessors, performance evaluation, arbitration, execution driven simulation, switch design |
18 | Zheng Zhang 0001, Marcelo H. Cintra, Josep Torrellas |
Excel-NUMA: Toward Programmability, Simplicity, and High Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(2), pp. 256-264, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
NUMA organizations, performance evaluation, caches, Shared-memory multiprocessors, cache-coherence protocols |
18 | Chi-Keung Luk, Todd C. Mowry |
Automatic Compiler-Inserted Prefetching for Pointer-Based Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(2), pp. 134-141, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
pointer-based applications, performance evaluation, Caches, prefetching, compiler optimization, shared-memory multiprocessors, recursive data structures |
18 | Zhiyuan Li 0001 |
Reducing Cache Conflicts by Partitioning and Privatizing Shared Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques, Newport Beach, California, USA, October 12-16, 1999, pp. 183-190, 1999, IEEE Computer Society, 0-7695-0425-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
set conflicts, array privatization, caches, shared-memory multiprocessors, Optimizing compilers |
18 | Xavier Verians, Jean-Didier Legat, Jean-Jacques Quisquater, Benoît Macq |
A Graph-Oriented Task Manager for Small Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31 - September 3, 1999, Proceedings, pp. 735-744, 1999, Springer, 3-540-66443-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
parallelism, synchronization, multiprocessors, dependence graph |
18 | Xavier Verians, Jean-Didier Legat, Jean-Jacques Quisquater, Benoît Macq |
A New Parallelism Management Scheme for Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACPC ![In: Parallel Computation, 4th International ACPC Conference Including Special Tracks on Parallel Numerics (ParNum'99) and Parallel Computing in Image Processing, Video Processing, and Multimedia, Salzburg, Austria, February 1999, Proceedings, pp. 246-256, 1999, Springer, 3-540-65641-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
parallelism, multiprocessors, task scheduling, task graph |
18 | Fong Pong, Michel Dubois 0001 |
Formal Verification of Complex Coherence Protocols Using Symbolic State Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. ACM ![In: J. ACM 45(4), pp. 557-587, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
state abstraction, state enumeration methods, formal methods, shared-memory multiprocessors, cache coherence protocols |
18 | Sumit Roy 0002, Vipin Chaudhary |
Strings: A High-Performance Distributed Shared Memory for Symmetrical Multiprocessor Clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPDC ![In: Proceedings of the Seventh IEEE International Symposium on High Performance Distributed Computing, HPDC '98, Chicago, Illinois, USA, July 28-31, 1998., pp. 90-97, 1998, IEEE Computer Society, 0-8186-8579-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Performance Evaluation, Cluster computing, Multithreading, Distributed Shared Memory, Symmetrical Multiprocessors |
18 | Josep Torrellas, Zheng Zhang 0001 |
The Performance of the Cedar Multistage Switching Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 8(4), pp. 321-336, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Multistage switching networks, vector multiprocessors, performance evaluation, experimental analysis, address tracing |
18 | JunSeong Kim, David J. Lilja |
Exploiting multiple heterogeneous networks to reduce communication costs in parallel programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Heterogeneous Computing Workshop ![In: 6th Heterogeneous Computing Workshop, HCW 1997, Geneva, Switzerland, April 1, 1997, pp. 83-95, 1997, IEEE Computer Society, 0-8186-7879-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
multiple heterogeneous networks, parallel application program, HiPPI, multiple parallel networks, SGI multiprocessors, distributed system, parallel programs, delays, multiplexing, communication costs, virtual network, Fibre Channel |
18 | Hea-Sook Park, Sung-Jin Moon, Man-Sik Park, Boseob Kwon, Kwang-Suk Song |
Design of inter processor communication controller using ATM switch and analysis of its optimal message length considering retransmission. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 4th International Workshop on Real-Time Computing Systems and Applications (RTCSA '97), 27-29 October 1997, Taipei, Taiwan, pp. 18-25, 1997, IEEE Computer Society, 0-8186-8073-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
inter processor communication controller, optimal message length, distributed large-scale multiprocessors, ATM adaptation layer, message error rate, message retransmission rate, asynchronous transfer mode, ATM switch, asynchronous transfer mode switches |
18 | Kuang-Chih Liu, Chung-Ta King |
On the effectiveness of sectored caches in reducing false sharing misses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 11-13 December 1997, Seoul, Korea, Proceedings, pp. 352-359, 1997, IEEE Computer Society, 0-8186-8227-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
sectored caches, false sharing misses, bus-based multiprocessors, coherence unit, MESI protocol, LU, SORBYR, SORBYC, benchmarks, FFT, performance metric, cache storage, Radix |
18 | Patrik Sundström, Per Andersson |
ATM network interface architectures for low latency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCCN ![In: Proceedings of the International Conference On Computer Communications and Networks (ICCCN 1997), September 22-25, 1997 Las Vegas, NV, USA, pp. 494-499, 1997, IEEE Computer Society, 0-8186-8186-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
ATM network interface architectures, network interface design, low message latency, asynchronous transfer mode, shared memory multiprocessors, distributed architecture, LAN, workstation network, dedicated hardware |
18 | Michael J. Flynn |
What's ahead in computer design? ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 23rd EUROMICRO Conference '97, New Frontiers of Information Technology, 1-4 September 1997, Budapest, Hungary, pp. 4-, 1997, IEEE Computer Society, 0-8186-8129-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
die area improvement, very high level superscalar processors, very large cache, pin bandwidth, processor complexity, scalability, multiprocessors, logic design, instruction level parallelism, VLIW, CMOS technology, lithography, cycle time, computer design, silicon area, cache size |
18 | Vincent Habchi, Christoph Siegelin, Gérard Mouret, Ulrich Finger |
The WARPmemory prototype: design and performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 23rd EUROMICRO Conference '97, New Frontiers of Information Technology, 1-4 September 1997, Budapest, Hungary, pp. 346-350, 1997, IEEE Computer Society, 0-8186-8129-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
WARPmemory prototype, high performance multiprocessors, communication grain, low-cost standard technology, speed-versus-cost trade-offs, mesh of workstations, shared memory systems, shared memory systems, Distributed Shared Memory, optimal design, multiprocessor network |
18 | David Parry 0001 |
Scalability in computing for today and tomorrow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 17th Conference on Advanced Research in VLSI (ARVLSI '97), September 15-16, 1997, Ann Arbor, MI, USA, pp. 12-31, 1997, IEEE Computer Society, 0-8186-7913-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
synergistic combination, performance growth, current multiprocessor alternatives, scalable SMP, Silicon Graphics Origin multiprocessor, S/sup 2/MP memory architecture, core technologies, scalability, system architecture, shared-memory multiprocessors, shared memory systems |
18 | Arun K. Nanda, Lionel M. Ni |
MAD Kernels: An Experimental Testbed to Study Multiprocessor Memory System Behavior. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 7(2), pp. 207-217, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
memory access patterns, Performance evaluation, interconnection networks, memory hierarchy, shared-memory multiprocessors, resource contention, synchronization overhead |
18 | Philippe Lacroute |
Analysis of a Parallel Volume Rendering System Based on the Shear-Warp Factorization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Vis. Comput. Graph. ![In: IEEE Trans. Vis. Comput. Graph. 2(3), pp. 218-231, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
parallel algorithms for shared memory multiprocessors, shear-warp factorization, coherence optimizations, image partition, multiprocessor performance analysis, Volume rendering |
18 | Kelvin K. Yue, David J. Lilja |
Efficient Execution of Parallel Applications in Multiprogrammed Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '96, The 10th International Parallel Processing Symposium, April 15-19, 1996, Honolulu, Hawaii, USA, pp. 448-456, 1996, IEEE Computer Society, 0-8186-7255-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
operating system, performance measurement, shared-memory multiprocessors, multiprogramming, processor allocation, process scheduling |
18 | Xiaojie Li, Kenichi Harada |
An efficient asynchronous data transmission mechanism for data parallel languages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1996 International Conference on Parallel and Distributed Systems (ICPADS '96), June 3-6, 1996, Tokyo, Japan, Proceedings, pp. 238-, 1996, IEEE Computer Society, 0-8186-7267-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
asynchronous data transmission mechanism, linguistic support, array references, N-level message queue, exact data-flow analysis, data transmission requests, SPMD code, parallel programming, compilers, program compilers, distributed memory systems, parallel languages, optimization techniques, distributed memory multiprocessors, data parallel languages |
18 | Injong Rhee |
Optimizing a FIFO, scalable spin lock using consistent memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTSS ![In: Proceedings of the 17th IEEE Real-Time Systems Symposium (RTSS '96), December 4-6, 1996, Washington, DC, USA, pp. 106-114, 1996, IEEE Computer Society, 0-8186-7689-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
FIFO optimization, scalable spin lock, consistent memory, FIFO queue based scalable spin lock, non atomic read, atomic swap operation, timing guarantee, scalable mutual exclusion problem, NUMA architectures, FSSL algorithm, write operations, non atomic memory operations, weakly consistent memories, multiprocessors, shared memory systems, real time applications, atomic operations |
18 | Pradeep Prabhakaran, Prithviraj Banerjee |
Parallel Algorithms for Force Directed Scheduling of Flattened and Hierarchical Signal Flow Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1996 International Conference on Computer Design (ICCD '96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings, pp. 66-71, 1996, IEEE Computer Society, 0-8186-7554-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
parallel algorithms, multiprocessors, High-level synthesis, network of workstations, hierarchical graphs, force-directed scheduling |
18 | Nian-Feng Tzeng, Steven J. Wallach |
Issues on the architecture and the design of distributed shared memory systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1996 International Conference on Computer Design (ICCD '96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings, pp. 60-61, 1996, IEEE Computer Society, 0-8186-7554-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
parallel application codes, scalability, architecture, distributed memory systems, programming model, low cost, distributed-memory multiprocessors, distributed shared memory systems |
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