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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 4193 occurrences of 1488 keywords
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Results
Found 3723 publication records. Showing 3723 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
18 | John Chapin, Stephen Alan Herrod, Mendel Rosenblum, Anoop Gupta |
Memory System Performance of UNIX on CC-NUMA Multiprocessors. |
SIGMETRICS |
1995 |
DBLP DOI BibTeX RDF |
|
18 | Robert W. Wisniewski, Leonidas I. Kontothanassis, Michael L. Scott |
High Performance Synchronization Algorithms for Multiprogrammed Multiprocessors. |
PPoPP |
1995 |
DBLP DOI BibTeX RDF |
|
18 | Alvin R. Lebeck, David A. Wood 0001 |
Dynamic Self-Invalidation: Reducing Coherence Overhead in Shared-Memory Multiprocessors. |
ISCA |
1995 |
DBLP DOI BibTeX RDF |
|
18 | Akhilesh Kumar, Phanindra K. Mannava, Laxmi N. Bhuyan |
Efficient and scalable cache coherence schemes for shared memory hypercube multiprocessors. |
SC |
1994 |
DBLP DOI BibTeX RDF |
|
18 | Beng-Hong Lim, Anant Agarwal |
Waiting Algorithms for Synchronization in Large-Scale Multiprocessors. |
ACM Trans. Comput. Syst. |
1993 |
DBLP DOI BibTeX RDF |
producer-consumer synchronization, competitive analysis, locks, blocking, spinning, waiting time, barriers |
18 | Cathy McCann, Raj Vaswani, John Zahorjan |
A Dynamic Processor Allocation Policy for Multiprogrammed Shared-memory Multiprocessors. |
ACM Trans. Comput. Syst. |
1993 |
DBLP DOI BibTeX RDF |
shared memory parallel processors, threads, two-level scheduling |
18 | Hiroyuki Nakahira, Masakatsu Maruyama, Hideshi Ueda, Haruyasu Yamada |
An image processing system using Image Signal Multiprocessors (ISMPs). |
J. VLSI Signal Process. |
1993 |
DBLP DOI BibTeX RDF |
|
18 | Josep Torrellas, Andrew Tucker, Anoop Gupta |
Benefits of Cache-Affinity Scheduling in Shared-Memory Multiprocessors: A Summary. |
SIGMETRICS |
1993 |
DBLP DOI BibTeX RDF |
UNIX System V |
18 | Xiaodong Zhang 0001 |
Dynamic and static load balancing for solving block bordered circuit equations on multiprocessors. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1992 |
DBLP DOI BibTeX RDF |
|
18 | J. E. Smith, W. R. Taylor |
Characterizing memory performance in vector multiprocessors. |
ICS |
1992 |
DBLP DOI BibTeX RDF |
|
18 | Senthil Krishnamoorthy, Alok N. Choudhary |
An Evaluation of Set-Associativity in Two-Level Caches for Shared Memory Multiprocessors. |
PARLE |
1992 |
DBLP DOI BibTeX RDF |
|
18 | Lubomir Bic, John M. A. Roy, Mark Nagel |
Declarative Programming for Conventional MIMD Multiprocessors. |
PARLE |
1992 |
DBLP DOI BibTeX RDF |
|
18 | John M. Mellor-Crummey, Michael L. Scott |
Algorithms for Scalable Synchronization on Shared-Memory Multiprocessors. |
ACM Trans. Comput. Syst. |
1991 |
DBLP DOI BibTeX RDF |
|
18 | Marc Engels, Rudy Lauwereins, J. A. Peperstraete |
Rapid Prototyping for DSP Systems with Multiprocessors. |
IEEE Des. Test Comput. |
1991 |
DBLP DOI BibTeX RDF |
|
18 | Thomas Bemmerl, Arndt Bode |
An Integrated Environment for Programming Distributed Memory Multiprocessors. |
EDMCC |
1991 |
DBLP DOI BibTeX RDF |
|
18 | Agustín Fernández, José M. Llabería, Juan J. Navarro, Miguel Valero-García |
Interleaving Partitions of Systolic Algorithms for Programming Distributed Memory Multiprocessors. |
EDMCC |
1991 |
DBLP DOI BibTeX RDF |
|
18 | Jordi Torres, Eduard Ayguadé, Jesús Labarta, José M. Llabería, Mateo Valero |
On Automatic Loop Data-Mapping for Distributed-Memory Multiprocessors. |
EDMCC |
1991 |
DBLP DOI BibTeX RDF |
|
18 | Songnian Zhou, Tim Brecht |
Processor-Pool-Based Scheduling for Large-Scale NUMA Multiprocessors. |
SIGMETRICS |
1991 |
DBLP DOI BibTeX RDF |
|
18 | Steven L. Scott, Gurindar S. Sohi |
The Use of Feedback in Multiprocessors and Its Application to Tree Saturation Control. |
IEEE Trans. Parallel Distributed Syst. |
1990 |
DBLP DOI BibTeX RDF |
tree saturation control, feedback control schemes, hot-spot accesses, feedback, feedback, multiprocessor interconnection networks, multiprocessing systems, multiprocessor systems, multistage interconnection networks |
18 | Manu Thapar, Bruce Delagi |
Scalable Cache Coherence for Large Shared Memory Multiprocessors. |
CONPAR |
1990 |
DBLP DOI BibTeX RDF |
|
18 | Sang Lyul Min, Jean-Loup Baer, Hyoung-Joo Kim |
An efficient caching support for critical sections in large-scale shared-memory multiprocessors. |
ICS |
1990 |
DBLP DOI BibTeX RDF |
|
18 | Vittorio Zecca, Aladin Kamel |
Elastodynamics on clustered vector multiprocessors. |
ICS |
1990 |
DBLP DOI BibTeX RDF |
FORTRAN |
18 | Mazin S. Algudady, Chita R. Das, Matthew Thazhuthaveetil |
A write update cache coherence protocol for MIN-based multiprocessors with accessibility-based split caches. |
SC |
1990 |
DBLP DOI BibTeX RDF |
|
18 | Gung-Chung Yang |
PARASPICE: A Parallel Circuit Simulator for Shared-Memory Multiprocessors. |
DAC |
1990 |
DBLP DOI BibTeX RDF |
|
18 | Paul S. Wang |
Parallel Univariate Polynomial Factorization on Shared-Memory Multiprocessors. |
ISSAC |
1990 |
DBLP DOI BibTeX RDF |
|
18 | Thomas E. Anderson, Edward D. Lazowska, Henry M. Levy |
The Performance Implications of Thread Management Alternatives for Shared-Memory Multiprocessors. |
SIGMETRICS |
1989 |
DBLP DOI BibTeX RDF |
|
18 | Andrew Tucker, Anoop Gupta |
Process Control and Scheduling Issues for Multiprogrammed Shared-Memory Multiprocessors. |
SOSP |
1989 |
DBLP DOI BibTeX RDF |
|
18 | Ferenc Szelényi, Wolfgang E. Nagel |
A comparison of parallel processing on Cray X-MP AND IBM 3090 VF multiprocessors. |
ICS |
1989 |
DBLP DOI BibTeX RDF |
FORTRAN |
18 | Krishnan Padmanabhan |
The composite binary cube - a family of interconnection networks for multiprocessors. |
ICS |
1989 |
DBLP DOI BibTeX RDF |
|
18 | James R. Slagle, Ashim Bose, P. Busalacchi, C. Wee |
Enhanced simulated annealing for automatic reconfiguration of multiprocessors in space. |
IEA/AIE (1) |
1989 |
DBLP DOI BibTeX RDF |
LISP |
18 | Per Stenström |
A Cache Consistency Protocol for Multiprocessors with Multistage Networks. |
ISCA |
1989 |
DBLP DOI BibTeX RDF |
|
18 | Ziya Aral, Ilya Gertner, Greg Schaffer |
Efficient Debugging Primitives for Multiprocessors. |
ASPLOS |
1989 |
DBLP DOI BibTeX RDF |
|
18 | Wolf-Dietrich Weber, Anoop Gupta |
Analysis of Cache Invalidation Patterns in Multiprocessors. |
ASPLOS |
1989 |
DBLP DOI BibTeX RDF |
|
18 | James R. Goodman, Mary K. Vernon, Philip J. Woest |
Efficent Synchronization Primitives for Large-Scale Cache-Coherent Multiprocessors. |
ASPLOS |
1989 |
DBLP DOI BibTeX RDF |
|
18 | Hemant Kanakia, David R. Cheriton |
The VMP network adapter board (NAB): high-performance network communication for multiprocessors. |
SIGCOMM |
1988 |
DBLP DOI BibTeX RDF |
|
18 | Bradley J. Lucier |
Performance Evaluation for Multiprocessors Programmed Using Monitors. |
SIGMETRICS |
1988 |
DBLP DOI BibTeX RDF |
|
18 | Andrew W. Appel, John R. Ellis, Kai Li 0001 |
Real-Time Concurrent Collection on Stock Multiprocessors. |
PLDI |
1988 |
DBLP DOI BibTeX RDF |
LISP, Modula-2 |
18 | Andrew W. Appel |
Real-time concurrent collection on stock multiprocessors (with retrospective) |
Best of PLDI |
1988 |
DBLP DOI BibTeX RDF |
|
18 | Efstratios Gallopoulos, D. Lee |
Boundary integral domain decomposition of hierarchical memory multiprocessors. |
ICS |
1988 |
DBLP DOI BibTeX RDF |
|
18 | Robert J. Fowler, Thomas J. LeBlanc, John M. Mellor-Crummey |
An Integrated Approach to Parallel Program Debugging and Performance Analysis of Large-Scal Multiprocessors. |
Workshop on Parallel and Distributed Debugging |
1988 |
DBLP DOI BibTeX RDF |
|
18 | C. Mani Krishna 0001, Kang G. Shin |
Queueing analysis of a canonical model of real-time multiprocessors. |
SIGMETRICS |
1983 |
DBLP DOI BibTeX RDF |
|
18 | Michel Dubois 0001, Faye A. Briggs |
Effects of cache coherency in multiprocessors. |
ISCA |
1982 |
DBLP BibTeX RDF |
|
18 | Javier Lira, Carlos Molina, Antonio González 0001 |
The auction: optimizing banks usage in Non-Uniform Cache Architectures. |
ICS |
2010 |
DBLP DOI BibTeX RDF |
bank replacement policy, non-uniform cache architecture (NUCA), chip multiprocessors (CMP) |
18 | Eddy Z. Zhang, Yunlian Jiang, Xipeng Shen |
Does cache sharing on modern CMP matter to the performance of contemporary multithreaded programs? |
PPoPP |
2010 |
DBLP DOI BibTeX RDF |
parallel program optimizations, chip multiprocessors, shared cache, thread scheduling |
18 | Guy E. Blelloch, Phillip B. Gibbons, Harsha Vardhan Simhadri |
Low depth cache-oblivious algorithms. |
SPAA |
2010 |
DBLP DOI BibTeX RDF |
sparse-matrix vector multiply, schedulers, parallel algorithms, multiprocessors, sorting, graph algorithms, cache-oblivious algorithms |
18 | Cor Meenderinck, Arnaldo Azevedo, Ben H. H. Juurlink, Mauricio Alvarez 0001, Alex Ramírez |
Parallel Scalability of Video Decoders. |
J. Signal Process. Syst. |
2009 |
DBLP DOI BibTeX RDF |
Scalability, Parallel processing, Chip multiprocessors, H.264, Video codecs |
18 | Suk-Bok Lee, Sai-Wang Tam, Ioannis Pefkianakis, Songwu Lu, M. Frank Chang, Chuanxiong Guo, Glenn Reinman, Chunyi Peng 0001, Mishali Naik, Lixia Zhang 0001, Jason Cong |
A scalable micro wireless interconnect structure for CMPs. |
MobiCom |
2009 |
DBLP DOI BibTeX RDF |
on-chip wireless interconnection network, chip multiprocessors |
18 | James H. Anderson, Vasile Bud, UmaMaheswari C. Devi |
An EDF-based restricted-migration scheduling algorithm for multiprocessor soft real-time systems. |
Real Time Syst. |
2008 |
DBLP DOI BibTeX RDF |
Scheduling, Multiprocessors, Partitioning, Migrations, Earliest-deadline-first, Soft real-time, Global scheduling, Tardiness |
18 | Fredrik Warg, Per Stenström |
Dual-thread Speculation: A Simple Approach to Uncover Thread-level Parallelism on a Simultaneous Multithreaded Processor. |
Int. J. Parallel Program. |
2008 |
DBLP DOI BibTeX RDF |
Computer architecture, Chip multiprocessors, Thread-level speculation, Thread-level parallelism, Simultaneous multithreading |
18 | F. Ryan Johnson, JoAnn M. Paul |
Interrupt modeling for efficient high-level scheduler design space exploration. |
ACM Trans. Design Autom. Electr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
scenario oriented design, MESH, Heterogeneous chip multiprocessors |
18 | Jianguo Yao, Xue Liu 0001, Mingxuan Yuan, Zonghua Gu 0001 |
Online adaptive utilization control for real-time embedded multiprocessor systems. |
CODES+ISSS |
2008 |
DBLP DOI BibTeX RDF |
multiprocessors, real-time scheduling, feedback control |
18 | Nidhi Aggarwal, Parthasarathy Ranganathan, Norman P. Jouppi, James E. Smith 0001 |
Isolation in Commodity Multicore Processors. |
Computer |
2007 |
DBLP DOI BibTeX RDF |
chip multiprocessors, multicore processors, fault isolation |
18 | Niti Madan, Rajeev Balasubramonian |
Power Efficient Approaches to Redundant Multithreading. |
IEEE Trans. Parallel Distributed Syst. |
2007 |
DBLP DOI BibTeX RDF |
redundant multi-threading (RMT), dynamic frequency scaling, Reliability, power, soft errors, transient faults, heterogeneous chip multiprocessors |
18 | Sebastian Burckhardt, Rajeev Alur, Milo M. K. Martin |
CheckFence: checking consistency of concurrent data types on relaxed memory models. |
PLDI |
2007 |
DBLP DOI BibTeX RDF |
lock-free synchronization, shared-memory multiprocessors, multi-threading, software model checking, memory models, sequential consistency, concurrent data structures |
18 | Sungjune Youn, Hyunhee Kim, Jihong Kim 0001 |
A reusability-aware cache memory sharing technique for high-performance low-power CMPs with private L2 caches. |
ISLPED |
2007 |
DBLP DOI BibTeX RDF |
chip multiprocessors (CMPS), performance, embedded systems, architecture, low-power, L2 cache |
18 | Anders Gidenstam, Marina Papatriantafilou |
LFthreads: A Lock-Free Thread Library. |
OPODIS |
2007 |
DBLP DOI BibTeX RDF |
synchronization, multiprocessors, shared memory, multithreading, multicores, lock-free |
18 | Nidhi Aggarwal, Parthasarathy Ranganathan, Norman P. Jouppi, James E. Smith 0001 |
Configurable isolation: building high availability systems with commodity multi-core processors. |
ISCA |
2007 |
DBLP DOI BibTeX RDF |
chip multiprocessors, high availability, fault isolation |
18 | Luis Ceze, James Tuck 0001, Pablo Montesinos, Josep Torrellas |
BulkSC: bulk enforcement of sequential consistency. |
ISCA |
2007 |
DBLP DOI BibTeX RDF |
bulk, chip multiprocessors, programmability, sequential consistency, memory consistency models |
18 | Shimin Chen, Phillip B. Gibbons, Michael Kozuch, Vasileios Liaskovitis, Anastassia Ailamaki, Guy E. Blelloch, Babak Falsafi, Limor Fix, Nikos Hardavellas, Todd C. Mowry, Chris Wilkerson |
Scheduling threads for constructive cache sharing on CMPs. |
SPAA |
2007 |
DBLP DOI BibTeX RDF |
constructive cache sharing, parallel depth first, thread granularity, working set profiling, chip multiprocessors, scheduling algorithms, work stealing |
18 | Jose Renau, Karin Strauss, Luis Ceze, Wei Liu 0014, Smruti R. Sarangi, James Tuck 0001, Josep Torrellas |
Energy-Efficient Thread-Level Speculation. |
IEEE Micro |
2006 |
DBLP DOI BibTeX RDF |
out-of-order task spawning, chip multiprocessors, Thread-level speculation |
18 | Weiwu Hu, Rui Hou, Jun-Hua Xiao, Long-Bin Zhang |
High Performance General-Purpose Microprocessors: Past and Future. |
J. Comput. Sci. Technol. |
2006 |
DBLP DOI BibTeX RDF |
high performance general-purpose microprocessor, Godson processor, chip multiprocessors, instruction level parallelism, thread level parallelism, data level parallelism |
18 | Iñigo Artundo, Daniel Manjarres, Wim Heirman, Christof Debaes, Joni Dambre, Jan M. Van Campenhout, Hugo Thienpont |
Reconfigurable Interconnects in DSM Systems: A Focus on Context Switch Behavior. |
ISPA Workshops |
2006 |
DBLP DOI BibTeX RDF |
interconnection network, multiprocessors, Reconfiguration, distributed shared memory, context switch |
18 | Vasileios Liaskovitis, Shimin Chen, Phillip B. Gibbons, Anastassia Ailamaki, Guy E. Blelloch, Babak Falsafi, Limor Fix, Nikos Hardavellas, Michael Kozuch, Todd C. Mowry, Chris Wilkerson |
Parallel depth first vs. work stealing schedulers on CMP architectures. |
SPAA |
2006 |
DBLP DOI BibTeX RDF |
scheduling, caches, chip multiprocessors |
18 | Shimin Chen, Babak Falsafi, Phillip B. Gibbons, Michael Kozuch, Todd C. Mowry, Radu Teodorescu, Anastassia Ailamaki, Limor Fix, Gregory R. Ganger, Bin Lin 0002, Steven W. Schlosser |
Log-based architectures for general-purpose monitoring of deployed code. |
ASID |
2006 |
DBLP DOI BibTeX RDF |
general-purpose task monitoring, log-based architectures, chip multiprocessors |
18 | Qiang Wu, Philo Juang, Margaret Martonosi, Li-Shiuan Peh, Douglas W. Clark |
Formal Control Techniques for Power-Performance Management. |
IEEE Micro |
2005 |
DBLP DOI BibTeX RDF |
Power performance management, dynamic voltage, frequency sealing, chip multiprocessors, multiple-clock-domain |
18 | Gaëlle Largeteau, Dominique Geniet, Eric Andres |
Discrete Geometry Applied in Hard Real-Time Systems Validation. |
DGCI |
2005 |
DBLP DOI BibTeX RDF |
operational validation, Real-time, multiprocessors, geometrical modeling, resource sharing |
18 | Manohar K. Prabhu, Kunle Olukotun |
Exposing speculative thread parallelism in SPEC2000. |
PPoPP |
2005 |
DBLP DOI BibTeX RDF |
SPEC CPU2000, feedback-driven optimization, manual parallel programming, chip multiprocessors, multithreading, thread-level speculation |
18 | Lisa Higham, Jalal Kawash |
Impact of Instruction Re-Ordering on the Correctness of Shared-Memory Programs. |
ISPAN |
2005 |
DBLP DOI BibTeX RDF |
Instruction re-ordering, High-performance multiprocessors, Mutual exclusion, Sequential consistency, Critical Sections, Memory consistency models |
18 | Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee |
Reducing False Sharing and Improving Spatial Locality in a Unified Compilation Framework. |
IEEE Trans. Parallel Distributed Syst. |
2003 |
DBLP DOI BibTeX RDF |
loop and memory layout transformations, shared-memory multiprocessors, Data reuse, cache locality, false sharing |
18 | Jim Nilsson, Anders Landin, Per Stenström |
The Coherence Predictor Cache: A Resource-Efficient and Accurate Coherence Prediction Infrastructure. |
IPDPS |
2003 |
DBLP DOI BibTeX RDF |
coherence message prediction, memory overhead, caches, Shared-memory multiprocessors |
18 | V. Carl Hamacher, Hong Jiang |
Hierarchical Ring Network Configuration and Performance Modeling. |
IEEE Trans. Computers |
2001 |
DBLP DOI BibTeX RDF |
hierarchical rings, message-passing performance, Interconnection networks, shared-memory multiprocessors, queuing models, slotted rings |
18 | Min-You Wu, Wei Shu, Jun Gu |
Efficient Local Search for DAG Scheduling. |
IEEE Trans. Parallel Distributed Syst. |
2001 |
DBLP DOI BibTeX RDF |
fast local search, complexity, multiprocessors, quality, DAG scheduling |
18 | Csaba Andras Moritz, Donald Yeung, Anant Agarwal |
SimpleFit: A Framework for Analyzing Design Trade-Offs in Raw Architectures. |
IEEE Trans. Parallel Distributed Syst. |
2001 |
DBLP DOI BibTeX RDF |
modeling, architecture, Multiprocessors, microprocessors |
18 | Young-Joo Suh, Binh Vien Dao, José Duato, Sudhakar Yalamanchili |
Software-Based Rerouting for Fault-Tolerant Pipelined Communication. |
IEEE Trans. Parallel Distributed Syst. |
2000 |
DBLP DOI BibTeX RDF |
E-cube routing, livelock freedom, fault tolerance, interconnection networks, multiprocessors, adaptive routing, wormhole switching, oblivious routing, deadlock freedom, virtual cut-through switching |
18 | Luiz André Barroso, Kourosh Gharachorloo, Andreas Nowatzyk, Ben Verghese |
Impact of Chip-Level Integration on Performance of OLTP Workloads. |
HPCA |
2000 |
DBLP DOI BibTeX RDF |
chip-level integration, database workloads, multiprocessors, memory system performance |
18 | Hock-Beng Lim, Pen-Chung Yew |
Efficient Integration of Compiler-Directed Cache Coherence and Data Prefetching. |
IPDPS |
2000 |
DBLP DOI BibTeX RDF |
Compiler-directed Cache Coherence, Shared-memory Multiprocessors, Data Prefetching, Memory System Design |
18 | Takayuki Sato, Kazuhiko Ohno, Hiroshi Nakashima |
A Mechanism for Speculative Memory Accesses Following Synchronizing Operations. |
IPDPS |
2000 |
DBLP DOI BibTeX RDF |
synchronization, shared memory multiprocessors, speculative execution |
18 | Marius Pirvu, Nan Ni, Laxmi N. Bhuyan |
Exploring the Switch Design Space in a CC-NUMA Multiprocessor Environment. |
IPDPS |
2000 |
DBLP DOI BibTeX RDF |
input buffer management, CC-NUMA multiprocessors, performance evaluation, arbitration, execution driven simulation, switch design |
18 | Zheng Zhang 0001, Marcelo H. Cintra, Josep Torrellas |
Excel-NUMA: Toward Programmability, Simplicity, and High Performance. |
IEEE Trans. Computers |
1999 |
DBLP DOI BibTeX RDF |
NUMA organizations, performance evaluation, caches, Shared-memory multiprocessors, cache-coherence protocols |
18 | Chi-Keung Luk, Todd C. Mowry |
Automatic Compiler-Inserted Prefetching for Pointer-Based Applications. |
IEEE Trans. Computers |
1999 |
DBLP DOI BibTeX RDF |
pointer-based applications, performance evaluation, Caches, prefetching, compiler optimization, shared-memory multiprocessors, recursive data structures |
18 | Zhiyuan Li 0001 |
Reducing Cache Conflicts by Partitioning and Privatizing Shared Arrays. |
IEEE PACT |
1999 |
DBLP DOI BibTeX RDF |
set conflicts, array privatization, caches, shared-memory multiprocessors, Optimizing compilers |
18 | Xavier Verians, Jean-Didier Legat, Jean-Jacques Quisquater, Benoît Macq |
A Graph-Oriented Task Manager for Small Multiprocessor Systems. |
Euro-Par |
1999 |
DBLP DOI BibTeX RDF |
parallelism, synchronization, multiprocessors, dependence graph |
18 | Xavier Verians, Jean-Didier Legat, Jean-Jacques Quisquater, Benoît Macq |
A New Parallelism Management Scheme for Multiprocessor Systems. |
ACPC |
1999 |
DBLP DOI BibTeX RDF |
parallelism, multiprocessors, task scheduling, task graph |
18 | Fong Pong, Michel Dubois 0001 |
Formal Verification of Complex Coherence Protocols Using Symbolic State Models. |
J. ACM |
1998 |
DBLP DOI BibTeX RDF |
state abstraction, state enumeration methods, formal methods, shared-memory multiprocessors, cache coherence protocols |
18 | Sumit Roy 0002, Vipin Chaudhary |
Strings: A High-Performance Distributed Shared Memory for Symmetrical Multiprocessor Clusters. |
HPDC |
1998 |
DBLP DOI BibTeX RDF |
Performance Evaluation, Cluster computing, Multithreading, Distributed Shared Memory, Symmetrical Multiprocessors |
18 | Josep Torrellas, Zheng Zhang 0001 |
The Performance of the Cedar Multistage Switching Network. |
IEEE Trans. Parallel Distributed Syst. |
1997 |
DBLP DOI BibTeX RDF |
Multistage switching networks, vector multiprocessors, performance evaluation, experimental analysis, address tracing |
18 | JunSeong Kim, David J. Lilja |
Exploiting multiple heterogeneous networks to reduce communication costs in parallel programs. |
Heterogeneous Computing Workshop |
1997 |
DBLP DOI BibTeX RDF |
multiple heterogeneous networks, parallel application program, HiPPI, multiple parallel networks, SGI multiprocessors, distributed system, parallel programs, delays, multiplexing, communication costs, virtual network, Fibre Channel |
18 | Hea-Sook Park, Sung-Jin Moon, Man-Sik Park, Boseob Kwon, Kwang-Suk Song |
Design of inter processor communication controller using ATM switch and analysis of its optimal message length considering retransmission. |
RTCSA |
1997 |
DBLP DOI BibTeX RDF |
inter processor communication controller, optimal message length, distributed large-scale multiprocessors, ATM adaptation layer, message error rate, message retransmission rate, asynchronous transfer mode, ATM switch, asynchronous transfer mode switches |
18 | Kuang-Chih Liu, Chung-Ta King |
On the effectiveness of sectored caches in reducing false sharing misses. |
ICPADS |
1997 |
DBLP DOI BibTeX RDF |
sectored caches, false sharing misses, bus-based multiprocessors, coherence unit, MESI protocol, LU, SORBYR, SORBYC, benchmarks, FFT, performance metric, cache storage, Radix |
18 | Patrik Sundström, Per Andersson |
ATM network interface architectures for low latency. |
ICCCN |
1997 |
DBLP DOI BibTeX RDF |
ATM network interface architectures, network interface design, low message latency, asynchronous transfer mode, shared memory multiprocessors, distributed architecture, LAN, workstation network, dedicated hardware |
18 | Michael J. Flynn |
What's ahead in computer design? |
EUROMICRO |
1997 |
DBLP DOI BibTeX RDF |
die area improvement, very high level superscalar processors, very large cache, pin bandwidth, processor complexity, scalability, multiprocessors, logic design, instruction level parallelism, VLIW, CMOS technology, lithography, cycle time, computer design, silicon area, cache size |
18 | Vincent Habchi, Christoph Siegelin, Gérard Mouret, Ulrich Finger |
The WARPmemory prototype: design and performance. |
EUROMICRO |
1997 |
DBLP DOI BibTeX RDF |
WARPmemory prototype, high performance multiprocessors, communication grain, low-cost standard technology, speed-versus-cost trade-offs, mesh of workstations, shared memory systems, shared memory systems, Distributed Shared Memory, optimal design, multiprocessor network |
18 | David Parry 0001 |
Scalability in computing for today and tomorrow. |
ARVLSI |
1997 |
DBLP DOI BibTeX RDF |
synergistic combination, performance growth, current multiprocessor alternatives, scalable SMP, Silicon Graphics Origin multiprocessor, S/sup 2/MP memory architecture, core technologies, scalability, system architecture, shared-memory multiprocessors, shared memory systems |
18 | Arun K. Nanda, Lionel M. Ni |
MAD Kernels: An Experimental Testbed to Study Multiprocessor Memory System Behavior. |
IEEE Trans. Parallel Distributed Syst. |
1996 |
DBLP DOI BibTeX RDF |
memory access patterns, Performance evaluation, interconnection networks, memory hierarchy, shared-memory multiprocessors, resource contention, synchronization overhead |
18 | Philippe Lacroute |
Analysis of a Parallel Volume Rendering System Based on the Shear-Warp Factorization. |
IEEE Trans. Vis. Comput. Graph. |
1996 |
DBLP DOI BibTeX RDF |
parallel algorithms for shared memory multiprocessors, shear-warp factorization, coherence optimizations, image partition, multiprocessor performance analysis, Volume rendering |
18 | Kelvin K. Yue, David J. Lilja |
Efficient Execution of Parallel Applications in Multiprogrammed Multiprocessor Systems. |
IPPS |
1996 |
DBLP DOI BibTeX RDF |
operating system, performance measurement, shared-memory multiprocessors, multiprogramming, processor allocation, process scheduling |
18 | Xiaojie Li, Kenichi Harada |
An efficient asynchronous data transmission mechanism for data parallel languages. |
ICPADS |
1996 |
DBLP DOI BibTeX RDF |
asynchronous data transmission mechanism, linguistic support, array references, N-level message queue, exact data-flow analysis, data transmission requests, SPMD code, parallel programming, compilers, program compilers, distributed memory systems, parallel languages, optimization techniques, distributed memory multiprocessors, data parallel languages |
18 | Injong Rhee |
Optimizing a FIFO, scalable spin lock using consistent memory. |
RTSS |
1996 |
DBLP DOI BibTeX RDF |
FIFO optimization, scalable spin lock, consistent memory, FIFO queue based scalable spin lock, non atomic read, atomic swap operation, timing guarantee, scalable mutual exclusion problem, NUMA architectures, FSSL algorithm, write operations, non atomic memory operations, weakly consistent memories, multiprocessors, shared memory systems, real time applications, atomic operations |
18 | Pradeep Prabhakaran, Prithviraj Banerjee |
Parallel Algorithms for Force Directed Scheduling of Flattened and Hierarchical Signal Flow Graphs. |
ICCD |
1996 |
DBLP DOI BibTeX RDF |
parallel algorithms, multiprocessors, High-level synthesis, network of workstations, hierarchical graphs, force-directed scheduling |
18 | Nian-Feng Tzeng, Steven J. Wallach |
Issues on the architecture and the design of distributed shared memory systems. |
ICCD |
1996 |
DBLP DOI BibTeX RDF |
parallel application codes, scalability, architecture, distributed memory systems, programming model, low cost, distributed-memory multiprocessors, distributed shared memory systems |
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