Search results for "BDD"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
9	Zhiqiang Lin, Xiangyu Zhang 0001, Dongyan Xu	Convicting exploitable software vulnerabilities: An efficient input provenance based approach.	DSN	2008	DBLP DOI BibTeX RDF
9	Kais Klai, Denis Poitrenaud	MC-SOG: An LTL Model Checker Based on Symbolic Observation Graphs.	Petri Nets	2008	DBLP DOI BibTeX RDF
9	Farn Wang, Geng-Dian Huang	Test Plan Generation for Concurrent Real-Time Systems Based on Zone Coverage Analysis.	TestCom/FATES	2008	DBLP DOI BibTeX RDF
9	Stefan Edelkamp, Peter Kissmann	Limits and Possibilities of BDDs in State Space Search.	KI	2008	DBLP DOI BibTeX RDF
9	Frank Ciesinski, Christel Baier, Marcus Größer, David Parker 0001	Generating Compact MTBDD-Representations from ProbmelaSpecifications.	SPIN	2008	DBLP DOI BibTeX RDF
9	Randal E. Bryant	A View from the Engine Room: Computational Support for Symbolic Model Checking.	25 Years of Model Checking	2008	DBLP DOI BibTeX RDF
9	Martin De Wulf, Laurent Doyen 0001, Nicolas Maquet, Jean-François Raskin	Alaska.	ATVA	2008	DBLP DOI BibTeX RDF
9	Jefferson O. Andrade, Yukiyoshi Kameyama	A Direct Algorithm for Multi-valued Bounded Model Checking.	ATVA	2008	DBLP DOI BibTeX RDF
9	José Vander Meulen, Charles Pecheur	Efficient Symbolic Model Checking for Process Algebras.	FMICS	2008	DBLP DOI BibTeX RDF
9	Hsuan-Po Lin, Jie-Hong Roland Jiang, Ruei-Rung Lee	To SAT or not to SAT: Ashenhurst decomposition in a large scale.	ICCAD	2008	DBLP DOI BibTeX RDF
9	Weiqing Guo, Yu Zhong, Tom Burd	Context-sensitive static transistor-level IR analysis.	ICCAD	2008	DBLP DOI BibTeX RDF
9	Ramasamy Ramachandran	A policy tool on developing a national strategic framework on bridging digital divide: a Malaysian public policy perspective.	ICEGOV	2008	DBLP DOI BibTeX RDF	8-S framework of mukim development, augmentation methodology, census 2000, conversion of rates into index, national strategic framework on bridging digital divide, ninth Malaysia plan, sample survey 2004
9	Azam Beg, P. W. Chandana Prasad, Walid Ibrahim, Emad Abu Shama	Utilizing synthesis to verify Boolean function models.	ISCAS	2008	DBLP DOI BibTeX RDF
9	Dan Zhu, Tun Li, Yang Guo 0003, Sikun Li	2D Decomposition Sequential Equivalence Checking of System Level and RTL Descriptions.	ISQED	2008	DBLP DOI BibTeX RDF	cutpoints, Program slicing, Sequential equivalence checking
9	Emil Dumitrescu, Mingming Ren, Laurent Piétrac, Éric Niel	A supervisor implementation approach in Discrete Controller Synthesis.	ETFA	2008	DBLP DOI BibTeX RDF
9	Pejman Lotfi-Kamran, Mehran Massoumi, Mohammad Mirzaei, Zainalabedin Navabi	Enhanced TED: A New Data Structure for RTL Verification.	VLSI Design	2008	DBLP DOI BibTeX RDF
9	Wanwei Liu, Ji Wang 0001, Huowang Chen, Xiaodong Ma	Symbolic Model Checking APSL.	TASE	2008	DBLP DOI BibTeX RDF	Symbolic model checking, PSL
9	Ruei-Rung Lee, Jie-Hong Roland Jiang, Wei-Lun Hung	Bi-decomposing large Boolean functions via interpolation and satisfiability solving.	DAC	2008	DBLP DOI BibTeX RDF	bi-decomposition, satisfiability, logic synthesis, Craig interpolation
9	Christo Angelov, Xu Ke, Yu Guo, Krzysztof Sierszecki	Reconfigurable State Machine Components for Embedded Applications.	EUROMICRO-SEAA	2008	DBLP DOI BibTeX RDF
9	Sy-Yen Kuo, Fu-Min Yeh, Hung-Yau Lin	Efficient and Exact Reliability Evaluation for Networks With Imperfect Vertices.	IEEE Trans. Reliab.	2007	DBLP DOI BibTeX RDF
9	Gary Hardy, Corinne Lucet, Nikolaos Limnios	K-Terminal Network Reliability Measures With Binary Decision Diagrams.	IEEE Trans. Reliab.	2007	DBLP DOI BibTeX RDF
9	Amitkumar Mahadevan, Joel M. Morris	On Minimum-WER Performance of a Class of LDPC Codes for the BSC/E Under Extended Bounded-Distance Decoding.	IEEE Trans. Commun.	2007	DBLP DOI BibTeX RDF
9	Luca de Alfaro, Marco Faella	An Accelerated Algorithm for 3-Color Parity Games with an Application to Timed Games.	CAV	2007	DBLP DOI BibTeX RDF
9	Alessandro Cimatti, Marco Roveri, Viktor Schuppan, Stefano Tonetta	Boolean Abstraction for Temporal Logic Satisfiability.	CAV	2007	DBLP DOI BibTeX RDF
9	Vineet Kahlon, Yu Yang 0013, Sriram Sankaranarayanan 0001, Aarti Gupta	Fast and Accurate Static Data-Race Detection for Concurrent Programs.	CAV	2007	DBLP DOI BibTeX RDF
9	Anubhav Gupta 0001, Kenneth L. McMillan, Zhaohui Fu	Automated Assumption Generation for Compositional Verification.	CAV	2007	DBLP DOI BibTeX RDF
9	Arijit Mondal, P. P. Chakrabarti 0001, Pallab Dasgupta	Timing Analysis of Sequential Circuits Using Symbolic Event Propagation.	ICCTA	2007	DBLP DOI BibTeX RDF
9	Amit Chandel, Nick Koudas, Ken Q. Pu, Divesh Srivastava	Fast Identification of Relational Constraint Violations.	ICDE	2007	DBLP DOI BibTeX RDF
9	Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown	BddCut: Towards Scalable Symbolic Cut Enumeration.	ASP-DAC	2007	DBLP DOI BibTeX RDF
9	Guoyong Shi, Weiwei Chen, C.-J. Richard Shi	A Graph Reduction Approach to Symbolic Circuit Analysis.	ASP-DAC	2007	DBLP DOI BibTeX RDF	symbolic analog circuit simulator, symbolic circuit analysis, recursive sign determination algorithm, binary decision diagram, graph reduction
9	Gérard Basler, Daniel Kroening, Georg Weissenbacher	SAT-Based Summarization for Boolean Programs.	SPIN	2007	DBLP DOI BibTeX RDF
9	Orna Grumberg, Assaf Schuster, Avi Yadgar	3-Valued Circuit SAT for STE with Automatic Refinement.	ATVA	2007	DBLP DOI BibTeX RDF
9	Michael Wachter 0001, Rolf Haenni	Multi-state Directed Acyclic Graphs.	Canadian AI	2007	DBLP DOI BibTeX RDF
9	Amitabh Chaudhary, Danny Z. Chen, Rudolf Fleischer, Xiaobo Sharon Hu, Jian Li 0015, Michael T. Niemier, Zhiyi Xie, Hong Zhu 0004	Approximating the Maximum Sharing Problem.	WADS	2007	DBLP DOI BibTeX RDF
9	Daniel J. Quinlan, Richard W. Vuduc, Ghassan Misherghi	Techniques for specifying bug patterns.	PADTAD	2007	DBLP DOI BibTeX RDF	static analysis, message passing interface, datalog, bug patterns
9	Nina Amla, Kenneth L. McMillan	Combining Abstraction Refinement and SAT-Based Model Checking.	TACAS	2007	DBLP DOI BibTeX RDF
9	Mohammad Samie, Gabriel Dragffy, Janice Kiely	Novel Embryonic Array with Neural Network Characteristics.	AHS	2007	DBLP DOI BibTeX RDF
9	Wenhui Zhang	Verification of ACTL Properties by Bounded Model Checking.	EUROCAST	2007	DBLP DOI BibTeX RDF
9	Daher Kaiss, Marcelo Skaba, Ziyad Hanna, Zurab Khasidashvili	Industrial Strength SAT-based Alignability Algorithm for Hardware Equivalence Verification.	FMCAD	2007	DBLP DOI BibTeX RDF
9	Rudolf Berghammer, Britta Kehden	Relational Construction of Specific Timetables.	OR	2007	DBLP DOI BibTeX RDF
9	Rasmus Adler, Marc Forster, Mario Trapp	Determining Configuration Probabilities of Safety-Critical Adaptive Systems.	AINA Workshops (2)	2007	DBLP DOI BibTeX RDF
9	Yanyan Xu 0001, Wei Chen 0018, Liang Xu, Wenhui Zhang	Evaluation of SAT-based Bounded Model Checking of ACTL Properties.	TASE	2007	DBLP DOI BibTeX RDF
9	Graham D. Price, Manish Vachharajani	A Case for Compressing Traces with BDDs.	IEEE Comput. Archit. Lett.	2006	DBLP DOI BibTeX RDF
9	Hung-Yau Lin, Fu-Min Yeh, Sy-Yen Kuo	An efficient algorithm for spare allocation problems.	IEEE Trans. Reliab.	2006	DBLP DOI BibTeX RDF
9	Gary Hardy, Corinne Lucet, Nikolaos Limnios	Probability of connection in regular stochastic networks.	SIGMETRICS Perform. Evaluation Rev.	2006	DBLP DOI BibTeX RDF
9	Görschwin Fey, Rolf Drechsler	Minimizing the number of paths in BDDs: Theory and algorithm.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
9	Vineet Kahlon, Aarti Gupta, Nishant Sinha 0001	Symbolic Model Checking of Concurrent Programs Using Partial Orders and On-the-Fly Transactions.	CAV	2006	DBLP DOI BibTeX RDF
9	Flavio M. de Paula, Alan J. Hu	EverLost: A Flexible Platform for Industrial-Strength Abstraction-Guided Simulation.	CAV	2006	DBLP DOI BibTeX RDF
9	Felipe Machado, Teresa Riesgo, Yago Torroja	A Method for Switching Activity Analysis of VHDL-RTL Combinatorial Circuits.	PATMOS	2006	DBLP DOI BibTeX RDF
9	Udo Krautz, Matthias Pflanz, Christian Jacobi 0002, Hans-Werner Tast, Kai Weber 0001, Heinrich Theodor Vierhaus	Evaluating coverage of error detection logic for soft errors using formal methods.	DATE	2006	DBLP DOI BibTeX RDF	Fault/Error Coverage, Soft Error Injection, Formal Verification, Error Detection and Correction
9	Rüdiger Ebendt, Rolf Drechsler	A Framework for Quasi-exact Optimization Using Relaxed Best-First Search.	KI	2006	DBLP DOI BibTeX RDF
9	Farn Wang	REDLIB for the Formal Verification of Embedded Systems.	ISoLA	2006	DBLP DOI BibTeX RDF
9	Artur Krystosik	Embedded Systems Modeling Language.	DepCoS-RELCOMEX	2006	DBLP DOI BibTeX RDF
9	Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura	A fast logic simulator using a look up table cascade emulator.	ASP-DAC	2006	DBLP DOI BibTeX RDF
9	Ondrej Lhoták, Laurie J. Hendren	Context-Sensitive Points-to Analysis: Is It Worth It?.	CC	2006	DBLP DOI BibTeX RDF
9	Ralf Wimmer 0001, Marc Herbstritt, Holger Hermanns, Kelley Strampp, Bernd Becker 0001	Sigref- A Symbolic Bisimulation Tool Box.	ATVA	2006	DBLP DOI BibTeX RDF
9	Shujun Deng, Weimin Wu, Jinian Bian	Bounded Model Checking Combining Symbolic Trajectory Evaluation Abstraction with Hybrid Three-Valued SAT Solving.	CSCWD (Selected Papers)	2006	DBLP DOI BibTeX RDF
9	Wenhui Zhang	SAT-Based Verification of LTL Formulas.	FMICS/PDMC	2006	DBLP DOI BibTeX RDF
9	Aarti Gupta, Malay K. Ganai, Chao Wang 0001	SAT-Based Verification Methods and Applications in Hardware Verification.	SFM	2006	DBLP DOI BibTeX RDF
9	David Ward, Fabio Somenzi	Decomposing image computation for symbolic reachability analysis using control flow information.	ICCAD	2006	DBLP DOI BibTeX RDF
9	Alan Mishchenko, Satrajit Chatterjee, Robert K. Brayton, Niklas Eén	Improvements to combinational equivalence checking.	ICCAD	2006	DBLP DOI BibTeX RDF
9	Dina Thomas, Supratik Chakraborty, Paritosh K. Pandya	Efficient Guided Symbolic Reachability Using Reachability Expressions.	TACAS	2006	DBLP DOI BibTeX RDF
9	Karim Boutaleb, Philippe Jégou, Cyril Terrioux	(No)good Recording and ROBDDs for Solving Structured (V)CSPs.	ICTAI	2006	DBLP DOI BibTeX RDF
9	Kanupriya Gulati, M. Lovell, Sunil P. Khatri	Efficient don't care computation for hierarchical designs.	ISCAS	2006	DBLP DOI BibTeX RDF
9	Donglin Li, Otmane Aït Mohamed	MDG-Based Verification of the Look-Aside Interface.	CCECE	2006	DBLP DOI BibTeX RDF
9	Ashish Darbari	Symmetry Reduction for STE Model Checking.	FMCAD	2006	DBLP DOI BibTeX RDF
9	Basil Becker, Dirk Beyer 0001, Holger Giese, Florian Klein 0001, Daniela Schilling	Symbolic invariant verification for systems with dynamic structural adaptation.	ICSE	2006	DBLP DOI BibTeX RDF	gormal verification, hraph transformation systems, structural invariants, transition invariants, embedded systems, mechatronics, symbolic algorithms
9	Felix Sheng-Ho Chang, Daniel Jackson 0001	Symbolic model checking of declarative relational models.	ICSE	2006	DBLP DOI BibTeX RDF	software model checking, computation tree logic
9	Deepanjan Datta, Samiran Ganguly	Design of Multi-bit SET Adder and Its Fault Simulation.	VLSI Design	2006	DBLP DOI BibTeX RDF
9	Jin S. Zhang, Alan Mishchenko, Robert K. Brayton, Malgorzata Chrzanowska-Jeske	Symmetry detection for large Boolean functions using circuit representation, simulation, and satisfiability.	DAC	2006	DBLP DOI BibTeX RDF	and-inverter graphs, classical symmetries, simulation, boolean functions, boolean satisfiability
9	Daijue Tang, Sharad Malik, Aarti Gupta, C. Norris Ip	Symmetry Reduction in SAT-Based Model Checking.	CAV	2005	DBLP DOI BibTeX RDF
9	Franjo Ivancic, Zijiang Yang 0006, Malay K. Ganai, Aarti Gupta, Ilya Shlyakhter, Pranav Ashar	F-Soft: Software Verification Platform.	CAV	2005	DBLP DOI BibTeX RDF
9	Sharon Barner, Ziv Glazberg, Ishai Rabinovitz	Wolf - Bug Hunter for Concurrent Software Using Formal Methods.	CAV	2005	DBLP DOI BibTeX RDF
9	John M. Rushby	An Evidential Tool Bus.	ICFEM	2005	DBLP DOI BibTeX RDF
9	Christian Jacobi 0002, Kai Weber 0001, Viresh Paruthi, Jason Baumgartner	Automatic Formal Verification of Fused-Multiply-Add FPUs.	DATE	2005	DBLP DOI BibTeX RDF
9	Alan Mishchenko, Robert K. Brayton	SAT-Based Complete Don't-Care Computation for Network Optimization.	DATE	2005	DBLP DOI BibTeX RDF
9	Jinbo Huang	MUP: a minimal unsatisfiability prover.	ASP-DAC	2005	DBLP DOI BibTeX RDF
9	Stephen Plaza, Valeria Bertacco	STACCATO: disjoint support decompositions from BDDs through symbolic kernels.	ASP-DAC	2005	DBLP DOI BibTeX RDF
9	Pejman Lotfi-Kamran, Mohammad Hosseinabady, Hamid Shojaei, Mehran Massoumi, Zainalabedin Navabi	TED+: a data structure for microprocessor verification.	ASP-DAC	2005	DBLP DOI BibTeX RDF
9	René Krenz, Elena Dubrova	Improved Boolean function hashing based on multiple-vertex dominators.	ASP-DAC	2005	DBLP DOI BibTeX RDF
9	Geng-Dian Huang, Farn Wang	Automatic Test Case Generation with Region-Related Coverage Annotations for Real-Time Systems.	ATVA	2005	DBLP DOI BibTeX RDF
9	John P. Gallagher, Kim S. Henriksen, Gourinath Banda	Techniques for Scaling Up Analyses Based on Pre-interpretations.	ICLP	2005	DBLP DOI BibTeX RDF
9	Monica S. Lam, John Whaley, V. Benjamin Livshits, Michael C. Martin, Dzintars Avots, Michael Carbin, Christopher Unkel	Context-sensitive program analysis as database queries.	PODS	2005	DBLP DOI BibTeX RDF
9	Debashis Sahoo, Jawahar Jain, Subramanian K. Iyer, David L. Dill, E. Allen Emerson	Predictive Reachability Using a Sample-Based Approach.	CHARME	2005	DBLP DOI BibTeX RDF
9	Yoshinori Tanabe, Koichi Takahashi, Mitsuharu Yamamoto, Akihiko Tozawa, Masami Hagiya	A Decision Procedure for the Alternation-Free Two-Way Modal µ-Calculus.	TABLEAUX	2005	DBLP DOI BibTeX RDF
9	E. Allen Emerson, Thomas Wahl	Dynamic Symmetry Reduction.	TACAS	2005	DBLP DOI BibTeX RDF
9	Aidan Harding, Mark Ryan 0001, Pierre-Yves Schobbens	A New Algorithm for Strategy Synthesis in LTL Games.	TACAS	2005	DBLP DOI BibTeX RDF
9	Viktor Schuppan, Armin Biere	Shortest Counterexamples for Symbolic Model Checking of LTL with Past.	TACAS	2005	DBLP DOI BibTeX RDF
9	Franjo Ivancic, Ilya Shlyakhter, Aarti Gupta, Malay K. Ganai, Vineet Kahlon, Chao Wang 0001, Zijiang Yang 0006	Model Checking C Programs Using F-SOFT.	ICCD	2005	DBLP DOI BibTeX RDF
9	Marko Samer, Helmut Veith	Deterministic CTL Query Solving.	TIME	2005	DBLP DOI BibTeX RDF
9	Bow-Yaw Wang	Proving forall-µ-Calculus Properties with SAT-Based Model Checking.	FORTE	2005	DBLP DOI BibTeX RDF
9	K. Loeis, Mohammed Bani Younis, Georg Frey	Application of symbolic and bounded model checking to the verification of logic control systems.	ETFA	2005	DBLP DOI BibTeX RDF
9	Ittai Balaban, Amir Pnueli, Lenore D. Zuck	Shape Analysis by Predicate Abstraction.	VMCAI	2005	DBLP DOI BibTeX RDF
9	Thara Rejimon, Sanjukta Bhanja	An Accurate Probalistic Model for Error Detection.	VLSI Design	2005	DBLP DOI BibTeX RDF
9	Kairong Qian, Albert Nymeyer, Steven Susanto	Experiments with Multiple Abstraction Heuristics in Symbolic Verification.	SARA	2005	DBLP DOI BibTeX RDF
9	Randal E. Bryant	System modeling and verification with UCLID.	MEMOCODE	2004	DBLP DOI BibTeX RDF
9	Marco Benedetti	Evaluating QBFs via Symbolic Skolemization.	LPAR	2004	DBLP DOI BibTeX RDF
9	HoonSang Jin, Mohammad Awedh, Fabio Somenzi	CirCUs: A Satisfiability Solver Geared towards Bounded Model Checking.	CAV	2004	DBLP DOI BibTeX RDF
9	Jie-Hong Roland Jiang, Robert K. Brayton	Functional Dependency for Verification Reduction.	CAV	2004	DBLP DOI BibTeX RDF
9	Carsten Sinz, Wolfgang Küchlin	Verifying the On-line Help System of SIEMENS Magnetic Resonance Tomographs.	ICFEM	2004	DBLP DOI BibTeX RDF