| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Javier Hormigo, Manuel Ortiz, Francisco J. Quiles 0002, Francisco J. Jaime, Julio Villalba, Emilio L. Zapata |
Efficient Implementation of Carry-Save Adders in FPGAs.  |
ASAP  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Murugan Sankaradass, Venkata Jakkula, Srihari Cadambi, Srimat T. Chakradhar, Igor Durdanovic, Eric Cosatto, Hans Peter Graf |
A Massively Parallel Coprocessor for Convolutional Neural Networks. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Fatemeh Eslami, Amirali Baniasadi, Mostafa Farahani |
Application Specific Transistor Sizing for Low Power Full Adders. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Andreas Fidjeland, Etienne B. Roesch, Murray Shanahan, Wayne Luk |
NeMo: A Platform for Neural Modelling of Spiking Neurons Using GPUs. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Xavier Guerin, Frédéric Pétrot |
A System Framework for the Design of Embedded Software Targeting Heterogeneous Multi-core SoCs. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Seunghun Jin, Dongkyun Kim, Thuy Tuong Nguyen, Bongjin Jun, Daijin Kim 0001, Jae Wook Jeon |
An FPGA-based Parallel Hardware Architecture for Real-Time Face Detection Using a Face Certainty Map. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Yongchao Liu, Bertil Schmidt, Douglas L. Maskell |
MSA-CUDA: Multiple Sequence Alignment on Graphics Processing Units with CUDA. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Charles Tsen, Sonia González-Navarro, Michael J. Schulte, Brian J. Hickmann, Katherine Compton |
A Combined Decimal and Binary Floating-Point Multiplier. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Weirong Jiang, Viktor K. Prasanna |
A FPGA-based Parallel Architecture for Scalable High-Speed Packet Classification. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Andreas Genser, Christian Bachmann, Christian Steger, Jos Hulzink, Mladen Berekovic |
Low-Power ASIP Architecture Exploration and Optimization for Reed-Solomon Processing. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Cor Meenderinck, Ben H. H. Juurlink |
Specialization of the Cell SPE for Media Applications. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Pouya Dormiani, Milos D. Ercegovac, Jean-Michel Muller |
Design and Implementation of a Radix-4 Complex Division Unit with Prescaling. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Adarsha Rao, Mythri Alle, Sainath V, Reyaz Shaik, Rajashekhar Chowhan, Sreeramula Sankaraiah, Sravanthi Mantha, S. K. Nandy 0001, Ranjani Narayan |
An Input Triggered Polymorphic ASIC for H.264 Decoding. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Ray C. C. Cheung, Çetin Kaya Koç, John D. Villasenor |
A High-Performance Hardware Architecture for Spectral Hash Algorithm. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Bassam Jamil Mohd, Earl E. Swartzlander Jr. |
A Power-Scalable Switch-Based Multi-processor FFT. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Satyendra R. Datla, Mitchell A. Thornton, David W. Matula |
A Low Power High Performance Radix-4 Approximate Squaring Circuit. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin C. Herbordt, Md. Ashfaquzzaman Khan, Tony Dean |
Parallel Discrete Event Simulation of Molecular Dynamics Through Event-Based Decomposition. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Julien Lamoureux, Tony Field, Wayne Luk |
Accelerating a Virtual Ecology Model with FPGAs. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Yong-Joon Park, Zhao Zhang, Songqing Chen |
Run-Time Detection of Malwares via Dynamic Control-Flow Inspection. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Raid Ayoub, Alex Orailoglu |
Filtering Global History: Power and Performance Efficient Branch Predictor. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | |
20th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2009, July 7-9, 2009, Boston, MA, USA |
ASAP |
2009 |
DBLP BibTeX RDF |
|
| 1 | Hritam Dutta, Jiali Zhai, Frank Hannig, Jürgen Teich |
Impact of Loop Tiling on the Controller Logic of Acceleration Engines. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Jun Chen, James E. Stine |
Parallel Prefix Ling Structures for Modulo 2^n-1 Addition. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Abderrahmane Bennis, Miriam Leeser, Gilead Tadmor |
Implementing a Highly Parameterized Digital PIV System on Reconfigurable Hardware. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Kevin J. M. Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot |
Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Yangyang Pan, Tong Zhang 0002 |
Improving VLIW Processor Performance Using Three-Dimensional (3D) DRAM Stacking. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Mihaela Malita, Gheorghe Stefan |
Integral Parallel Architecture & Berkeley's Motifs. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Richard Membarth, Philipp Kutzer, Hritam Dutta, Frank Hannig, Jürgen Teich |
Acceleration of Multiresolution Imaging Algorithms: A Comparative Study. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai Zhang 0025, Xinming Huang 0001, Zhongfeng Wang |
An Area-Efficient LDPC Decoder Architecture and Implementation for CMMB Systems. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Tomás Lang, Alberto Nannarelli |
Division Unit for Binary Integer Decimals. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Shafqat Khan, Emmanuel Casseau, Daniel Ménard |
Reconfigurable SWP Operator for Multimedia Processing. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Mao Nakajima, Minoru Watanabe |
A 16-context Optically Reconfigurable Gate Array. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Christos Strydis, Georgi Gaydadjiev |
Evaluating Various Branch-Prediction Schemes for Biomedical-Implant Processors. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Junguk Cho, Bridget Benson, Shahnam Mirzaei, Ryan Kastner |
Parallelized Architecture of Multiple Classifiers for Face Detection. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Arnaldo P. Azevedo Filho, Ben H. H. Juurlink |
Scalar Processing Overhead on SIMD-Only Architectures. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Tirath Ramdas, Gregory K. Egan, David Abramson 0001, Kim K. Baldridge |
Run-time thread sorting to expose data-level parallelism. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Kubilay Atasu, Oskar Mencer, Wayne Luk, Can C. Özturan, Günhan Dündar |
Fast custom instruction identification by convex subgraph enumeration. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Álvaro Vázquez, Elisardo Antelo |
New insights on Ling adders. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Slavisa Jovanovic, Camel Tanougast, Serge Weber |
A new high-performance scalable dynamic interconnection for FPGA-based reconfigurable systems. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Roberto R. Osorio, Javier D. Bruguera |
An FPGA architecture for CABAC decoding in manycore systems. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ali Can Atici, Lejla Batina, Junfeng Fan, Ingrid Verbauwhede, Siddika Berna Örs |
Low-cost implementations of NTRU for pervasive security. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Jehangir Khan, Smaïl Niar, Atika Rivenq, Yassin Elhillali, Jean-Luc Dekeyser |
An MPSoC architecture for the Multiple Target Tracking application in driver assistant system. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Andres Garcia, Mladen Berekovic, Tom Vander Aa |
Mapping of the AES cryptographic algorithm on a Coarse-Grain reconfigurable array processor. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Hosseinabady, José L. Núñez-Yáñez |
Fault-tolerant dynamically reconfigurable NoC-based SoC. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Arpith C. Jacob, Jeremy Buhler, Roger D. Chamberlain |
Accelerating Nussinov RNA secondary structure prediction with systolic arrays on FPGAs. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Vamsi Kundeti, Yunsi Fei, Sanguthevar Rajasekaran |
An efficient digital circuit for implementing Sequence Alignment algorithm in an extended processor. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ishaan L. Dalal, Deian Stefan, Jared Harwayne-Gidansky |
Low discrepancy sequences for Monte Carlo simulations on reconfigurable platforms. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Sundar Balasubramanian, Harold W. Carter, Andrey Bogdanov, Andy Rupp, Jintai Ding |
Fast multivariate signature generation in hardware: The case of rainbow. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Andre Guntoro, Manfred Glesner |
Novel approach on lifting-based DWT and IDWT processor with multi-context configuration to support different wavelet filters. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcos B. S. Tavares, Steffen Kunze, Emil Matús, Gerhard P. Fettweis |
Architecture and VLSI realization of a high-speed programmable decoder for LDPC convolutional codes. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Wangyuan Zhang, Tao Li 0006 |
Managing multi-core soft-error reliability through utility-driven cross domain optimization. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicolas Brisebarre, Florent de Dinechin, Jean-Michel Muller |
Integer and floating-point constant multipliers for FPGAs. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Pramod Kumar Meher |
Efficient systolization of cyclic convolution for systolic implementation of sinusoidal transforms. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | David B. Thomas, Wayne Luk |
Resource efficient generators for the floating-point uniform and exponential distributions. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Joseph Nimmy, C. Ramesh Reddy, Keshavan Varadarajan, Mythri Alle, Alexander Fell, S. K. Nandy 0001, Ranjani Narayan |
RECONNECT: A NoC for polymorphic ASICs using a low overhead single cycle router. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Haixin Wang, Guoqiang Bai 0001, Hongyi Chen |
Zodiac: System architecture implementation for a high-performance Network Security Processor. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Pepijn J. de Langen, Ben H. H. Juurlink |
Memory copies in multi-level memory systems. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandru Amaricai, Mircea Vladutiu, Mihai Udrescu, Lucian Prodan, Oana Boncalo |
Floating point multiplication rounding schemes for interval arithmetic. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Sherman Braganza, Miriam Leeser |
An efficient implementation of a phase unwrapping kernel on reconfigurable hardware. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Xuan Guan, Yunsi Fei |
Reducing power consumption of embedded processors through register file partitioning and compiler support. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | J. Divyasree, H. Rajashekar, Kuruvilla Varghese |
Dynamically reconfigurable regular expression matching architecture. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | |
19th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2008, July 2-4, 2008, Leuven, Belgium |
ASAP |
2008 |
DBLP BibTeX RDF |
|
| 1 | Masih Rahmaty, Mohammad S. Sadri, Mehdi Ataei Naeini |
FPGA based singular value decomposition for image processing applications. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Adarsha Rao, Mythri Alle, S. K. Nandy 0001, Ranjani Narayan |
Architecture of a polymorphic ASIC for interoperability across multi-mode H.264 decoders. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Pramod Kumar Meher, Jagdish Chandra Patra |
Fully-pipelined efficient architectures for FPGA realization of discrete Hadamard transform. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicolas Brisebarre, Sylvain Chevillard, Milos D. Ercegovac, Jean-Michel Muller, Serge Torres |
An efficient method for evaluating polynomial and rational function approximations. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Jason Lee, Lesley Shannon, Matthew J. Yedlin, Gary F. Margrave |
A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Fernando Pardo, Paula López Martinez 0001, Diego Cabello |
FPGA-based hardware accelerator of the heat equation with applications on infrared thermography. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Maria Mbaye, Normand Bélanger, Yvon Savaria, Samuel Pierre |
Loop-oriented metrics for exploring an application-specific architecture design-space. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Yang Sun 0001, Yuming Zhu, Manish Goel, Joseph R. Cavallaro |
Configurable and scalable high throughput turbo decoder architecture for multiple 4G wireless standards. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Shahnam Mirzaei, Ali Irturk, Ryan Kastner, Brad T. Weals, Richard E. Cagley |
Design space exploration of a cooperative MIMO receiver for reconfigurable architectures. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ka Fai Cedric Yiu, Chun Hok Ho, Nedelko Grbic, Yao Lu, Xiaoxiang Shi, Wayne Luk |
Reconfigurable acceleration of microphone array algorithms for speech enhancement. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Holger Flatt, Steffen Blume, Sebastian Hesselbarth, Torsten Schünemann, Peter Pirsch |
A parallel hardware architecture for connected component labeling based on fast label merging. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Mythri Alle, Keshavan Varadarajan, Ramesh C. Ramesh, Joseph Nimmy, Alexander Fell, Adarsha Rao, S. K. Nandy 0001, Ranjani Narayan |
Synthesis of application accelerators on Runtime Reconfigurable Hardware. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Yves Vanderperren, Wim Dehaene |
A subsampling pulsed UWB demodulator based on a flexible complex SVD. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Abbas Eslami Kiasari, Shaahin Hessabi, Hamid Sarbazi-Azad |
PERMAP: A performance-aware mapping for application-specific SoCs. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniel Llorente, Kimon Karras, Thomas Wild, Andreas Herkersdorf |
Buffer allocation for advanced packet segmentation in Network Processors. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Basant K. Mohanty, Pramod Kumar Meher |
Throughput-scalable hybrid-pipeline architecture for multilevel lifting 2-D DWT of JPEG 2000 coder. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Miroslav Knezevic, Kazuo Sakiyama, Yong Ki Lee, Ingrid Verbauwhede |
On the high-throughput implementation of RIPEMD-160 hash algorithm. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Santanu Kumar Dash 0001, Thambipillai Srikanthan |
Rapid estimation of instruction cache hit rates using loop profiling. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuki Kobayashi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Masaharu Imai |
Operation shuffling over cycle boundaries for low energy L0 clustering. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto |
Lightweight DMA management mechanisms for multiprocessors on FPGA. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ritesh Rajore, Ganesh Garga, H. S. Jamadagni, S. K. Nandy 0001 |
Reconfigurable Viterbi decoder on mesh connected multiprocessor architecture. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Mao Nakajima, Minoru Watanabe |
Dynamic holographic reconfiguration on a four-context ODRGA. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Basant K. Mohanty, Pramod Kumar Meher |
Concurrent systolic architecture for high-throughput implementation of 3-dimensional discrete wavelet transform. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | David Dickin, Lesley Shannon |
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Yedidya Hilewitz, Cédric Lauradoux, Ruby B. Lee |
Bit matrix multiplication in commodity processors. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas Lorünser, Edwin Querasser, Thomas Matyus, Momtchil Peev, Johannes Wolkerstorfer, Michael Hutter, Alexander Szekely, Ilse Wimberger, Christian Pfaffel-Janser, Andreas Neppach |
Security processor with quantum key distribution. |
ASAP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Yong-Joon Park, Zhao Zhang, Gyungho Lee |
An Efficient Hardware Support for Control Data Validation. |
ASAP |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Liang Lu, John V. McCanny, Sakir Sezer |
Reconfigurable Motion Estimation Architecture for Multi-standard Video Compression. |
ASAP |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Youcef Bouchebaba, Essaid Bensoudane, Bruno Lavigueur, Pierre G. Paulin, Gabriela Nicolescu |
Two-level tiling for MPSoC architecture. |
ASAP |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Ting Wang, Yi-Chi Chen, Chung-Ping Chung |
A Run-Time Reconfigurable Fabric for 3D Texture Filtering. |
ASAP |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Imyong Lee, Dongwook Lee, Kiyoung Choi |
Memory Operation Inclusive Instruction-Set Extensions and Data Path Generation. |
ASAP |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Nhut Thanh Quach, Bahman Zafarifar, Georgi Gaydadjiev |
Real-time FPGA-implementation for blue-sky Detection. |
ASAP |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Ning Qu, Yansong Zheng, Wei Cao, Xu Cheng 0001 |
GISP: A Transparent Superpage Support Framework for Linux. |
ASAP |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Steven Derrien, Patrice Quinton |
Parallelizing HMMER for Hardware Acceleration on FPGAs. |
ASAP |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Siavash Bayat Sarmadi, M. Anwar Hasan |
Run-Time Error Detection in Polynomial Basis Multiplication Using Linear Codes. |
ASAP |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Abdellah-Medjadji Kouadri-Mostefaoui, Benaoumeur Senouci, Frédéric Pétrot |
Scalable Multi-FPGA Platform for Networks-On-Chip Emulation. |
ASAP |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Humberto Calderon, Georgi Gaydadjiev, Stamatis Vassiliadis |
Reconfigurable Universal Adder. |
ASAP |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Jae Young Hur, Todor P. Stefanov, Stephan Wong, Stamatis Vassiliadis |
Customizing Reconfigurable On-Chip Crossbar Scheduler. |
ASAP |
2007 |
DBLP DOI BibTeX RDF |
|
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