| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Prasenjit Biswas, D. M. H. Walker |
Improved Path Recovery in Pseudo Functional Path Delay Test Using Extended Value Algebra.  |
VLSID  |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Manish Gupta, Abhinav Kranti |
Suppressing Single Transistor Latch Effect in Energy Efficient Steep Switching Junctionless MOSFETs. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Shrinidhi Udupi, Joakim Urdahl, Dominik Stoffel, Wolfgang Kunz |
Dynamic Power Optimization Based on Formal Property Checking of Operations. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudipa Mandal, Antonio Anastasio Bruto da Costa, Aritra Hazra, Pallab Dasgupta, Bhushan Naware, Chunduri Rama Mohan, Sanjib Basu |
Formal Verification of Power Management Logic with Mixed-Signal Domains. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Bhawani Shankar, Ankit Soni, Manikant Singh, Rohith Soman, K. N. Bhat, Srinivasan Raghavan 0002, Navakanta Bhat, Mayank Shrivastava |
ESD Behavior of AlGaN/GaN HEMT on Si: Physical Insights, Design Aspects, Cumulative Degradation and Failure Analysis. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Ishan G. Thakkar, Sudeep Pasricha |
DyPhase: A Dynamic Phase Change Memory Architecture with Symmetric Write Latency. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Naveen Kadayinti, Maryam Shojaei Baghini, Dinesh Kumar Sharma |
A Clock Retiming Circuit for Repeaterless Low Swing On-Chip Interconnects. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Javed S. Gaggatur, Immanuel Raja, Gaurab Banerjee |
On-Chip Non-intrusive Temperature Detection and Compensation of a Fully Integrated CMOS RF Power Amplifier. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Anjali Gopinath, Ravi Kumar Adusumalli, Veeresh Babu Vulligaddala, M. B. Srinivas |
A Switched-Capacitor Amplifier with True Rail-to-Rail Input Range without Using a Rail-to-Rail Op-Amp. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahesh Zanwar, Subhajit Sen |
Programmable Output Multi-phase Switched Capacitor Step-Up DC-DC Converter with SAR-based Regulation. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | R. R. Manikandan, Venkata Narayana Rao Vanukuru |
A High Performance Switchable Multiband Inductor Structure for LC-VCOs. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Nihar Hage, Rohini Gulve, Masahiro Fujita, Virendra Singh |
On Testing of Superscalar Processors in Functional Mode for Delay Faults. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Kajal Varma, Geeta Patil, Biju K. Raveendran |
DTLB: Deterministic TLB for Tightly Bound Hard Real-Time Systems. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Rajesh Kedia, K. K. Yoosuf, Pappireddy Dedeepya, Munib Fazal, Chetan Arora 0001, M. Balakrishnan |
MAVI: An Embedded Device to Assist Mobility of Visually Impaired. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Jiayin Li, Kartik Mohanram |
Virtual Two-Port Memory Architecture for Asymmetric Memory Technologies. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Javed S. Gaggatur, Gaurab Banerjee |
High Gain Capacitance Sensor Interface for the Monitoring of Cell Volume Growth. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sukarn Agarwal, Hemangee K. Kapoor |
Towards a Better Lifetime for Non-volatile Caches in Chip Multiprocessors. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Bibin Johnson, Nimin Thomas, J. Sheeba Rani |
An FPGA Based High throughput Discrete Kalman Filter Architecture for Real-Time Image Denoising. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Antara Ain, Akshay Mambakam, Pallab Dasgupta, Siddhartha Mukhopadhyay |
Feature Based Identification of Transmission Line Faults by Synchronous Monitoring of PMUs. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Debasri Saha, Susmita Sur-Kolay |
Multi-objective Optimization of Placement and Assignment of TSVs in 3D ICs. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | N. Nalla Anandakumar, Mohammad S. Hashmi, Somitra Kumar Sanadhya |
Compact Implementations of FPGA-based PUFs with Enhanced Performance. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sumit Naikwad, Murali Krishna Rajendran, Priya Sunil, Ashudeb Dutta |
A Single Inductor, Single Input Dual Output (SIDO) Piezoelectric Energy Harvesting System. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Deepak Joshi, Satyabrata Dash, Ayush Malhotra, Pulimi Venkata Sai, Rahul Das, Dikshit Sharma, Gaurav Trivedi |
Optimization of 2.4 GHz CMOS Low Noise Amplifier Using Hybrid Particle Swarm Optimization with Lévy Flight. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Y. V. Bhuvaneshwari, Abhinav Kranti |
Extraction and Analysis of Mobility in Double Gate Junctionless Transistor. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Poorvi Jain, Bishnu Prasad Das |
Within-Die Threshold Voltage Variability Estimation Using Reconfigurable Ring Oscillator. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Vinay Kumar, Nikhil Puri, Sudhir Kumar 0002, Sumit Srivastav |
A Sub-0.5V Reliability Aware-Negative Bitline Write-Assisted 8T DP-SRAM and WL Strapping Novel Architecture to Counter Dual Patterning Issues in 10nm FinFET. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sangeetha Damotharasamy, P. Deepa |
Efficient Scale Invariant Human Detection Using Histogram of Oriented Gradients for IoT Services. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Antonio Anastasio Bruto da Costa, Pallab Dasgupta |
Generating AMS Behavioral Models with Formal Guarantees on Feature Accuracy. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Neel Gala, Arjun Menon, Rahul Bodduna, G. S. Madhusudan, V. Kamakoti 0001 |
SHAKTI Processors: An Open-Source Hardware Initiative. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Farhad Merchant, Nimash Choudhary, S. K. Nandy 0001, Ranjani Narayan |
Efficient Realization of Table Look-Up Based Double Precision Floating Point Arithmetic. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Shouri Chatterjee, Mohd Tarique |
A 100-nW Sensitive RF-to-DC CMOS Rectifier for Energy Harvesting Applications. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Dheeraj Kumar Sinha, Amitabh Chatterjee, Vishnuram Abhinav, Gaurav Trivedi, Victor Koldyaev |
A Novel Capacitorless DRAM Cell Design Using Band-Gap Engineered Junctionless Double-Gate FET. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Ashish Kumar Pradhan, Soumitra Kumar Nandy |
An Energy Efficient Dynamically Reconfigurable QR Decomposition for Wireless MIMO Communication. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Debjit Pal, Shobha Vasudevan |
Symptomatic Bug Localization for Functional Debug of Hardware Designs. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Amit Chhabra, Vikas Rana |
-1.1V to +1.1V 3: 1 Power Switch Architecture for Controlling Body Bias of SRAM Array in 28nm UTBB CMOS FDSOI. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sonal Yadav, Vijay Laxmi, Manoj Singh Gaur |
A Power Efficient Dual Link Mesh NoC Architecture to Support Nonuniform Traffic Arbitration at Routing Logic. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Samarjit Chakraborty, S. Ramesh 0002 |
Technologies for Safe and Intelligent Transportation Systems. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Ishan G. Thakkar, Sudeep Pasricha |
Massed Refresh: An Energy-Efficient Technique to Reduce Refresh Overhead in Hybrid Memory Cube Architectures. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Badreyya Al Shehhi, Mihai Sanduleanu |
An 800µW Peak Power Consumption, 24GHz (K-Band), Super-Regenerative Receiver with 200p J/bit Energy Efficiency, for IoT. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Shivam Swami, Kartik Mohanram |
E3R: Energy Efficient Error Recovery for Multi/Triple-Level Cell Non-volatile Memories. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Chandan Yadav, Amit Agarwal 0007, Yogesh Singh Chauhan |
Analysis of Quantum Capacitance Effect in Ultra-Thin-Body III-V Transistor. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Vinayaka Jyothi, Xueyang Wang, Sateesh Addepalli, Ramesh Karri |
BRAIN: BehavioR Based Adaptive Intrusion Detection in Networks: Using Hardware Performance Counters to Detect DDoS Attacks. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Hrishikesh Jayakumar, Arnab Raha, Vijay Raghunathan |
Energy-Aware Memory Mapping for Hybrid FRAM-SRAM MCUs in IoT Edge Devices. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Satyabrata Dash, Krishna Lal Baishnab, Gaurav Trivedi |
Applying River Formation Dynamics to Analyze VLSI Power Grid Networks. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikil D. Dutt, Nima Taherinejad |
Self-Awareness in Cyber-Physical Systems. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Bibhash Sen, Rajdeep Kumar Nath, Rijoy Mukherjee, Yashraj Sahu, Biplab K. Sikdar |
Towards Designing Reliable Universal QCA Logic in the Presence of Cell Deposition Defect. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Anil Kumar Gundu, Mohammad S. Hashmi, Anuj Grover |
A New Sense Amplifier Topology with Improved Performance for High Speed SRAM Applications. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Lokesh Garg, Vineet Sahula |
Accurate and Efficient Estimation of Dynamic Virtual Ground Voltage in Power Gated Circuits. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Pradipta Roy, Prabir K. Biswas, Binoy Kumar Das |
A Modified Hill Climbing Based Watershed Algorithm and Its Real Time FPGA Implementation. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Rajat Gupta, Vijit Gadi, H. Anirudh Upendar |
Write Assist Scheme to Enhance SRAM Cell Reliability Using Voltage Sensing Technique. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Tomoya Akabe, Minoru Watanabe |
Reconfiguration Performance Recovery on Optically Reconfigurable Gate Arrays. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Manchi Pavan Kumar, Roy Paily, Anup Kumar Gogoi |
Design and Implementation of Low-Power Digital Baseband Transceivers for IEEE802.15.6 Standard. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Krishna Kanth Gowri Avalur, Syed Azeemuddin |
System Efficiency Improvement Technique for Automotive Power Management IC Using Maximum Load Current Selector Circuit. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | G. Cardoso Medeiros, LetÃcia Maria Bolzani Pöhls, Fabian Vargas 0001 |
Analyzing the Impact of SEUs on SRAMs with Resistive-Bridge Defects. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Jacob A. Abraham, Abhijit Chatterjee |
Design of Self Calibrating and Error Resilient Mixed-Signal Systems for Signal Processing, Communications and Control. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Urbi Chatterjee, Rajat Subhra Chakraborty, Jimson Mathew, Dhiraj K. Pradhan |
Memristor Based Arbiter PUF: Cryptanalysis Threat and Its Mitigation. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu |
An Efficient Method for Clock Skew Scheduling to Reduce Peak Current. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Vishnuram Abhinav, Dheeraj Kumar Sinha, Amitabh Chatterjee, Forrest Brewer |
A Novel Co-design Methodology for Optimizing ESD Protection Device Using Layout Level Approach. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Syed Ershad Ahmed, S. Sweekruth Srinivas, M. B. Srinivas |
A Hybrid Energy Efficient Digital Comparator. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Pallavi Das, Jitendra Yadav, Sujay Deb |
Mixed Mode Simulation and Verification of SSCG PLL through Real Value Modeling. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Jian Cai 0001, Aviral Shrivastava |
Software Coherence Management on Non-coherent Cache Multi-cores. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sai Vineel Reddy Chittamuru, Sudeep Pasricha |
SPECTRA: A Framework for Thermal Reliability Management in Silicon-Photonic Networks-on-Chip. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Manas Kumar Lenka, Akash Agrawal, Vishal Khatri, Gaurab Banerjee |
A Wide-Band Receiver Front-End with Programmable Frequency Selective Input Matching. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sangeetha Damotharasamy, P. Deepa |
An Efficient Hardware Implementation of Canny Edge Detection Algorithm. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | A. Venkatareddy, Sithara Raveendran, Kumar Y. B. Nithin, M. H. Vasantha |
Characterization of a Novel Low Leakage Power and Area Efficient 7T SRAM Cell. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Jungmin Park, Akhilesh Tyagi |
Security Metrics for Power Based SCA Resistant Hardware Implementation. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | R. G. Raghavendra, Balbeer Singh Rathor |
A 1-tap 10.3125Gb/s Programmable Voltage Mode Line Driver in 28nm CMOS Technology. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeroen Bosmans, Sujoy Sinha Roy, Kimmo Järvinen 0001, Ingrid Verbauwhede |
A Tiny Coprocessor for Elliptic Curve Cryptography over the 256-bit NIST Prime Field. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Kanad Basu, Subhadip Kundu |
Post-Silicon Validation and Diagnosis. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Gaurav Saharawat, Praveen Shukla, Saurabh Jain, Subash Nayak |
Emulation - Smart Way of Power Estimation and Power Aware Verfication. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sarvesh Agarwal, S. K. Manhas, Sudeb Dasgupta, Neeraj Jain |
Metal Carbon Nanotube Schottky Barrier Diode with Detection of Polar Non-polar Gases. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Kausik Datta, Goutam Kumar Bhaumik, Rohit Goel |
An Introduction to VHDL 2008. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sikhar Patranabis, Debapriya Basu Roy, Debdeep Mukhopadhyay |
Using Tweaks to Design Fault Resistant Ciphers. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Felix Loh, Kewal K. Saluja, Parameswaran Ramanathan |
Fault Tolerance through Invariant Checking for Iterative Solvers. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Jayesh Wadekar, Biman Chattopadhyay, Ravi Mehta, Gopalkrishna Nayak |
A 0.5-4GHz Programmable-Bandwidth Fractional-N PLL for Multi-protocol SERDES in 28nm CMOS. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | N. B. Balamurugan, G. LakshmiPriya, S. Manikandan, G. Srimathi |
Analytical Modeling of Dual Material Gate All around Stack Architecture of Tunnel FET. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Kewal K. Saluja |
Digital Testing - Basics to Advanced Research Issues. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Shanthi Pavan, Nagendra Krishnapura |
Demystifying Time Varying Circuits and Systems. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sourindra Chaudhuri, Ajay N. Bhoj, Debajit Bhattacharya, Niraj K. Jha |
Fast FinFET Device Simulation under Process-Voltage Variations Using an Assisted Speed-Up Mechanism. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Nazma Tara, Hafiz Md. Hasan Babu, Nawshi Matin |
Logic Synthesis in Reversible PLA. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sadulla Shaik, Kalva Sri Rama Krishna, Ramesh Vaddi |
Circuit and Architectural Co-design for Reliable Adder Cells with Steep Slope Tunnel Transistors for Energy Efficient Computing. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Farhad Merchant, Tarun Vatwani, Anupam Chattopadhyay, Soumyendu Raha, S. K. Nandy 0001, Ranjani Narayan |
Achieving Efficient QR Factorization by Algorithm-Architecture Co-design of Householder Transformation. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Jais Abraham, Shankar Umapathi, Sumitha Krishnamurthi |
Test Time Minimisation in Scan Compression Designs Using Dynamic Channel Allocation. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Tsung-Yi Ho, Shigeru Yamashita, Ansuman Banerjee, Sudip Roy 0001 |
Design of Microfluidic Biochips: Connecting Algorithms and Foundations of Chip Design to Biochemistry and the Life Sciences. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Naren Das, Nirmalya Samanta, Chirosree Roy Chaudhuri |
Nanostructured Silicon Oxide Immunosensor Integrated with Noise Spectroscopy Electronics for POC Diagnostics. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sandeep Chandran, Eldhose Peter, Preeti Ranjan Panda, Smruti R. Sarangi |
A Generic Implementation of Barriers Using Optical Interconnects. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Vaddi Chandra Sekhar, Satyajit Bora, Monalisa Dash, Manchi Pavan Kumar, S. Josephine, Roy Paily |
Design and Implementation of Blind Assistance System Using Real Time Stereo Vision Algorithms. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Anuradha Annaswamy, Samarjit Chakraborty, Dip Goswami, S. Ramesh 0002, Marilyn Wolf |
Trustworthy Cyber Physical Systems. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudarshan Srinivasan, Nithesh kurella, Israel Koren, Sandip Kundu |
Dynamic Reconfiguration vs. DVFS: A Comparative Study on Power Efficiency of Processors. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Vikas Chauhan, Neel Gala, V. Kamakoti 0001 |
ChADD: An ADD Based Chisel Compiler with Reduced Syntactic Variance. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sesha Sairam Regulagadda, Purushothama Chary, Rizwan Shaik Peerla, Mohd Abdul Naseeb, Amit Acharyya, Pachamuthu Rajalakshmi, Ashudeb Dutta |
A 1.5mA, 2.4GHz ZigBee/BLE QLMVF Receiver Frond End with Split TCAs in 180nm CMOS. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Ayan Palchaudhuri, Anindya Sundar Dhar |
Efficient Implementation of Scan Register Insertion on Integer Arithmetic Cores for FPGAs. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sandip Kundu, Omer Khan |
Efficient Error-Detection and Recovery Mechanisms for Reliability and Resiliency of Multicores. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Priyanka Mitra |
A Statistical Model for Hybrid Wireless Network on Chip. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Mubin Ul Haque, Zarrin Tasnim Sworna, Hafiz Md. Hasan Babu |
An Improved Design of a Reversible Fault Tolerant LUT-based FPGA. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohd Anwar, Sourav Saha, Matthew M. Ziegler, Lakshmi N. Reddy |
Early Scenario Pruning for Efficient Design Space Exploration in Physical Synthesis. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Zoran Stamenkovic |
SOC Design for Wireless Communications. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Harsh N. Patel, Farah B. Yahya, Benton H. Calhoun |
Improving Reliability and Energy Requirements of Memory in Body Sensor Networks. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | A. Anvar, Shreepad Karmalkar, R. Gokul, C. Akhil |
A Quasi-Static Model for the Coupling Impedance between Coplanar Rectangular Contacts on a Bulk Substrate. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Rolf Drechsler, Jannis Stoppe |
Hardware/Software Co-Visualization on the Electronic System Level Using SystemC. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
![[Valid RSS]](Pics/valid-rss.png "Validate my RSS feed")
data released under the ODC-BY 1.0 license