Search results for "macro"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
14	Richard C. Waters	Efficient interpretation of synchronizable series expressions.	PLDI	1987	DBLP DOI BibTeX RDF
14	Gaetano Borriello, Andrew R. Cherenson, Peter B. Danzig, Michael N. Nelson	RISCs versus CISCs for Prolog: A Case Study.	ASPLOS	1987	DBLP DOI BibTeX RDF	Prolog, RISC, CISC
14	Mely Chen Chi	An Automatic Rectilinear Partitioning Procedure for Standard Cells.	DAC	1987	DBLP DOI BibTeX RDF
14	Cary Buchman, Daniel M. Berry, Jakob Gonczarowski	DITROFF/FFORTID, An Adaptation of the UNIX DITROFF for Formatting Bidirectional Text.	ACM Trans. Inf. Syst.	1985	DBLP DOI BibTeX RDF	DITROFF
14	Cindy Eades, Kevin D. Reilly, John H. Barrett, Charles Minderhout	The barrel concept: a study in language system development.	ACM Southeast Regional Conference	1982	DBLP DOI BibTeX RDF
14	Thomas W. Calvert, John Chapman	Notation of movement with computer assistance.	ACM Annual Conference (2)	1978	DBLP DOI BibTeX RDF
14	E. M. Boehm, Thomas B. Steel Jr.	The Share 709 System: Machine Implementation of Symbolic Programming.	J. ACM	1959	DBLP DOI BibTeX RDF
14	Donald L. Shell	The Share 709 System: A Cooperative Effort.	J. ACM	1959	DBLP DOI BibTeX RDF
11	Xidong Zheng, Tao Jin 0006	A New Macro Dynamic Demand Response Strategy Considering Micro Power Quality Disturbance for Wind-Storage Integrated System.	IEEE Trans. Ind. Electron.	2024	DBLP DOI BibTeX RDF
11	De-Qi You, Yen-Cheng Chiu, Win-San Khwa, Chung-Yuan Li, Fang-Ling Hsieh, Yu-An Chien, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang	An 8b-Precision 8-Mb STT-MRAM Near-Memory-Compute Macro Using Weight-Feature and Input-Sparsity Aware Schemes for Energy-Efficient Edge AI Devices.	IEEE J. Solid State Circuits	2024	DBLP DOI BibTeX RDF
11	Chuan-Tung Lin, Dewei Wang, Bo Zhang, Gregory K. Chen, Phil C. Knag, Ram Kumar Krishnamurthy, Mingoo Seok	DIMCA: An Area-Efficient Digital In-Memory Computing Macro Featuring Approximate Arithmetic Hardware in 28 nm.	IEEE J. Solid State Circuits	2024	DBLP DOI BibTeX RDF
11	Ping-Chun Wu, Jian-Wei Su, Li-Yang Hong, Jin-Sheng Ren, Chih-Han Chien, Ho-Yu Chen, Chao-En Ke, Hsu-Ming Hsiao, Sih-Han Li, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang	A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced AI Edge Chips.	IEEE J. Solid State Circuits	2024	DBLP DOI BibTeX RDF
11	Takahiro Shimoi, Ken Matsubara, Tomoya Saito, Tomoya Ogawa, Yasuhiko Taito, Yoshinobu Kaneda, Masayuki Izuna, Koichi Takeda, Hidenori Mitani, Takashi Ito, Takashi Kono	A 22-nm 32-Mb Embedded STT-MRAM Macro Achieving 5.9-ns Random Read Access and 7.4-MB/s Write Throughput at up to 150 °C.	IEEE J. Solid State Circuits	2024	DBLP DOI BibTeX RDF
11	Hung-Hsi Hsu, Tai-Hao Wen, Wei-Hsing Huang, Win-San Khwa, Yun-Chen Lo, Chuan-Jia Jhang, Yu-Hsiang Chin, Yu-Chiao Chen, Chung-Chuan Lo, Ren-Shuo Liu, Kea-Tiong Tang, Chih-Cheng Hsieh, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang	A Nonvolatile AI-Edge Processor With SLC-MLC Hybrid ReRAM Compute-in-Memory Macro Using Current-Voltage-Hybrid Readout Scheme.	IEEE J. Solid State Circuits	2024	DBLP DOI BibTeX RDF
11	Jiahao Song, Xiyuan Tang, Haoyang Luo, Haoyi Zhang, Xin Qiao, Zixuan Sun, Xiangxing Yang, Zihan Wu, Yuan Wang 0001, Runsheng Wang, Ru Huang	A 4-bit Calibration-Free Computing-In-Memory Macro With 3T1C Current-Programed Dynamic-Cascode Multi-Level-Cell eDRAM.	IEEE J. Solid State Circuits	2024	DBLP DOI BibTeX RDF
11	Lei Wei, Chen Xu, Zhuling Sun	Lightning Stroke Strength and Its Correlation with Cloud Macro- and Microphysics over the Tibetan Plateau.	Remote. Sens.	2024	DBLP DOI BibTeX RDF
11	Naoki Kamiya, Yu Yoshizato, Yexin Zhou, Yoichi Ohyanagi, Koji Shibazaki	Fiber Estimation From Paper Macro Images via EfficientNet-Based Patch Classification.	IEEE Access	2024	DBLP DOI BibTeX RDF
11	Valdemar Ramón Farré Guijarro, José David Vega Sánchez, Martha Cecilia Paredes Paredes, Felipe Grijalva Arévalo, Diana Pamela Moya Osorio	Comparative Evaluation of Radio Network Planning for Different 5G-NR Channel Models on Urban Macro Environments in Quito City.	IEEE Access	2024	DBLP DOI BibTeX RDF
11	Zupei Gu, Shukao Dou, Heng You, Yi Zhan, Shushan Qiao, Yumei Zhou	A Dual-Wordline 6T SRAM Computing-In-Memory Macro Featuring Full Signed Multi-Bit Computation for Lightweight Networks.	IEEE Access	2024	DBLP DOI BibTeX RDF
11	Liang Chang 0002, Xin Zhao, Ting Yue, Xi Yang, Chenglong Li, Shuisheng Lin, Jun Zhou 0017	IPOCIM: Artificial Intelligent Architecture Design Space Exploration With Scalable Ping-Pong Computing-in-Memory Macro.	IEEE Trans. Very Large Scale Integr. Syst.	2024	DBLP DOI BibTeX RDF
11	Xiangyong Chen, Huawei Liu, Guanghui Wen, Yang Liu 0077, Jinde Cao, Jianlong Qiu	Adaptive Neural Preassigned-Time Control for Macro-Micro Composite Positioning Stage With Displacement Constraints.	IEEE Trans. Ind. Informatics	2024	DBLP DOI BibTeX RDF
11	Minkang Xu, Xiaojie Chen, Attila Szolnoki	Nash Equilibrium in Macro-Task Crowdsourcing Systems With Collective-Effort-Dependent Rewarding.	IEEE Trans. Netw. Sci. Eng.	2024	DBLP DOI BibTeX RDF
11	Xin Qiao, Qingyu Guo, Xiyuan Tang, Jiahao Song, Renjie Wei, Meng Li 0004, Runsheng Wang, Yuan Wang 0001	A 16.38TOPS and 4.55POPS/W SRAM Computing-in-Memory Macro for Signed Operands Computation and Batch Normalization Implementation.	IEEE Trans. Circuits Syst. I Regul. Pap.	2024	DBLP DOI BibTeX RDF
11	Hao Wu, Yong Chen 0005, Yiyang Yuan, Jinshan Yue, Xiangqu Fu, Qirui Ren, Qing Luo, Pui-In Mak, Xinghua Wang, Feng Zhang 0014	A 28-nm Computing-in-Memory-Based Super-Resolution Accelerator Incorporating Macro-Level Pipeline and Texture/Algebraic Sparsity.	IEEE Trans. Circuits Syst. I Regul. Pap.	2024	DBLP DOI BibTeX RDF
11	Jie Lou, Florian Freye, Christian Lanius, Tobias Gemmeke	An Energy Efficient All-Digital Time-Domain Compute-in-Memory Macro Optimized for Binary Neural Networks.	IEEE Trans. Circuits Syst. I Regul. Pap.	2024	DBLP DOI BibTeX RDF
11	Heng You, Weijun Li, Delong Shang, Yumei Zhou, Shushan Qiao	A 1-8b Reconfigurable Digital SRAM Compute-in-Memory Macro for Processing Neural Networks.	IEEE Trans. Circuits Syst. I Regul. Pap.	2024	DBLP DOI BibTeX RDF
11	Bob Vanhoof, Wim Dehaene	A 1MHz 256kb Ultra Low Power Memory Macro for Biomedical Recording Applications in 22nm FD-SOI Using FECC to Enable Data Retention Down to 170mV Supply Voltage.	IEEE Trans. Circuits Syst. I Regul. Pap.	2024	DBLP DOI BibTeX RDF
11	Haotian Fu, Yulong Huang, Tingran Chen, Chenyi Fu, Hongwei Ren, Yue Zhou, Shouzhong Peng, Zhirui Zong, Biao Pan, Bojun Cheng	DS-CIM: A 40nm Asynchronous Dual-Spike Driven, MRAM Compute-In-Memory Macro for Spiking Neural Network.	IEEE Trans. Circuits Syst. I Regul. Pap.	2024	DBLP DOI BibTeX RDF
11	Young Kyu Lee, Dong Han Ko, Seokhee Cho, Minjune Yeo, Mingu Kang, Seong-Ook Jung	Split WL 6T SRAM-Based Bit Serial Computing-in-Memory Macro With High Signal Margin and High Throughput.	IEEE Trans. Circuits Syst. II Express Briefs	2024	DBLP DOI BibTeX RDF
11	Jinwu Chen, Yitong Zhao, Tianzhu Xiong, Xin Si	An INT8 Charge-Digital Hybrid Compute-In-Memory Macro With CNN-Friendly Shift-Feed Register Design.	IEEE Trans. Circuits Syst. II Express Briefs	2024	DBLP DOI BibTeX RDF
11	In Jun Jung, Do Han Kim, Minyoung Jo, Dong Han Ko, Young Kyu Lee, Seong-Ook Jung	A Charge-Domain 4T2C eDRAM Compute-in-Memory Macro With Enhanced Variation Tolerance and Low-Overhead Data Conversion Schemes.	IEEE Trans. Circuits Syst. II Express Briefs	2024	DBLP DOI BibTeX RDF
11	Jian-Wei Su, Pei-Jung Lu, Ping-Chun Wu, Yen-Chi Chou, Ta-Wei Liu, Yen-Lin Chung, Li-Yang Hung, Jin-Sheng Ren, Wei-Hsing Huang, Chih-Han Chien, Peng-I Mei, Sih-Han Li, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Hao-Chiao Hong, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang	8-Bit Precision 6T SRAM Compute-in-Memory Macro Using Global Bitline-Combining Scheme for Edge AI Chips.	IEEE Trans. Circuits Syst. II Express Briefs	2024	DBLP DOI BibTeX RDF
11	Kaili Zhang, Zhongzhen Tong, Xinxin Liang, Chengzhi Wang, You Wang 0002, Yue Zhang 0010, Weisheng Zhao, Lang Zeng, Deming Zhang	A Charge-Domain Compute-In-Memory Macro With Cell-Embedded DA Conversion and Two-Stage AD Conversion for Bit-Scalable MAC Operation.	IEEE Trans. Circuits Syst. II Express Briefs	2024	DBLP DOI BibTeX RDF
11	Ana Shohibul Manshur Al Ahmad, Loso Judijanto, Dedie Tooy, Purnama Putra, Muhammad Hermansyah, Maria Kumalasanti, Alamsyah Agit	Integration of Artificial Intelligence and Macro-Economic Analysis: A Novel Approach with Distributed Information Systems.	EAI Endorsed Trans. Scalable Inf. Syst.	2024	DBLP DOI BibTeX RDF
11	Wei Chen 0100, Dake Liu	Conflict-Free Parallel Data Access Technology for Matrix Calculation in Memory System of ASIP of 5G/6G Macro Base Stations.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2024	DBLP DOI BibTeX RDF
11	Andrew B. Kahng, Ravi Varadarajan, Zhiang Wang	Hier-RTLMP: A Hierarchical Automatic Macro Placer for Large-Scale Complex IP Blocks.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2024	DBLP DOI BibTeX RDF
11	Chenghu Dai, Zihua Ren, Lijun Guan, Haitao Liu, Mengya Gao, Wenjuan Lu, Zhiyong Pang, Chunyu Peng, Xiulong Wu	A 9T-SRAM in-memory computing macro for Boolean logic and multiply-and-accumulate operations.	Microelectron. J.	2024	DBLP DOI BibTeX RDF
11	Yan Zhang, Lu Zhang, Xin Zhao, Hongyong Fu, Dequan Yu	Automatic Point Cloud Registration for 3D Virtual-to-Real Registration Using Macro and Micro Structures.	IEEE Trans. Multim.	2024	DBLP DOI BibTeX RDF
11	Brian Formento, Wenjie Feng 0001, Chuan Sheng Foo, Luu Anh Tuan, See-Kiong Ng	SemRoDe: Macro Adversarial Training to Learn Representations That are Robust to Word-Level Attacks.	CoRR	2024	DBLP DOI BibTeX RDF
11	Vahid Badrkhani, Marco F. P. ten Eikelder, René R. Hiemstra, Dominik Schillinger	The matrix-free macro-element hybridized Discontinuous Galerkin method for steady and unsteady compressible flows.	CoRR	2024	DBLP DOI BibTeX RDF
11	Ignace Bossuyt, Stefan Vandewalle, Giovanni Samaey	Micro-macro Parareal, from ODEs to SDEs and back again.	CoRR	2024	DBLP DOI BibTeX RDF
11	Erik Schultheis, Wojciech Kotlowski, Marek Wydmuch, Rohit Babbar, Strom Borman, Krzysztof Dembczynski	Consistent algorithms for multi-label classification with macro-at-k metrics.	CoRR	2024	DBLP DOI BibTeX RDF
11	Brent Pappas, Paul Gazzillo	Semantic Analysis of Macro Usage for Portability.	CoRR	2024	DBLP DOI BibTeX RDF
11	Wang-Wang Yu, Xian-Shi Zhang, Fuya Luo, Yijun Cao, Kai-Fu Yang, Hong-Mei Yan, Yong-Jie Li 0001	Weak Supervision with Arbitrary Single Frame for Micro- and Macro-expression Spotting.	CoRR	2024	DBLP DOI BibTeX RDF
11	Yuhang Cao, Pan Zhang, Xiaoyi Dong, Dahua Lin, Jiaqi Wang 0003	DualFocus: Integrating Macro and Micro Perspectives in Multi-modal Large Language Models.	CoRR	2024	DBLP DOI BibTeX RDF
11	Georgios Vardakas, John Pavlopoulos, Aristidis Likas	Silhouette Aggregation: From Micro to Macro.	CoRR	2024	DBLP DOI BibTeX RDF
11	Hao Chen 0062, Yuanchen Bei, Qijie Shen, Yue Xu, Sheng Zhou 0004, Wenbing Huang, Feiran Huang, Senzhang Wang, Xiao Huang 0001	Macro Graph Neural Networks for Online Billion-Scale Recommender Systems.	CoRR	2024	DBLP DOI BibTeX RDF
11	Seokju Yun, Youngmin Ro	SHViT: Single-Head Vision Transformer with Memory Efficient Macro Design.	CoRR	2024	DBLP DOI BibTeX RDF
11	Wang-Wang Yu, Jingwen Jiang, Kai-Fu Yang, Hong-Mei Yan, Yong-Jie Li 0001	LGSNet: A Two-Stream Network for Micro- and Macro-Expression Spotting With Background Modeling.	IEEE Trans. Affect. Comput.	2024	DBLP DOI BibTeX RDF
11	Elvio Gilberto Amparore, Marco Beccuti, Paolo Castagno, Simone Pernice, Giuliana Franceschinis, Marzio Pennisi	From Compositional Petri Net Modeling to Macro and Micro Simulation by Means of Stochastic Simulation and Agent-Based Models.	ACM Trans. Model. Perform. Evaluation Comput. Syst.	2024	DBLP DOI BibTeX RDF
11	Hengzhe Zhang, Qi Chen 0002, Bing Xue 0001, Wolfgang Banzhaf, Mengjie Zhang 0001	A geometric semantic macro-crossover operator for evolutionary feature construction in regression.	Genet. Program. Evolvable Mach.	2024	DBLP DOI BibTeX RDF
11	Giacomo Dimarco, Lorenzo Pareschi, Mattia Zanella	Micro-Macro Stochastic Galerkin Methods for Nonlinear Fokker-Planck Equations with Random Inputs.	Multiscale Model. Simul.	2024	DBLP DOI BibTeX RDF
11	Bin Liu 0056, Haifeng Hu 0004, Hongkui Shi, Hong Wang 0011, Rongfang Song	Macro-Diversity in Cellular Networks With Correlated Blockage Model.	IEEE Trans. Commun.	2024	DBLP DOI BibTeX RDF
11	Xiaoyun Wang 0001, Zixiang Han, Jing Jin, Rongyan Xi, Yajuan Wang, Lincong Han, Liang Ma, Mengting Lou, Xin Gui, Qixing Wang, Guangyi Liu	Multistatic Integrated Sensing and Communication System Based on Macro-Micro Cooperation.	Sensors	2024	DBLP DOI BibTeX RDF
11	Christoph Wieland, Victor Pankratius	Detection and Validation of Macro-Activities in Human Inertial Signals Using Graph Link Prediction.	Sensors	2024	DBLP DOI BibTeX RDF
11	Francesco Cursi, Weibang Bai, Eric M. Yeatman, Petar Kormushev	Task Accuracy Enhancement for a Surgical Macro-Micro Manipulator With Probabilistic Neural Networks and Uncertainty Minimization.	IEEE Trans Autom. Sci. Eng.	2024	DBLP DOI BibTeX RDF
11	Seung-Mo Jin, Shin-Uk Kang, Min-Seong Choo	Analysis of ADC Quantization Effect in Processing-In-Memory Macro in Various Low-Precision Deep Neural Networks.	ICEIC	2024	DBLP DOI BibTeX RDF
11	Ho-Sung Lee, Joo-Hyung Chae	A 1-Kb 6T 1C XNOR-DRAM Compute-In-Memory Macro With Signed Bit Adder Block for CNN Operations.	ICEIC	2024	DBLP DOI BibTeX RDF
11	I-Lun Tseng	Challenges in Floorplanning and Macro Placement for Modern SoCs.	ISPD	2024	DBLP DOI BibTeX RDF
11	Yuan Pu, Tinghuan Chen, Zhuolun He, Chen Bai, Haisheng Zheng, Yibo Lin, Bei Yu 0001	IncreMacro: Incremental Macro Placement Refinement.	ISPD	2024	DBLP DOI BibTeX RDF
11	Christian Kindermann, Anne-Marie George, Bijan Parsia, Uli Sattler	Minimal Macro-Based Rewritings of Formal Languages: Theory and Applications in Ontology Engineering (and Beyond).	AAAI	2024	DBLP DOI BibTeX RDF
11	Jooyoung Bae, Chaeyun Shim, Bongjin Kim	15.6 e-Chimera: A Scalable SRAM-Based Ising Macro with Enhanced-Chimera Topology for Solving Combinatorial Optimization Problems Within Memory.	ISSCC	2024	DBLP DOI BibTeX RDF
11	Linfang Wang, Weizeng Li, Zhidao Zhou, Hanghang Gao, Zhi Li, Wang Ye, Hongyang Hu, Jing Liu, Jinshan Yue, Jianguo Yang, Qing Luo, Chunmeng Dou, Qi Liu, Ming Liu	34.9 A Flash-SRAM-ADC-Fused Plastic Computing-in-Memory Macro for Learning in Neural Networks in a Standard 14nm FinFET Process.	ISSCC	2024	DBLP DOI BibTeX RDF
11	Yiyang Yuan, Yiming Yang, Xinghua Wang, Xiaoran Li, Cailian Ma, Qirui Chen, Meini Tang, Xi Wei, Zhixian Hou, Jialiang Zhu, Hao Wu, Qirui Ren, Guozhong Xing, Pui-In Mak, Feng Zhang 0014	34.6 A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point SRAM Computing-in-Memory Macro with Logarithm Bit-Width Residual ADC.	ISSCC	2024	DBLP DOI BibTeX RDF
11	Kentaro Yoshioka	34.5 A 818-4094TOPS/W Capacitor-Reconfigured CIM Macro for Unified Acceleration of CNNs and Transformers.	ISSCC	2024	DBLP DOI BibTeX RDF
11	Tai-Hao Wen, Hung-Hsi Hsu, Win-San Khwa, Wei-Hsing Huang, Zhao-En Ke, Yu-Hsiang Chin, Hua-Jin Wen, Yu-Chen Chang, Wei-Ting Hsu, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Shih-Hsih Teng, Chung-Cheng Chou, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang	34.8 A 22nm 16Mb Floating-Point ReRAM Compute-in-Memory Macro with 31.2TFLOPS/W for AI Edge Devices.	ISSCC	2024	DBLP DOI BibTeX RDF
11	Yifan He, Shupei Fan, Xuan Li, Luchang Lei, Wenbin Jia, Chen Tang, Yaolei Li, Zongle Huang, Zhike Du, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu	34.7 A 28nm 2.4Mb/mm2 6.9 - 16.3TOPS/mm2 eDRAM-LUT-Based Digital-Computing-in-Memory Macro with In-Memory Encoding and Refreshing.	ISSCC	2024	DBLP DOI BibTeX RDF
11	Win-San Khwa, Ping-Chun Wu, Jui-Jen Wu, Jian-Wei Su, Ho-Yu Chen, Zhao-En Ke, Ting-Chien Chiu, Jun-Ming Hsu, Chiao-Yen Cheng, Yu-Chen Chen, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang	34.2 A 16nm 96Kb Integer/Floating-Point Dual-Mode-Gain-Cell-Computing-in-Memory Macro Achieving 73.3-163.3TOPS/W and 33.2-91.2TFLOPS/W for AI-Edge Devices.	ISSCC	2024	DBLP DOI BibTeX RDF
11	An Guo, Xi Chen, Fangyuan Dong, Jinwu Chen, Zhihang Yuan, Xing Hu, Yuanpeng Zhang, Jingmin Zhang, Yuchen Tang, Zhican Zhang, Gang Chen, Dawei Yang, Zhaoyang Zhang, Lizheng Ren, Tianzhu Xiong, Bo Wang, Bo Liu, Weiwei Shan, Xinning Liu, Hao Cai, Guangyu Sun, Jun Yang, Xin Si	34.3 A 22nm 64kb Lightning-Like Hybrid Computing-in-Memory Macro with a Compressed Adder Tree and Analog-Storage Quantizers for Transformer and CNNs.	ISSCC	2024	DBLP DOI BibTeX RDF
11	Tomoya Ogawa, Ken Matsubara, Yasuhiko Taito, Tomoya Saito, Masayuki Izuna, Koichi Takeda, Yoshinobu Kaneda, Takahiro Shimoi, Hidenori Mitani, Takashi Ito, Takashi Kono	15.8 A 22nm 10.8Mb Embedded STT-MRAM Macro Achieving over 200MHz Random-Read Access and a 10.4MB/s Write Throughput with an In-Field Programmable 0.3Mb MTJ-OTP for High-End MCUs.	ISSCC	2024	DBLP DOI BibTeX RDF
11	Yang Wang, Xiaolong Yang, Yubin Qin, Zhiren Zhao, Ruiqi Guo, Zhiheng Yue, Huiming Han, Shaojun Wei, Yang Hu 0001, Shouyi Yin	34.1 A 28nm 83.23TFLOPS/W POSIT-Based Compute-in-Memory Macro for High-Accuracy AI Applications.	ISSCC	2024	DBLP DOI BibTeX RDF
11	Hidehiro Fujiwara, Haruki Mori, Wei-Chang Zhao, Kinshuk Khare, Cheng-En Lee, Xiaochen Peng, Vineet Joshi, Chao-Kai Chuang, Shu-Huan Hsu, Takeshi Hashizume, Toshiaki Naganuma, Chen-Hung Tien, Yao-Yi Liu, Yen-Chien Lai, Chia-Fu Lee, Tan-Li Chou, Kerem Akarvardar, Saman Adham, Yih Wang, Yu-Der Chih, Yen-Huei Chen, Hung-Jen Liao, Tsung-Yung Jonathan Chang	34.4 A 3nm, 32.5TOPS/W, 55.0TOPS/mm2 and 3.78Mb/mm2 Fully-Digital Compute-in-Memory Macro Supporting INT12 × INT12 with a Parallel-MAC Architecture and Foundry 6T-SRAM Bit Cell.	ISSCC	2024	DBLP DOI BibTeX RDF
11	Brent Pappas, Paul Gazzillo	Semantic Analysis of Macro Usage for Portability.	ICSE	2024	DBLP DOI BibTeX RDF
11	Yathin Kumar Attuluri, Ruchit Chudasama, Kailash Prasad, Joycee Mekie	FP-ATM: A Flexible Floating Point NOR Adder Tree Macro for In-Memory Computing.	VLSID	2024	DBLP DOI BibTeX RDF
11	Andrew McAninch	Go Big or Go Home? A New Case for Integrating Micro-ethics and Macro-ethics in Engineering Ethics Education.	Sci. Eng. Ethics	2023	DBLP DOI BibTeX RDF
11	Jing-Zhi Huang, Zhan Shi	Machine-Learning-Based Return Predictors and the Spanning Controversy in Macro-Finance.	Manag. Sci.	2023	DBLP DOI BibTeX RDF
11	José de Sousa, Guillaume Hollard	From Micro to Macro Gender Differences: Evidence from Field Tournaments.	Manag. Sci.	2023	DBLP DOI BibTeX RDF
11	Yingbo Sun, Tao Xu, Jingyuan Li, Yuan Chu, Xuewu Ji	MMH-STA: A Macro-Micro-Hierarchical Spatio-Temporal Attention Method for Multi-Agent Trajectory Prediction in Unsignalized Roundabouts.	IEEE Trans. Veh. Technol.	2023	DBLP DOI BibTeX RDF
11	Chin-Yin Chen, Junjie Dai, Guilin Yang, Chongchong Wang, Yaonan Li, Long Chen 0001	Sensor-based force decouple controller design of macro-mini manipulator.	Robotics Comput. Integr. Manuf.	2023	DBLP DOI BibTeX RDF
11	Je-Min Hung, Tai-Hao Wen, Yen-Hsiang Huang, Sheng-Po Huang, Fu-Chun Chang, Chin-I Su, Win-San Khwa, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang	8-b Precision 8-Mb ReRAM Compute-in-Memory Macro Using Direct-Current-Free Time-Domain Readout Scheme for AI Edge Devices.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
11	Hechen Wang, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte, Dan Lake, Brent R. Carlton	A Charge Domain SRAM Compute-in-Memory Macro With C-2C Ladder-Based 8-Bit MAC Unit in 22-nm FinFET Process for Edge Inference.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
11	Zhiting Lin, Zhongzhen Tong, Fangming Wang, Jin Zhang, Yue Zhao, Peng Sun, Tian Xu, Cheng Zhang, Xingwei Li, Xiulong Wu, Wenjuan Lu, Chunyu Peng, Qiang Zhao 0007, Junning Chen	In Situ Storing 8T SRAM-CIM Macro for Full-Array Boolean Logic and Copy Operations.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
11	Wang Ye, Linfang Wang, Zhidao Zhou, Junjie An, Weizeng Li, Hanghang Gao, Zhi Li, Jinshan Yue, Hongyang Hu, Xiaoxin Xu, Jianguo Yang, Jing Liu, Dashan Shang, Feng Zhang 0014, Jinghui Tian, Chunmeng Dou, Qi Liu 0010, Ming Liu	A 28-nm RRAM Computing-in-Memory Macro Using Weighted Hybrid 2T1R Cell Array and Reference Subtracting Sense Amplifier for AI Edge Inference.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
11	Chun-Yen Yao, Tsung-Yen Wu, Han-Chung Liang, Yu-Kai Chen, Tsung-Te Liu	A Fully Bit-Flexible Computation in Memory Macro Using Multi-Functional Computing Bit Cell and Embedded Input Sparsity Sensing.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
11	Jian-Wei Su, Yen-Chi Chou, Ruhui Liu, Ta-Wei Liu, Pei-Jung Lu, Ping-Chun Wu, Yen-Lin Chung, Li-Yang Hong, Jin-Sheng Ren, Tianlong Pan, Chuan-Jia Jhang, Wei-Hsing Huang, Chih-Han Chien, Peng-I Mei, Sih-Han Li, Shyh-Shyuan Sheu, Shih-Chieh Chang, Wei-Chung Lo, Chih-I Wu, Xin Si, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang	A 8-b-Precision 6T SRAM Computing-in-Memory Macro Using Segmented-Bitline Charge-Sharing Scheme for AI Edge Chips.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
11	Xiangxing Yang, Nan Sun 0001	A 4-Bit Mixed-Signal MAC Macro With One-Shot ADC Conversion.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
11	Bechoo Lal, Narender Chinthamu, B. Harichandana, Panem Charanarur, Akhilesh Sharmaa, A. Ranjith Kumar	Monitoring and Sensing of Real-Time Data with Deep Learning Through Micro- and Macro-analysis in Hardware Support Packages.	SN Comput. Sci.	2023	DBLP DOI BibTeX RDF
11	Shamal Salunkhe, Surendra Bhosale	Tasmanian Devil Sail Fish Optimization with Deep Learning Enabled Macro Block Selection for Video Steganography in Compressed Video Stream.	SN Comput. Sci.	2023	DBLP DOI BibTeX RDF
11	David Alaminos, Ignacio Esteban, M. Belén Salas	Neural networks for estimating Macro Asset Pricing model in football clubs.	Intell. Syst. Account. Finance Manag.	2023	DBLP DOI BibTeX RDF
11	Baiyu Qiao, Yajia Liu, Xiongkui He, Lingxiao Wang, Hu Han 0005, Lanting Zhang, Peng Qi, Limin Liu, Leng Han, Shaoqing Xu, Zhan Huang, Tao Wu, Li Yang	Modeling and analysis of droplet deposition behavior: From the micro and macro perspectives.	Comput. Electron. Agric.	2023	DBLP DOI BibTeX RDF
11	Lei Zhang 0060, Haipeng Yang, Shangshang Yang, Xingyi Zhang 0001	A Macro-Micro Population-Based Co-Evolutionary Multi-Objective Algorithm for Community Detection in Complex Networks [Research Frontier].	IEEE Comput. Intell. Mag.	2023	DBLP DOI BibTeX RDF
11	Jaakko Oivukkamäki, Jon Atherton, Shan Xu, Anu Riikonen, Chao Zhang 0006, Teemu Hakala, Eija Honkavaara, Albert Porcar-Castell	Investigating Foliar Macro- and Micronutrient Variation with Chlorophyll Fluorescence and Reflectance Measurements at the Leaf and Canopy Scales in Potato.	Remote. Sens.	2023	DBLP DOI BibTeX RDF
11	Sebastian Maneth, Helmut Seidl	Deciding origin equivalence of weakly self-nesting macro tree transducers.	Inf. Process. Lett.	2023	DBLP DOI BibTeX RDF
11	Mamoru Mimura, Risa Yamamoto	A Feasibility Study on Evasion Attacks Against NLP-Based Macro Malware Detection Algorithms.	IEEE Access	2023	DBLP DOI BibTeX RDF
11	Macoumba Fall, Younes Balboul, Mohammed Fattah, Said Mazer, Moulhime El Bekkali, Ahmed D. Kora	Towards Sustainable 5G Networks: A Proposed Coordination Solution for Macro and Pico Cells to Optimize Energy Efficiency.	IEEE Access	2023	DBLP DOI BibTeX RDF
11	Xiaohong Mo, Zhihao Xie, Ding-Bang Luh	A Hybrid Macro and Micro Method for Consumer Emotion and Behavior Research.	IEEE Access	2023	DBLP DOI BibTeX RDF
11	Xiaoxue Cao, Jiahao Lin, Shaoxiong Wu, Srikrishna Chanakya Bodepudi, Zongwen Li, Feng Tian, Zheng Li, Xinyu Liu 0016, Li Peng, Chao Gao, Yang Xu 0035	Recoverable Patterning of Macro-Assembled Graphene Nanofilms.	IEEE Access	2023	DBLP DOI BibTeX RDF
11	Yuzhe He, Ning He, Haigang Yu, Ren Zhang, Kang Yan	From macro to micro: rethinking multi-scale pedestrian detection.	Multim. Syst.	2023	DBLP DOI BibTeX RDF
11	Xiaopeng Yang, Weicheng Gao, Xiaodong Qu, Peng Yin, Haoyu Meng, Aly E. Fathy	A Lightweight Multiscale Neural Network for Indoor Human Activity Recognition Based on Macro and Micro-Doppler Features.	IEEE Internet Things J.	2023	DBLP DOI BibTeX RDF
11	Jing-Ru C. Cheng, Corwin Stanford, Steven R. Glandon, Anthony L. Lam, Warren R. Williams	Macro benchmarking edge devices using enhanced super-resolution generative adversarial networks (ESRGANs).	J. Supercomput.	2023	DBLP DOI BibTeX RDF