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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2784 occurrences of 1319 keywords
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Results
Found 4097 publication records. Showing 4097 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
12 | Almudena Lindoso, Luis Entrena, Juan Izquierdo, Judith Liu-Jimenez |
Coarse-grain dynamically reconfigurable coprocessor for image processing in SOPC. |
FPL |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Steffen Köhler, Jan Schirok, Jens Braunes, Rainer G. Spallek |
Efficiency of Dynamic Reconfigurable Datapath Extensions -- A Case Study. |
ARC |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Stephen Wright |
Using EventB to Create a Virtual Machine Instruction Set Architecture. |
ABZ |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Ilya Wagner, Valeria Bertacco |
Reversi: Post-silicon validation system for modern microprocessors. |
ICCD |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Ke Pei, Gang Zhang, Fujiang Li |
Design of Boot Loader with Multiple Communication Port. |
CSSE (2) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Dwayne Lee |
OpenSPARC - A Scalable Chip Multi-Threading Design. |
VLSI Design |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Sachin S. Sapatnekar, Eshel Haritan, Kurt Keutzer, Anirudh Devgan, Desmond Kirkpatrick, Stephen Meier, Duaine Pryor, Tom Spyrou |
Reinventing EDA with manycore processors. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
parallelization, CAD, software, multicore, EDA, speedup, manycore |
12 | Sanjay V. Kumar, Chandramouli V. Kashyap, Sachin S. Sapatnekar |
A framework for block-based timing sensitivity analysis. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
pruning, variations, reordering, slacks, arrival times |
12 | Jason D. Lee, Praveen Bhojwani, Rabi N. Mahapatra |
A Safety Analysis Framework for COTS Microprocessors in Safety-Critical Applications. |
HASE |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Proshanta Saha, Tarek A. El-Ghazawi |
A Methodology for Automating Co-Scheduling for Reconfigurable Computing Systems. |
MEMOCODE |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Tim Güneysu, Christof Paar, Sven Schäge |
Efficient Hash Collision Search Strategies on Special-Purpose Hardware. |
WEWoRC |
2007 |
DBLP DOI BibTeX RDF |
Crypto Attacks, Hash functions, Special-purpose Hardware |
12 | Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, Majid Sarrafzadeh |
Soft Error-Aware Power Optimization Using Gate Sizing. |
PATMOS |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Shih-Lien Lu, Peter Yiannacouras, Rolf Kassa, Michael Konow, Taeweon Suh |
An FPGA-based Pentium in a complete desktop system. |
FPGA |
2007 |
DBLP DOI BibTeX RDF |
pentium®, FPGA, emulator, accelerator, processor |
12 | David Sheldon, Frank Vahid, Stefano Lonardi |
Interactive presentation: Soft-core processor customization using the design of experiments paradigm. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Kypros Constantinides, Onur Mutlu, Todd M. Austin, Valeria Bertacco |
Software-Based Online Detection of Hardware Defects Mechanisms, Architectural Support, and Evaluation. |
MICRO |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Chang-Burm Cho, Wangyuan Zhang, Tao Li 0006 |
Informed Microarchitecture Design Space Exploration Using Workload Dynamics. |
MICRO |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Yale N. Patt |
The Transformation Hierarchy in the Era of Multi-core. |
HiPC |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Jeremy S. Meredith, Sadaf R. Alam, Jeffrey S. Vetter |
Analysis of a Computational Biology Simulation Technique on Emerging Processing Architectures. |
IPDPS |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Proshanta Saha, Tarek A. El-Ghazawi |
Software/Hardware Co-Scheduling for Reconfigurable Computing Systems. |
FCCM |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Wolfgang Puffitsch, Martin Schoeberl |
picoJava-II in an FPGA. |
JTRES |
2007 |
DBLP DOI BibTeX RDF |
FPGA, Java processor |
12 | Kris Tiri, Onur Aciiçmez, Michael Neve, Flemming Andersen |
An Analytical Model for Time-Driven Cache Attacks. |
FSE |
2007 |
DBLP DOI BibTeX RDF |
|
12 | David E. Duarte, Greg Taylor, Keng L. Wong, Usman Mughal, George L. Geannopoulos |
Advanced thermal sensing circuit and test techniques used in a high performance 65nm processor. |
ISLPED |
2007 |
DBLP DOI BibTeX RDF |
sensor calibration error, temperature sensing, thermal management, analog design |
12 | Steven Eno, Lauren Mace, Jianyi Liu, Brian Benson, Kailash Raman, Kiju Lee, Matthew Moses, Gregory S. Chirikjian |
Robotic Self-Replication in a Structured Environment without Computer Control. |
CIRA |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Mini Nanua, David T. Blaauw |
Investigating Crosstalk in Sub-Threshold Circuits. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Cecilia Metra, Martin Omaña 0001, T. M. Mak, Simon Tam 0001 |
Novel Approach to Clock Fault Testing for High Performance Microprocessors. |
VTS |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Neal A. Harman |
Algebraic Models of Simultaneous Multithreaded and Multi-core Processors. |
CALCO |
2007 |
DBLP DOI BibTeX RDF |
many-sorted algebra, verification, microprocessors, correctness, threaded |
12 | Kristen R. Walcott, Greg Humphreys, Sudhanva Gurumurthi |
Dynamic prediction of architectural vulnerability from microarchitectural state. |
ISCA |
2007 |
DBLP DOI BibTeX RDF |
architecture vulnerability factor, redundant multithreading, performance, reliability, microarchitecture |
12 | Steven M. Burns, Mahesh Ketkar, Noel Menezes, Keith A. Bowman, James W. Tschanz, Vivek De |
Comparative Analysis of Conventional and Statistical Design Techniques. |
DAC |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Haldun Haznedar, Martin Gall, Vladimir Zolotov, Pon Sung Ku, Chanhee Oh, Rajendran Panda |
Impact of stress-induced backflow on full-chip electromigration risk assessment. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Shiwen Hu, Madhavi Gopal Valluri, Lizy Kurian John |
Effective management of multiple configurable units using dynamic optimization. |
ACM Trans. Archit. Code Optim. |
2006 |
DBLP DOI BibTeX RDF |
Adaptive computing environment (ACE), dynamic optimization, power dissipation, hotspots |
12 | Toshinori Sato, Yuu Tanaka, Hidenori Sato, Toshimasa Funaki, Takenori Koushiro, Akihiro Chiyonobu |
Improving Energy Efficiency Via Speculative Multithreading on MultiCore Processors. |
PATMOS |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Zaher S. Andraus, Mark H. Liffiton, Karem A. Sakallah |
Refinement strategies for verification methods based on datapath abstraction. |
ASP-DAC |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Kieron Turkington, Konstantinos Masselos, George A. Constantinides, Philip Heng Wai Leong |
FPGA Based Acceleration of the Linpack Benchmark: A High Level Code Transformation Approach. |
FPL |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Jason D. Bakos, Charles L. Cathey, Allen Michalski |
Predictive Load Balancing for Interconnected FPGAs. |
FPL |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Adam J. Elbirt, Christof Paar |
Efficient Implementation of Galois Field Fixed Field Constant Multiplication. |
ITNG |
2006 |
DBLP DOI BibTeX RDF |
embedded systems, cryptography, block cipher, galois field |
12 | Panagiotis Manolios |
Refinement and Theorem Proving. |
SFM |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Davy Genbrugge, Lieven Eeckhout, Koen De Bosschere |
Accurate memory data flow modeling in statistical simulation. |
ICS |
2006 |
DBLP DOI BibTeX RDF |
memory data flow modeling, performance modeling, statistical simulation |
12 | Grigorios Magklis, Pedro Chaparro, José González 0002, Antonio González 0001 |
Independent front-end and back-end dynamic voltage scaling for a GALS microarchitecture. |
ISLPED |
2006 |
DBLP DOI BibTeX RDF |
MCD, energy efficiency, DVS, microarchitecture, GALS |
12 | Tanay Karnik, Peter Hazucha, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner |
High-frequency DC-DC conversion : fact or fiction. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Ajay Joshi, Lieven Eeckhout, Robert H. Bell Jr., Lizy Kurian John |
Performance Cloning: A Technique for Disseminating Proprietary Applications as Benchmarks. |
IISWC |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Paul T. Myrda, Eric A. Udren |
System-Wide Replacement Strategy for Substation Protection and Automation Systems. |
HICSS |
2006 |
DBLP DOI BibTeX RDF |
|
12 | André V. Fidalgo, Gustavo R. Alves, José M. Ferreira 0001 |
Real Time Fault Injection Using Enhanced OCD -- A Performance Analysis. |
DFT |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Chester Rebeiro, A. David Selvakumar, A. S. L. Devi |
Bitslice Implementation of AES. |
CANS |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Geir Olav Dyrkolbotn, Einar Snekkenes |
A Wireless Covert Channel on Smart Cards (Short Paper). |
ICICS |
2006 |
DBLP DOI BibTeX RDF |
EMSide-Channel, Wireless Covert Channel, Smart Cards, Subversion |
12 | Rajarshi Mukherjee, Seda Ogrenci Memik |
Systematic temperature sensor allocation and placement for microprocessors. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
sensor, placement, allocation, temperature |
12 | Vladimir Stojanovic, R. Iris Bahar, Jennifer Dworak, Richard Weiss 0001 |
A cost-effective implementation of an ECC-protected instruction queue for out-of-order microprocessors. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
instruction queue, reliability, error correcting codes |
12 | Alexandros C. Dimopoulos, Christos Pavlatos, Ioannis Panagopoulos, George K. Papakonstantinou |
An Efficient Hardware Implementation for AI Applications. |
SETN |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Cristian Constantinescu |
Dependability evaluation of a fault-tolerant processor by GSPN modeling. |
IEEE Trans. Reliab. |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Y. Abulafia, Avner Kornfeld |
Estimation of FMAX and ISB in microprocessors. |
IEEE Trans. Very Large Scale Integr. Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Giovanni Squillero |
MicroGP-An Evolutionary Assembly Program Generator. |
Genet. Program. Evolvable Mach. |
2005 |
DBLP DOI BibTeX RDF |
micro-processors, assembly programs generation, evolutionary algorithms |
12 | Shlomi Dolev, Yinnon A. Haviv, Mooly Sagiv |
Self-stabilization Preserving Compiler. |
Self-Stabilizing Systems |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Yue Li, Tao Li, Tamer Kahveci, José A. B. Fortes |
Workload Characterization of Bioinformatics Applications. |
MASCOTS |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Pradeep Nalabalapu, Ron Sass |
Bandwidth Management with a Reconfigurable Data Cache. |
IPDPS |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Francesco Lertora, Michele Borgatti |
Handling Different Computational Granularity by a Reconfigurable IC Featuring Embedded FPGAs and a Network-on-Chip. |
FCCM |
2005 |
DBLP DOI BibTeX RDF |
|
12 | P. C. Kwan, C. T. Clarke |
FPGAs for Improved Energy Efficiency in Processor Based Systems. |
Asia-Pacific Computer Systems Architecture Conference |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Hans Eberle, Arvinderpal Wander, Nils Gura, Sheueling Chang Shantz, Vipul Gupta |
Architectural Extensions for Elliptic Curve Cryptography over GF(2m) on 8-bit Microprocessors. |
ASAP |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Ernesto Sánchez 0001, Matteo Sonza Reorda, Giovanni Squillero |
On the Transformation of Manufacturing Test Sets into On-Line Test Sets for Microprocessors. |
DFT |
2005 |
DBLP DOI BibTeX RDF |
|
12 | K. Uday Bhaskar, M. Prasanth, G. Chandramouli, V. Kamakoti 0001 |
A Universal Random Test Generator for Functional Verification of Microprocessors and System-on-Chip. |
VLSI Design |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Ilya Wagner, Valeria Bertacco, Todd M. Austin |
StressTest: an automatic approach to test generation via activity monitors. |
DAC |
2005 |
DBLP DOI BibTeX RDF |
directed-random simulation, architectural simulation, high-performance simulation |
12 | Don Edenfeld, Andrew B. Kahng, Mike Rodgers, Yervant Zorian |
2003 Technology Roadmap for Semiconductors. |
Computer |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Victor V. Zyuban, David M. Brooks, Viji Srinivasan, Michael Gschwind, Pradip Bose, Philip N. Strenski, Philip G. Emma |
Integrated Analysis of Power and Performance for Pipelined Microprocessors. |
IEEE Trans. Computers |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Greg Stitt, Frank Vahid, Shawn Nematbakhsh |
Energy savings and speedups from partitioning critical software loops to hardware in embedded systems. |
ACM Trans. Embed. Comput. Syst. |
2004 |
DBLP DOI BibTeX RDF |
FPGA, embedded systems, synthesis, platforms, speedup, low energy, Hardware/software partitioning |
12 | Arijit Ghosh, Tony Givargis |
Cache optimization for embedded processor cores: An analytical approach. |
ACM Trans. Design Autom. Electr. Syst. |
2004 |
DBLP DOI BibTeX RDF |
design space exploration, system-on-a-chip, Cache optimization, core-based design |
12 | Carl Scafidi, J. Douglas Gibson, Rohit Bhatia |
Validating the Itanium 2 Exception Control Unit: A Unit-Level Approach. |
IEEE Des. Test Comput. |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Vladimír Oplustil, L. Gáspár, D. Svacina, Stefan Szabó |
COTS (Commercial Off The Shelf) Distributed System for Critical Application. |
ECBS |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Roland E. Wunderlich, James C. Hoe |
In-system FPGA prototyping of an itanium microarchitecture. |
FPGA |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Ian Kuon, Navid Azizi, Ahmad Darabiha, Aaron Egier, Paul Chow |
FPGA-based supercomputing: an implementation for molecular dynamics. |
FPGA |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt |
Automatic Tuning of Two-Level Caches to Embedded Applications. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
cache exploration, embedded systems, low power, low energy, cache optimization, architecture tuning, cache hierarchy, Configurable cache |
12 | Ma Sasa, Zhao Shouwei, Xiao Xiaofeng |
General automatic test system for PCB of military equipment. |
ICARCV |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Haihua Shen, Yunji Chen, Jing Huang |
EmGen: An Automatic Test-Program Generation Tool for Embedded IP Cores. |
ICESS |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Lieven Eeckhout |
Efficient architectural design of high performance microprocessors. |
ISPASS |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Timothy J. Dysart, Branden J. Moore, Lambert Schaelicke, Peter M. Kogge |
Cache implications of aggressively pipelined high performance microprocessors. |
ISPASS |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Emanuele Lattanzi, Aman Gayasen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Luca Benini, Alessandro Bogliolo |
Improving Java Performance Using Dynamic Method Migration on FPGAs. |
IPDPS |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Navid Azizi, Ian Kuon, Aaron Egier, Ahmad Darabiha, Paul Chow |
Reconfigurable Molecular Dynamics Simulator. |
FCCM |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Ali El-Haj-Mahmoud, Eric Rotenberg |
Safely exploiting multithreaded processors to tolerate memory latency in real-time systems. |
CASES |
2004 |
DBLP DOI BibTeX RDF |
real-time systems, multithreading, worst-case execution time, memory latency, schedulability test |
12 | Valentina Salapura, Christos J. Georgiou, Indira Nair |
An efficient system-on-a-chip design methodology for networking applications. |
CASES |
2004 |
DBLP DOI BibTeX RDF |
network processor, system-on-a-chip |
12 | Bryan Black, Donald Nelson, Clair Webb, Nick Samra |
3D Processing Technology and Its Impact on iA32 Microprocessors. |
ICCD |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Erik DeBenedictis |
Will Moore's Law Be Sufficient? |
SC |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Xizhi Li, Tiecai Li |
ECOMIPS: An Economic MIPS CPU Design on FPGA. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Mohamed M. Zahran |
On cache memory hierarchy for Chip-Multiprocessor. |
SIGARCH Comput. Archit. News |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Fabian Vargas 0001, Rubem Dutra Ribeiro Fagundes, Daniel Barros Jr. |
A New On-Line Robust Approach to Design Noise-Immune Speech Recognition Systems. |
J. Electron. Test. |
2003 |
DBLP DOI BibTeX RDF |
speech-recognition systems (SRS), digital signal processing (DSP), on-line testing, performance degradation, noise immunity, area overhead, recovery blocks |
12 | Paul H. Dietz, William S. Yerazunis, Darren Leigh |
Very Low-Cost Sensing and Communication Using Bidirectional LEDs. |
UbiComp |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir |
Using Dynamic Branch Behavior for Power-Efficient Instruction Fetch. |
ISVLSI |
2003 |
DBLP DOI BibTeX RDF |
|
12 | James C. Dehnert, Brian Grant, John P. Banning, Richard Johnson, Thomas Kistler, Alexander Klaiber, Jim Mattson |
The Transmeta Code Morphing - Software: Using Speculation, Recovery, and Adaptive Retranslation to Address Real-Life Challenges. |
CGO |
2003 |
DBLP DOI BibTeX RDF |
|
12 | James C. Dehnert |
The Transmeta Crusoe: VLIW Embedded in CISC. |
SCOPES |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Arnaldo Azevedo, Rodrigo Soares, Ivan Saraiva Silva |
A New Hybrid Parallel/Reconfigurable Architecture: The X4CP32. |
SBCCI |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Fulvio Corno, F. Cumani, Giovanni Squillero |
Exploiting Auto-adaptive 7GP for Highly Effective Test Programs Generation. |
ICES |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Tillmann Schmitz, Steffen G. Hohmann, Karlheinz Meier, Johannes Schemmel, Felix Schürmann |
Speeding up Hardware Evolution: A Coprocessor for Evolutionary Algorithms. |
ICES |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Arijit Ghosh, Tony Givargis |
Cache Optimization For Embedded Processor Cores: An Analytical Approach. |
ICCAD |
2003 |
DBLP DOI BibTeX RDF |
Design Space Exploration, System-on-a-Chip, Cache Optimization, Core-Based Design |
12 | Andrès Márquez, Guang R. Gao |
CARE: Overview of an Adaptive Multithreaded Architecture. |
ISHPC |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Cecilia Metra, T. M. Mak, Daniele Rossi 0001 |
Clock Calibration Faults and their Impact on Quality of High Performance Microprocessors. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Rodrigo Soares, Arnaldo Azevedo, Ivan Saraiva Silva |
X4CP32: A New Parallel/Reconfigurable General-Purpose Processor. |
SBAC-PAD |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Rahul Bhatt, Dave LaFollette, Arjun Kapur |
The Fallacy of Spec-Based Design. |
SEFM |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Ing-Jer Huang, Chung-Fu Kao, Hsin-Ming Chen, Ching-Nan Juan, Tai-An Lu |
A Retargetable Embedded In-Circuit Emulation Module for Microprocessors. |
IEEE Des. Test Comput. |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Toshinori Sato, Itsujiro Arita |
Reducing Energy Consumption via Low-Cost Value Prediction. |
PATMOS |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Ricky W. Butler |
Formal Methods at NASA Langley. |
TPHOLs |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Daranee Hormdee, Jim D. Garside, Stephen B. Furber |
An Asynchronous Victim Cache. |
DSD |
2002 |
DBLP DOI BibTeX RDF |
copy-back cache architecture, asynchronous design, victim cache |
12 | Stefan Szabó, Vladimír Oplustil |
Distributed CAN based control system for robotic and airborne applications. |
ICARCV |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Fabian Vargas 0001, Rubem Dutra Ribeiro Fagundes, Daniel Barros Jr. |
Experimental Results of a Recovery Block Scheme to Handle Noise in Speech Recognition Systems. |
Asian Test Symposium |
2002 |
DBLP DOI BibTeX RDF |
Speech-Recognition Systems (SRS), Recovery Blocks Scheme, Digital Signal Processing (DSP), On-Line Testing, Performance Degradation, Noise Immunity |
12 | Steffen Köhler, Jens Braunes, Sergej Sawitzki, Rainer G. Spallek |
Improving Code Efficiency for Reconfigurable VLIW Processors. |
IPDPS |
2002 |
DBLP DOI BibTeX RDF |
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