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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 1912 occurrences of 1093 keywords
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Results
Found 3972 publication records. Showing 3946 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
26 | Adriano Camps, Mercedes Magdalena Vall-Llossera, Hyuk Park 0001, Gerard Portal, Luciana Rossato |
Sensitivity to Soil Moisture of SP Aceborne GNSS-R Observables. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IGARSS ![In: 2018 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2018, Valencia, Spain, July 22-27, 2018, pp. 3161-3164, 2018, IEEE, 978-1-5386-7150-4. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
26 | Alexandre Levisse, Bastien Giraud, Jean-Philippe Noël, Mathieu Moreau, Jean-Michel Portal |
RRAM Crossbar Arrays for Storage Class Memory Applications: Throughput and Density Considerations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DCIS ![In: Conference on Design of Circuits and Integrated Systems, DCIS 2018, Lyon, France, November 14-16, 2018, pp. 1-6, 2018, IEEE, 978-1-7281-0171-2. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
26 | Steve Ngueya W., Jean-Michel Portal, Hassen Aziza, Julien Mellier, Stephane Ricard |
A Power Efficient Regulated Charge Pump Based on Charge Sharing for Contactless Devices: An Alternative to Four-Phase Charge Pumps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Low Power Electron. ![In: J. Low Power Electron. 13(4), pp. 595-604, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
26 | Steve Ngueya W., Julien Mellier, Stephane Ricard, Jean-Michel Portal, Hassen Aziza |
High voltage recycling scheme to improve power consumption of regulated charge pumps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: 27th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2017, Thessaloniki, Greece, September 25-27, 2017, pp. 1-5, 2017, IEEE, 978-1-5090-6462-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
26 | Steve Ngueya W., Julien Mellier, Stephane Ricard, Jean-Michel Portal, Hassen Aziza |
Power efficiency optimization of charge pumps in embedded low voltage NOR flash memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NORCAS ![In: IEEE Nordic Circuits and Systems Conference, NORCAS 2017: NORCHIP and International Symposium of System-on-Chip (SoC), Linköping, Sweden, October 23-25, 2017, pp. 1-5, 2017, IEEE, 978-1-5386-2844-7. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
26 | Alexandre Levisse, Bastien Giraud, Jean-Philippe Noël, Mathieu Moreau, Jean-Michel Portal |
High density emerging resistive memories: What are the limits? ![Search on Bibsonomy](Pics/bibsonomy.png) |
LASCAS ![In: 8th IEEE Latin American Symposium on Circuits & Systems, LASCAS 2017, Bariloche, Argentina, February 20-23, 2017, pp. 1-4, 2017, IEEE, 978-1-5090-5859-4. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
26 | Steve Ngueya W., Julien Mellier, Stephane Ricard, Jean-Michel Portal, Hassen Aziza |
An Ultra-Low Power and High Speed Single Ended Sense Amplifier for Non-Volatile Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NGCAS ![In: New Generation of CAS, NGCAS 2017, Genova, Italy, September 6-9, 2017, pp. 209-212, 2017, IEEE, 978-1-5090-6447-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
26 | Alexandre Levisse, Pablo Royer, Bastien Giraud, Jean-Philippe Noël, Mathieu Moreau, Jean-Michel Portal |
Architecture, design and technology guidelines for crosspoint memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NANOARCH ![In: IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2017, Newport, RI, USA, July 25-26, 2017, pp. 55-60, 2017, IEEE, 978-1-5090-6037-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
26 | Mahesh Nataraj, Alexandre Levisse, Bastien Giraud, Jean-Philippe Noël, Pascal Andreas Meinerzhagen, Jean-Michel Portal, Pierre-Emmanuel Gaillardon |
Design methodology for area and energy efficient OxRAM-based non-volatile flip-flop. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017, pp. 1-4, 2017, IEEE, 978-1-4673-6853-7. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
26 | Alexis Krakovinsky, Marc Bocquet, Romain Wacquez, Jean Coignus, Jean-Michel Portal |
Thermal laser attack and high temperature heating on HfO2-based OxRAM cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 23rd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2017, Thessaloniki, Greece, July 3-5, 2017, pp. 85-89, 2017, IEEE, 978-1-5386-0352-9. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
26 | Sabah Sabaghy, Jeffrey P. Walker, Luigi J. Renzullo, Ruzbeh Akbar, Steven Tsz K. Chan, Julian Chaubell, Narendra N. Das, Roy Scott Dunbar, Dara Entekhabi, Anouk Gevaert, Thomas J. Jackson, Olivier Merlin, Mahta Moghaddam, Jinzheng Peng, Jeffrey Piepmeier, Maria Piles, Gerard Portal, Christoph Rüdiger, Vivien Stefan, Xiaoling Wu 0001, Nan Ye, Simon Yueh |
Comparison of downscaling techniques for high resolution soil moisture mapping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IGARSS ![In: 2017 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2017, Fort Worth, TX, USA, July 23-28, 2017, pp. 2523-2526, 2017, IEEE, 978-1-5090-4951-6. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
26 | Gerard Portal, Mercè Vall-llossera, Maria Piles, Adriano Camps, David Chaparro, Miriam Pablos, Luciana Rossato |
A spatially consistent downscaling approach for SMOS using an adaptive moving window. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IGARSS ![In: 2017 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2017, Fort Worth, TX, USA, July 23-28, 2017, pp. 4151-4153, 2017, IEEE, 978-1-5090-4951-6. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
26 | Gabriel M. Portal, Marcus Ritt, Leonardo Borba, Luciana S. Buriol |
Simulated annealing for the machine reassignment problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. Oper. Res. ![In: Ann. Oper. Res. 242(1), pp. 93-114, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
26 | Karine Coulié-Castellani, Wenceslas Rahajandraibe, Gilles Micolau, Hassen Aziza, Jean-Michel Portal |
Optimization of a Particles Detection Chain Based on a VCO Structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 32(1), pp. 21-30, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
26 | Hassen Aziza, Jean-Michel Portal |
Resistive RAM variability monitoring using a ring oscillator based test chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 64, pp. 59-62, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
26 | Alexandre Levisse, Bastien Giraud, Jean-Philippe Noel, Mathieu Moreau, Jean-Michel Portal |
Capacitor based SneakPath compensation circuit for transistor-less ReRAM architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NANOARCH ![In: IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2016, Beijing, China, July 18-20, 2016, pp. 7-12, 2016, ACM, 978-1-4503-4330-5. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
26 | Hassen Aziza, Haithem Ayari, Santhosh Onkaraiah, Mathieu Moreau, Jean-Michel Portal, Marc Bocquet |
Multilevel operation in oxide based resistive RAM with SET voltage modulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DTIS ![In: 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016, Istanbul, Turkey, April 12-14, 2016, pp. 1-5, 2016, IEEE, 978-1-5090-0336-5. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
26 | Ala Aldin M. H. M. Darghouth, Mark E. Casida, Walid Taouali, Kamel Alimi, Mathias P. Ljungberg, Peter Koval, Daniel Sánchez-Portal, Dietrich Foerster |
Assessment of Density-Functional Tight-Binding Ionization Potentials and Electron Affinities of Molecules of Interest for Organic Solar Cells Against First-Principles GW Calculations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. ![In: Comput. 3(4), pp. 616-656, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
26 | Loic Welter, J. L. Scotto di Quaquero, Philippe Dreux, Laurent Lopez, Hassen Aziza, Jean-Michel Portal |
Improvement of MOSFET matching characterization with calibrated multiplexed test structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 55(9-10), pp. 1328-1333, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
26 | Jordan Innocenti, Loïc Welter, Nicolas Borrel, Franck Julien, Jean-Michel Portal, Jacques Sonzogni, Laurent Lopez, Pascal Masson, Stephan Niel, Philippe Dreux, Julia Castellan |
Dynamic current reduction of CMOS digital circuits through design and process optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: 25th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2015, Salvador, Brazil, September 1-4, 2015, pp. 77-81, 2015, IEEE, 978-1-4673-9419-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
26 | Alexandre Levisse, Bastien Giraud, Jean-Philippe Noël, Mathieu Moreau, Jean-Michel Portal |
SneakPath compensation circuit for programming and read operations in RRAM-based CrossPoint architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NVMTS ![In: 15th Non-Volatile Memory Technology Symposium, NVMTS 2015, Beijing, China, October 12-14, 2015, pp. 1-4, 2015, IEEE, 978-1-5090-2126-0. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
26 | Jordan Innocenti, Franck Julien, Jean-Michel Portal, Laurent Lopez, Q. Hubert, Pascal Masson, Jacques Sonzogni, Stephan Niel, Arnaud Régnier |
Layout optimizations to decrease internal power and area in digital CMOS standard cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MIPRO ![In: 38th International Convention on Information and Communication Technology, Electronics and Microelectronics, MIPRO 2015, Opatija, Croatia, May 25-29, 2015, pp. 1582-1587, 2015, IEEE, 978-9-5323-3082-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
26 | Karine Coulié-Castellani, Wenceslas Rahajandraibe, Hassen Aziza, Jean-Michel Portal, Gilles Micolau |
Improvement of a detection chain based on a VCO concept for microelectronic reliability under natural radiative environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-5, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
26 | Wenceslas Rahajandraibe, Fayrouz Haddad, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal |
Low cost built-in-tuning of on-chip passive filters for low-if double quadrature rf receiver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-4, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
26 | Mihalis M. Golias, Isabel Portal, Dinçer Konur, Evangelos Kaisar, Georgios Kolomvos |
Robust berth scheduling at marine container terminals via hierarchical optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Oper. Res. ![In: Comput. Oper. Res. 41, pp. 412-422, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
26 | Ogun Turkyilmaz, Santhosh Onkaraiah, Marina Reyboz, Fabien Clermidy, Hraziia, Costin Anghel, Jean-Michel Portal, Marc Bocquet |
RRAM-based FPGA for "Normally Off, Instantly On" applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Parallel Distributed Comput. ![In: J. Parallel Distributed Comput. 74(6), pp. 2441-2451, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
26 | Weisheng Zhao, Jean-Michel Portal, Wang Kang 0001, Mathieu Moreau, Yue Zhang 0010, Hassen Aziza, Jacques-Olivier Klein, Zhaohao Wang, Damien Querlioz, Damien Deleruyelle, Marc Bocquet, Dafine Ravelosona, Christophe Muller, Claude Chappert |
Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Parallel Distributed Comput. ![In: J. Parallel Distributed Comput. 74(6), pp. 2484-2496, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
26 | Wenceslas Rahajandraibe, Fayrouz Haddad, Hassen Aziza, Karine Coulié-Castellani, Jean-Michel Portal |
Low Power Radio Frequency Transceiver with Built-In-Tuning of the Local Oscillator for Open Loop Modulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Low Power Electron. ![In: J. Low Power Electron. 10(1), pp. 173-181, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
26 | Weisheng Zhao, Mathieu Moreau, Erya Deng, Yue Zhang 0010, Jean-Michel Portal, Jacques-Olivier Klein, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Damien Querlioz, Nesrine Ben Romdhane, Dafine Ravelosona, Claude Chappert |
Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(2), pp. 443-454, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
26 | Jordan Innocenti, Loic Welter, Franck Julien, Laurent Lopez, Jacques Sonzogni, Stephan Niel, Arnaud Régnier, Emmanuel Paire, Karen Labory, Eric Denis, Jean-Michel Portal, Pascal Masson |
Dynamic power reduction through process and design optimizations on CMOS 80 nm embedded non-volatile memories technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: IEEE 57th International Midwest Symposium on Circuits and Systems, MWSCAS 2014, College Station, TX, USA, August 3-6, 2014, pp. 897-900, 2014, IEEE, 978-1-4799-4134-6. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
26 | Fabien Clermidy, Natalija Jovanovic, Santhosh Onkaraiah, Houcine Oucheikh, Olivier Thomas, Ogun Turkyilmaz, Elisa Vianello, Jean-Michel Portal, Marc Bocquet |
Resistive memories: Which applications? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2014, Dresden, Germany, March 24-28, 2014, pp. 1-6, 2014, European Design and Automation Association, 978-3-9815370-2-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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26 | Abdelali El Amraoui, Marc Bocquet, F. Barros, Jean-Michel Portal, M. Charbonneau, Stéphanie Jacob, Jacqueline Bablet, Mohamed Benwadih, Vincent Fischer, Romain Coppard, R. Gwoziecky |
Printed complementary organic thin film transistors based decoder for ferroelectric memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: ESSCIRC 2014 - 40th European Solid State Circuits Conference, Venice Lido, Italy, September 22-26, 2014, pp. 111-114, 2014, IEEE, 978-1-4799-5694-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
26 | Nenad Jovanovic, Olivier Thomas, Elisa Vianello, Jean-Michel Portal, Bosko Nikolic, Lirida A. B. Naviner |
OxRAM-based non volatile flip-flop in 28nm FDSOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NEWCAS ![In: IEEE 12th International New Circuits and Systems Conference, NEWCAS 2014, Trois-Rivieres, QC, Canada, June 22-25, 2014, pp. 141-144, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
26 | Loic Welter, Philippe Dreux, Hassen Aziza, Jean-Michel Portal |
An innovative standard cells remapping method for in-circuit critical parameters monitoring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 2014 IEEE 20th International On-Line Testing Symposium, IOLTS 2014, Platja d'Aro, Girona, Spain, July 7-9, 2014, pp. 206-209, 2014, IEEE, 978-1-4799-5323-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
26 | Karine Coulié-Castellani, Wenceslas Rahajandraibe, Gilles Micolau, Hassen Aziza, Jean-Michel Portal |
Improvement of a VCO concept for low energy particule detection and recognition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 15th Latin American Test Workshop - LATW 2014, Fortaleza, Brazil, March 12-15, 2014, pp. 1-4, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
26 | Hassen Aziza, Haithem Ayari, Santhosh Onkaraiah, Jean-Michel Portal, Mathieu Moreau, Marc Bocquet |
Oxide based resistive RAM: ON/OFF resistance analysis versus circuit variability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014, Amsterdam, The Netherlands, October 1-3, 2014, pp. 81-85, 2014, IEEE Computer Society, 978-1-4799-6155-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
26 | Loic Welter, Philippe Dreux, Jordan Innocenti, Hassen Aziza, Jean-Michel Portal |
Accurate multiplexed test structure for threshold voltage matching evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DTIS ![In: Proceedings of the 9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, DTIS 2014, Santorini, Greece, May 6-8, 2014, pp. 1-6, 2014, IEEE, 978-1-4799-4972-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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26 | Alain Bensoussan, Ronan Marec, Jean Luc Muraro, L. Portal, Philippe Calvel, Catherine Barillot, Marie Genevieve Perichaud, Laurent Marchand, Gael Vignon |
GaAs P-HEMT MMIC processes behavior under multiple heavy ion radiation stress conditions combined with DC and RF biasing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 53(9-11), pp. 1466-1470, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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26 | Hassen Aziza, Marc Bocquet, Jean-Michel Portal, Mathieu Moreau, Christophe Muller |
A novel test structure for OxRRAM process variability evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 53(9-11), pp. 1208-1212, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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26 | G. Pérez-Villalón, Alberto Portal |
Computation of wavelet coefficients from average samples. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Appl. Math. ![In: J. Comput. Appl. Math. 248, pp. 118-130, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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26 | Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour |
DCG-FGT transistor: Retention study of Floating Gate charge. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013, Columbus, OH, USA, August 4-7, 2013, pp. 825-827, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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26 | Hassen Aziza, Marc Bocquet, Mathieu Moreau, Jean-Michel Portal |
Single-ended sense amplifier robustness evaluation for OxRRAM technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IDT ![In: 8th International Design and Test Symposium, IDT 2013, Marrakesh, Morocco, 16-18 December, 2013, pp. 1-5, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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26 | Fayrouz Haddad, Wenceslas Rahajandraibe, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal, Jamel Nebhen, Hervé Barthélemy |
Low-cost auto-calibration of passive polyphase filter in image reject receiver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 20th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2013, Abu Dhabi, UAE, December 8-11, 2013, pp. 699-702, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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26 | Yue Zhang 0010, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao, Mathieu Moreau, Jean-Michel Portal, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller |
Synchronous full-adder based on complementary resistive switching memory cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NEWCAS ![In: IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013, Paris, France, June 16-19, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0618-5. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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26 | Jean-Michel Portal, Mathieu Moreau, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Yue Zhang 0010, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao |
Analytical study of complementary memristive synchronous logic gates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NANOARCH ![In: IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2013, Brooklyn, NY, USA, July 15-17, 2013, pp. 70-75, 2013, IEEE Computer Society, 978-1-4799-0873-8. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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26 | Santhosh Onkaraiah, Ogun Turkyilmaz, Marina Reyboz, Fabien Clermidy, Elisa Vianello, Jean-Michel Portal, Christophe Muller |
A hybrid CBRAM/CMOS Look-Up-Table structure for improving performance efficiency of Field-Programmable-Gate-Array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013, pp. 2440-2443, 2013, IEEE, 978-1-4673-5760-9. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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26 | Loic Welter, Philippe Dreux, Jean-Michel Portal, Hassen Aziza |
Embedded high-precision frequency-based capacitor measurement system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), Chania, Crete, Greece, July 8-10, 2013, pp. 116-121, 2013, IEEE, 978-1-4799-0662-8. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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26 | Santhosh Onkaraiah, Marc Belleville, Marina Reyboz, Fabien Clermidy, Elisa Vianello, Jean-Michel Portal, Christophe Muller |
A CBRAM-based compact interconnect switch for non-volatile reconfigurable logic circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICICDT ![In: Proceedings of 2013 International Conference on IC Design & Technology, ICICDT 2013, Pavia, Italy, May 29-31, 2013, pp. 81-84, 2013, IEEE, 978-1-4673-4740-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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26 | Wenceslas Rahajandraibe, Fayrouz Haddad, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal |
Built-in tuning of the local oscillator for open loop modulation of low cost, low power RF transceiver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 14th Latin American Test Workshop, LATW 2013, Cordoba, Argentina, 3-5 April, 2013, pp. 1-4, 2013, IEEE Computer Society, 978-1-4799-0595-9. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
26 | Karine Castellani-Coulié, Marc Bocquet, Hassen Aziza, Jean-Michel Portal, Wenceslas Rahajandraibe, Christophe Muller |
SPICE level analysis of Single Event Effects in an OxRRAM cell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 14th Latin American Test Workshop, LATW 2013, Cordoba, Argentina, 3-5 April, 2013, pp. 1-5, 2013, IEEE Computer Society, 978-1-4799-0595-9. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
26 | Fayrouz Haddad, Wenceslas Rahajandraibe, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal |
On the investigation of built-in tuning of RF receivers using on-chip polyphase filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 31st IEEE VLSI Test Symposium, VTS 2013, Berkeley, CA, USA, April 29 - May 2, 2013, pp. 1-6, 2013, IEEE Computer Society, 978-1-4673-5542-1. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
26 | Karine Castellani-Coulié, Hassen Aziza, Gilles Micolau, Jean-Michel Portal |
Optimization of SEU Simulations for SRAM Cells Reliability under Radiation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 28(3), pp. 331-338, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | G. Pérez-Villalón, Alberto Portal |
Reconstruction of splines from local average samples. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Appl. Math. Lett. ![In: Appl. Math. Lett. 25(10), pp. 1315-1319, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Jean-Michel Portal, Marc Bocquet, Damien Deleruyelle, Christophe Muller |
Non-Volatile Flip-Flop Based on Unipolar ReRAM for Power-Down Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Low Power Electron. ![In: J. Low Power Electron. 8(1), pp. 1-10, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Guillaume Just, Vincenzo Della Marca, Arnaud Régnier, Jean-Luc Ogier, Jérémy Postel-Pellerin, Jean-Michel Portal, Pascal Masson |
Effects of Lightly Doped Drain and Channel Doping Variations on Flash Memory Performances and Reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Low Power Electron. ![In: J. Low Power Electron. 8(5), pp. 717-724, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour |
A new adustable Schmitt Trigger based on Dual Control Gate-Floating Gate Transistor (DCG-FGT). ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012, pp. 643-645, 2012, IEEE, 978-1-4673-2526-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Santhosh Onkaraiah, Marina Reyboz, Fabien Clermidy, Jean-Michel Portal, Marc Bocquet, Christophe Muller, Hraziia, Costin Anghel, Amara Amara |
Bipolar ReRAM Based non-volatile flip-flops for low-power architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NEWCAS ![In: 10th IEEE International NEWCAS Conference, Montreal, QC, Canada, June 17-20, 2012, pp. 417-420, 2012, IEEE, 978-1-4673-0857-1. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Weisheng Zhao, Yue Zhang 0010, Jacques-Olivier Klein, Damien Querlioz, Djaafar Chabi, Dafine Ravelosona, Claude Chappert, Jean-Michel Portal, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller |
Crossbar architecture based on 2R complementary resistive switching memory cell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NANOARCH ![In: Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2012, Amsterdam, The Netherlands, July 4-6, 2012, pp. 85-92, 2012, ACM, 978-1-4503-1671-2. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Ogun Turkyilmaz, Santhosh Onkaraiah, Marina Reyboz, Fabien Clermidy, Hraziia, Costin Anghel, Jean-Michel Portal, Marc Bocquet |
RRAM-based FPGA for "normally off, instantly on" applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NANOARCH ![In: Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2012, Amsterdam, The Netherlands, July 4-6, 2012, pp. 101-108, 2012, ACM, 978-1-4503-1671-2. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Fayrouz Haddad, Wenceslas Rahajandraibe, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal |
Built-in tuning of RFIC Passive Polyphase Filter by process and thermal monitoring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 13th Latin American Test Workshop, LATW 2012, Quito, Ecuador, April 10-13, 2012, pp. 1-5, 2012, IEEE Computer Society, 978-1-4673-2355-0. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Karine Castellani-Coulié, Hassen Aziza, Wenceslas Rahajandraibe, Gilles Micolau, Jean-Michel Portal |
Investigation of a CMOS oscillator concept for particle detection and diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 13th Latin American Test Workshop, LATW 2012, Quito, Ecuador, April 10-13, 2012, pp. 1-5, 2012, IEEE Computer Society, 978-1-4673-2355-0. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Gilles Micolau, Karine Castellani-Coulié, Hassen Aziza, Jean-Michel Portal |
SITARe: A simulation tool for analysis and diagnosis of radiation effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 13th Latin American Test Workshop, LATW 2012, Quito, Ecuador, April 10-13, 2012, pp. 1-5, 2012, IEEE Computer Society, 978-1-4673-2355-0. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour |
PSP based DCG-FGT transistor Model: Full characterization procedure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCIT ![In: International Symposium on Communications and Information Technologies, ISCIT 2012, Gold Coast, Australia, October 2-5, 2012, pp. 222-227, 2012, IEEE, 978-1-4673-1156-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Y. Joly, Laurent Lopez, Jean-Michel Portal, Hassen Aziza, Jean-Luc Ogier, Y. Bert, Franck Julien, Pascal Fornara |
Matching degradation of threshold voltage and gate voltage of NMOSFET after Hot Carrier Injection stress. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 51(9-11), pp. 1561-1563, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Fabrice Rigaud, Jean-Michel Portal, Hassen Aziza, Didier Née, Julien Vast, Fabrice Argoud, Bertrand Borot |
Back-end soft and hard defect monitoring using a single test chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 51(6), pp. 1136-1141, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Hassen Aziza, Marc Bocquet, Jean-Michel Portal, Christophe Muller |
Bipolar OxRRAM memory array reliability evaluation based on fault injection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IDT ![In: 6th IEEE International Design and Test Workshop, IDT 2011, Beirut, Lebanon, 11-14 December 2011, pp. 78-81, 2011, IEEE, 978-1-4673-0468-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Alexandre A. Junqueira, Mateus B. Rutzig, Fábio P. Itturriet, João Victor Portal, Luigi Carro |
A reconfigurable fabric supporting full C/C++ input. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReCoSoC ![In: Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2011, Montpellier, France, 20-22 June, 2011, pp. 1-6, 2011, IEEE, 978-1-4577-0640-0. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour |
PSP based DCG-FGT transistor model including characterization procedure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 18th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2011, Beirut, Lebanon, December 11-14, 2011, pp. 228-231, 2011, IEEE, 978-1-4577-1845-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Santhosh Onkaraiah, Pierre-Emmanuel Gaillardon, Marina Reyboz, Fabien Clermidy, Jean-Michel Portal, Marc Bocquet, Christophe Muller |
Using OxRRAM memories for improving communications of reconfigurable FPGA architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NANOARCH ![In: Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2011, San Diego, CA, USA, June 8-9, 2011, pp. 65-69, 2011, IEEE Computer Society, 978-1-4577-0993-7. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Christophe Muller, Damien Deleruyelle, Olivier Ginez, Jean-Michel Portal, Marc Bocquet |
Design challenges for prototypical and emerging memory concepts relying on resistance switching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: 2011 IEEE Custom Integrated Circuits Conference, CICC 2011, San Jose, CA, USA, Sept. 19-21, 2011, pp. 1-7, 2011, IEEE, 978-1-4577-0222-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Y. Joly, L. Truphemus, Laurent Lopez, Jean-Michel Portal, Hassen Aziza, Franck Julien, Pascal Fornara |
Temperature and hump effect impact on output voltage spread of low power bandgap designed in the sub-threshold area. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil, pp. 2549-2552, 2011, IEEE, 978-1-4244-9473-6. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Karine Castellani-Coulié, Jean-Michel Portal, Gilles Micolau, Hassen Aziza |
Analysis of SEU parameters for the study of SRAM cells reliability under radiation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 12th Latin American Test Workshop, LATW 2011, Beach of Porto de Galinhas, Brazil, March 27-30, 2011, pp. 1-5, 2011, IEEE, 978-1-4577-1488-7. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Gilles Micolau, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal |
Impact of SEU configurations on a SRAM cell response at circuit level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 12th Latin American Test Workshop, LATW 2011, Beach of Porto de Galinhas, Brazil, March 27-30, 2011, pp. 1-5, 2011, IEEE, 978-1-4577-1488-7. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | X. Ruiz del Portal |
On the qualitative properties of the optimal income tax. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Math. Soc. Sci. ![In: Math. Soc. Sci. 59(3), pp. 288-298, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
26 | X. Ruiz del Portal |
A general principal-agent setting with non-differentiable mechanisms: Some examples. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Math. Soc. Sci. ![In: Math. Soc. Sci. 57(2), pp. 262-278, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Olivier Ginez, Jean-Michel Portal, Hassen Aziza |
An on-line testing scheme for repairing purposes in Flash memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009, April 15-17, 2009, Liberec, Czech Republic, pp. 120-123, 2009, IEEE Computer Society, 978-1-4244-3341-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Andrea Krob, Alberto Santos Jr., João Victor Portal, Jonas Hartmann, José Valdeni de Lima, Valter Roesler |
ALMTF++: a new congestion control for large scale multicast transmission. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WebMedia ![In: XV Brazilian Symposium on Multimedia and the Web, WebMedia '09, Fortaleza, Ceará, Brazil, October 5-7, 2009, pp. 1, 2009, ACM, 978-1-60558-880-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Olivier Ginez, Jean-Michel Portal, Christophe Muller |
Design and Test Challenges in Resistive Switching RAM (ReRAM): An Electrical Model for Defect Injections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 14th IEEE European Test Symposium, ETS 2009, Sevilla, Spain, May 25-29, 2009, pp. 61-66, 2009, IEEE Computer Society, 978-0-7695-3703-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
ReRAM, Defect Injection, Electrical Simulation, Memory Testing |
26 | Laurent Remy, Philippe Coll, Fabrice Picot, Philippe Mico, Jean-Michel Portal |
Definition of an innovative filling structure for digital blocks : the DFM filler cell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 16th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2009, Yasmine Hammamet, Tunisia, 13-19 December, 2009, pp. 73-76, 2009, IEEE, 978-1-4244-5090-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Hassen Aziza, Emmanuel Bergeret, Jean-Michel Portal, Olivier Ginez |
A Novel Low Power Oriented Design Methodology for Analog Blocks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Low Power Electron. ![In: J. Low Power Electron. 4(1), pp. 60-67, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Laurent Remy, Philippe Coll, Fabrice Picot, Philippe Mico, Jean-Michel Portal |
Metal filling impact on standard cells: definition of the metal fill corner concept. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008, pp. 16-21, 2008, ACM, 978-1-60558-231-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
metal filling, modelization, interconnect, design of experiment, dispersion, standard cells, capacitance, corners, ring oscillators |
26 | Manuel Sellier, Jean-Michel Portal, Bertrand Borot, Steve Colquhoun, Richard Ferrant, Frédéric Boeuf, Alexis Farcy |
Predictive Delay Evaluation on Emerging CMOS Technologies: A Simulation Framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 492-497, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Predictive SPICE Modeling, Interconnect Resistance, Buffer Insertion, Interconnect Delay |
26 | Olivier Ginez, Jean-Michel Portal, Hassen Aziza |
A High-Speed Structural Method for Testing Address Decoder Faults in Flash Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2008 IEEE International Test Conference, ITC 2008, Santa Clara, California, USA, October 26-31, 2008, pp. 1-10, 2008, IEEE Computer Society, 978-1-4244-2403-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Laurent Lopez, Jean-Michel Portal, Didier Née |
A New Embedded Measurement Structure for eDRAM Capacitor ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/0710.4736, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
26 | B. Saillet, Arnaud Régnier, Jean-Michel Portal, B. Delsuc, Romain Laffont, Pascal Masson, Rachid Bouchakour |
MM11 based flash memory cell model including characterization procedure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
26 | Jean-Michel Portal, Hassen Aziza, Didier Née |
EEPROM Diagnosis Based on Threshold Voltage Embedded Measurement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 21(1), pp. 33-42, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
EEPROM, diagnosis, memory testing, non-volatile memory |
26 | Laurent Lopez, Jean-Michel Portal, Didier Née |
A New Embedded Measurement Structure for eDRAM Capacitor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 462-463, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | B. Saillet, Jean-Michel Portal, Didier Née |
Flash Memory Cell: Parametric Test Data Reconstruction for Process Monitoring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 3-5 October 2005, Monterey, CA, USA, pp. 131-139, 2005, IEEE Computer Society, 0-7695-2464-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Sandrine Bernardini, Jean-Michel Portal, Pascal Masson |
A Tunneling Model for Gate Oxide Failure in Deep Sub-Micron Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 1404-1405, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
26 | Anna Labbé, Annie Pérez, Jean-Michel Portal |
Efficient hardware implementation of a CRYPTO-MEMORY based on AES algorithm and SRAM architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 637-640, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
26 | C. S. Sergio, Guennadii Michailovich Gusev, A. A. Quivy, T. E. Lamas, J. R. Leite, O. Estibals, J. C. Portal |
Evolution of the two-dimensional towards three-dimensional Landau states in wide parabolic quantum well. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 34(5-8), pp. 763-766, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
26 | L. Forli, Jean-Michel Portal, Didier Née, Bertrand Borot |
Infrastructure IP for Back-End Yield Improvement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 1129-1134, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
26 | Jean-Michel Portal, Hassen Aziza, Didier Née |
EEPROM Memory: Threshold Voltage Built In Self Diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 23-28, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
26 | Jean-Michel Portal, L. Forli, Hassen Aziza, Didier Née |
An Automated Design Methodology for EEPROM Cell (ADE). ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTDT ![In: 10th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2002), 10-12 July 2002, Isle of Bendor, France, pp. 137-142, 2002, IEEE Computer Society, 0-7695-1617-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
26 | Jean-Michel Portal, L. Forli, Didier Née |
Floating-gate EEPROM cell model based on MOS model 9. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 799-802, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
26 | Jean-Michel Portal, L. Forli, Didier Née |
Floating-gate EEPROM cell: threshold voltage sensibility to geometry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 557-560, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
26 | Jean-Michel Portal, L. Forli, Hassen Aziza, Didier Née |
An Automated Methodology to Diagnose Geometric Defect in the EEPROM Cell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 31-36, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
26 | Michel Renovell, Jean-Michel Portal, Penelope Faure, Joan Figueras, Yervant Zorian |
A Discussion on Test Pattern Generation for FPGA - Implemented Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 17(3-4), pp. 283-290, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
FPGA, test, ATPG |
26 | Jean-Michel Portal, Annie Pérez |
Analyzing bridging faults impact on EEPROM cell array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETW ![In: 6th European Test Workshop, ETW 2001, Stockholm, Sweden, May 29 - June 1, 2001, pp. 3-8, 2001, IEEE Computer Society, 0-7695-1017-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
26 | Michel Renovell, Penelope Faure, Jean-Michel Portal, Joan Figueras, Yervant Zorian |
IS-FPGA : a new symmetric FPGA architecture with implicit scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October - 1 November 2001, pp. 924-931, 2001, IEEE Computer Society, 0-7803-7169-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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