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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 700 occurrences of 376 keywords
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Results
Found 2246 publication records. Showing 2246 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
13 | Eugene Tam, Shenfei Jiang, Paul Duan, Shawn Meng, Yue Pang, Cayden Huang, Yi Han, Jacke Xie, Yuanjun Cui, Jinsong Yu, Minggui Lu |
DRAM-Based Processor for Deep Neural Networks Without SRAM Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAI (2) ![In: Intelligent Computing - Proceedings of the 2021 Computing Conference, Volume 2, SAI 2021, Virtual Event, 15-16 July, 2021., pp. 743-753, 2021, Springer, 978-3-030-80125-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Youngbog Yoon, Daeyong Han, Shinho Chu, Sangho Lee, Jaeduk Han, Junhyun Chun |
Process-Portable and Programmable Layout Generation of Digital Circuits in Advanced DRAM Technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021, pp. 721-722, 2021, IEEE, 978-3-9819263-5-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Hasan Hassan, Yahya Can Tugrul, Jeremie S. Kim, Victor van der Veen, Kaveh Razavi, Onur Mutlu |
Uncovering In-DRAM RowHammer Protection Mechanisms: A New Methodology, Custom RowHammer Patterns, and Implications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, Virtual Event, Greece, October 18-22, 2021, pp. 1198-1213, 2021, ACM, 978-1-4503-8557-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Lois Orosa 0001, Abdullah Giray Yaglikçi, Haocong Luo, Ataberk Olgun, Jisung Park 0001, Hasan Hassan, Minesh Patel, Jeremie S. Kim, Onur Mutlu |
A Deeper Look into RowHammer's Sensitivities: Experimental Analysis of Real DRAM Chipsand Implications on Future Attacks and Defenses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, Virtual Event, Greece, October 18-22, 2021, pp. 1182-1197, 2021, ACM, 978-1-4503-8557-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Michael B. Sullivan 0001, Nirmal R. Saxena, Mike O'Connor, Donghyuk Lee, Paul Racunas, Saurabh Hukerikar, Timothy Tsai 0002, Siva Kumar Sastry Hari, Stephen W. Keckler |
Characterizing and Mitigating Soft Errors in GPU DRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, Virtual Event, Greece, October 18-22, 2021, pp. 641-653, 2021, ACM, 978-1-4503-8557-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Lee Baker, Robert Patti, Paul D. Franzon |
Multi-ANN embedded system based on a custom 3D-DRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
3DIC ![In: IEEE International 3D Systems Integration Conference, 3DIC 2021, Raleigh, NC, USA, October 26-29, 2021, pp. 1-7, 2021, IEEE, 978-1-6654-1706-8. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Abdullah Giray Yaglikçi, Minesh Patel, Jeremie S. Kim, Roknoddin Azizi, Ataberk Olgun, Lois Orosa 0001, Hasan Hassan, Jisung Park 0001, Konstantinos Kanellopoulos, Taha Shahroodi, Saugata Ghose, Onur Mutlu |
BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2021, Seoul, South Korea, February 27 - March 3, 2021, pp. 345-358, 2021, IEEE, 978-1-6654-2235-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Jian Chen, Xiaowei Jiang, Ying Zhang, Liyin Liu, Huifeng Xu, Qiang Liu |
CARE: Coordinated Augmentation for Elastic Resilience on DRAM Errors in Data Centers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2021, Seoul, South Korea, February 27 - March 3, 2021, pp. 533-544, 2021, IEEE, 978-1-6654-2235-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Heesu Kim, Hanmin Park, Taehyun Kim, Kwanheum Cho, Eojin Lee, Soojung Ryu, Hyuk-Jae Lee, Kiyoung Choi, Jinho Lee |
GradPIM: A Practical Processing-in-DRAM Architecture for Gradient Descent. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2021, Seoul, South Korea, February 27 - March 3, 2021, pp. 249-262, 2021, IEEE, 978-1-6654-2235-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Yuanhui Zhou, Taotao Sheng, Jiguang Wan |
HBTree: an Efficient Index Structure Based on Hybrid DRAM-NVM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NVMSA ![In: 10th IEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2021, Beijing, China, August 18-20, 2021, pp. 1-6, 2021, IEEE, 978-1-6654-2375-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Mohammad Farmani, Mark M. Tehranipoor, Fahim Rahman |
RHAT: Efficient RowHammer-Aware Test for Modern DRAM Modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 26th IEEE European Test Symposium, ETS 2021, Bruges, Belgium, May 24-28, 2021, pp. 1-6, 2021, IEEE, 978-1-6654-1849-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | João Fabrício Filho, Isaías B. Felzmann, Lucas Francisco Wanner |
Transparent Resilience for Approximate DRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARCS ![In: Architecture of Computing Systems - 34th International Conference, ARCS 2021, Virtual Event, June 7-8, 2021, Proceedings, pp. 35-50, 2021, Springer, 978-3-030-81681-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Chirag Sudarshan, Taha Soliman, Cecilia De la Parra, Christian Weis, Leonardo Ecco, Matthias Jung 0001, Norbert Wehn, Andre Guntoro |
A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, Tokyo, Japan, January 18-21, 2021, pp. 35-42, 2021, ACM, 978-1-4503-7999-1. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Mark Hildebrand, Julian T. Angeles, Jason Lowe-Power, Venkatesh Akella |
A Case Against Hardware Managed DRAM Caches for NVRAM Based Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2021, Stony Brook, NY, USA, March 28-30, 2021, pp. 194-204, 2021, IEEE, 978-1-7281-8643-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Heba Salem, Nigel P. Topham |
Detecting denial-of-service hardware Trojans in DRAM-based memory systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 28th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2021, Dubai, United Arab Emirates, November 28 - Dec. 1, 2021, pp. 1-6, 2021, IEEE, 978-1-7281-8281-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Robert Lasch, Robert Schulze, Thomas Legler, Kai-Uwe Sattler |
Workload-Driven Placement of Column-Store Data Structures on DRAM and NVM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DaMoN ![In: Proceedings of the 17th International Workshop on Data Management on New Hardware, DaMoN 2021, 21 June 2021, Virtual Event, China., pp. 5:1-5:8, 2021, ACM, 978-1-4503-8556-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Faxian Shan, Yang Xiong, Chang-Ching Chen, Haibo Chen, James Cho, Xiong Li, Wenyong Jiang, Jengwei Huang |
Anomalous NMOSFET hot carrier degradation on DRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTA ![In: 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2021, Zhuhai, China, November 24-26, 2021, pp. 56-57, 2021, IEEE, 978-1-6654-1745-7. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Hojun Yoon, Wonjoo Jung, Jaewoo Park, Jindo Byun, Hyungmin Jin, Hyunyoon Cho, Youngmin Kim, Baek-Jin Lim, Young-Chul Cho, Youngdon Choi, Jung-Hwan Choi, Hyungjong Ko, Changsik Yoo, Sang-Hyun Lee |
A 3.2-12.8Gb/s Duty-Cycle Compensating Quadrature Error Corrector for DRAM Interfaces, With Fast Locking and Low Power Characteristics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 47th ESSCIRC 2021 - European Solid State Circuits Conference, ESSCIR 2021, Grenoble, France, September 13-22, 2021, pp. 463-466, 2021, IEEE, 978-1-6654-3751-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Reza Mirosanlou, Mohamed Hassan 0002, Rodolfo Pellizzoni |
DuoMC: Tight DRAM Latency Bounds with Shared Banks and Near-COTS Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMSYS ![In: MEMSYS 2021: The International Symposium on Memory Systems, Washington, USA, September 27 - 30, 2021, pp. 4:1-4:16, 2021, ACM, 978-1-4503-8570-1. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Thomas Vogelsang, Brent Haukness, Eric Linstadt, Torsten Partsch, James Tringali |
DRAM Refresh with Master Wordline Granularity Control of Refresh Intervals: Position Paper. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMSYS ![In: MEMSYS 2021: The International Symposium on Memory Systems, Washington, USA, September 27 - 30, 2021, pp. 3:1-3:6, 2021, ACM, 978-1-4503-8570-1. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Adar Zeitak, Adam Morrison 0001 |
Cuckoo Trie: Exploiting Memory-Level Parallelism for Efficient DRAM Indexing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SOSP ![In: SOSP '21: ACM SIGOPS 28th Symposium on Operating Systems Principles, Virtual Event / Koblenz, Germany, October 26-29, 2021, pp. 147-162, 2021, ACM, 978-1-4503-8709-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Madhava Krishnan Ramanathan, Wook-Hee Kim, Xinwei Fu, Sumit Kumar Monga, Hee Won Lee, Minsung Jang, Ajit Mathew, Changwoo Min |
TIPS: Making Volatile Index Structures Persistent with DRAM-NVMM Tiering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
USENIX Annual Technical Conference ![In: 2021 USENIX Annual Technical Conference, USENIX ATC 2021, July 14-16, 2021., pp. 773-787, 2021, USENIX Association. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
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13 | Yong-Hun Kim, Hyung-Jin Kim, Jaemin Choi, Min-Su Ahn, Dongkeon Lee, Seung-Hyun Cho, Dong-Yeon Park, Young-Jae Park, Min-Soo Jang, Yong-Jun Kim, Jinyong Choi, Sung-Woo Yoon, Jae-Woo Jung, Jae-Koo Park, Jae-Woo Lee, Dae-Hyun Kwon, Hyung-Seok Cha, Si-Hyeong Cho, Seong-Hoon Kim, Jihwa You, Kyoung-Ho Kim, Dae-Hyun Kim 0003, Byung-Cheol Kim, Young-Kwan Kim, Jun-Ho Kim, Seouk-Kyu Choi, Chanyoung Kim, Byongwook Na, Hye-In Choi, Reum Oh, Jeong-Don Ihm, Seung-Jun Bae, Nam Sung Kim, Jung-Bae Lee |
25.2 A 16Gb Sub-1V 7.14Gb/s/pin LPDDR5 SDRAM Applying a Mosaic Architecture with a Short-Feedback 1-Tap DFE, an FSS Bus with Low-Level Swing and an Adaptively Controlled Body Biasing in a 3rd-Generation 10nm DRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2021, San Francisco, CA, USA, February 13-22, 2021, pp. 346-348, 2021, IEEE, 978-1-7281-9549-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Young-Cheon Kwon, Suk Han Lee, Jaehoon Lee 0005, Sang-Hyuk Kwon, Je-Min Ryu, Jong-Pil Son, Seongil O, Hak-soo Yu, Haesuk Lee, Soo Young Kim, Youngmin Cho, Jin Guk Kim, Jongyoon Choi, Hyunsung Shin, Jin Kim, BengSeng Phuah, Hyoungmin Kim, Myeong Jun Song, Ahn Choi, Daeho Kim, Sooyoung Kim, Eun-Bong Kim, David Wang 0003, Shinhaeng Kang, Yuhwan Ro, Seungwoo Seo, Joon-Ho Song, Jaeyoun Youn, Kyomin Sohn, Nam Sung Kim |
25.4 A 20nm 6GB Function-In-Memory DRAM, Based on HBM2 with a 1.2TFLOPS Programmable Computing Unit Using Bank-Level Parallelism, for Machine Learning Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2021, San Francisco, CA, USA, February 13-22, 2021, pp. 350-352, 2021, IEEE, 978-1-7281-9549-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Timothy M. Hollis, Ronny Schneider, Martin Brox, Thomas Hein, Wolfgang Spirkl, Martin Bach, Mani Balakrishnan, Stefan Dietrich, Fabien Funfrock, Milena Ivanov, Natalija Jovanovic, Maksim Kuzmenka, Daniel Lauber, Juan Ocon Garrido, David Ovard, Karl Pfefferl, Sven Piatkowski, Gabriele Piscopo, Manfred Plan, Jens Polney, Jan Pottgiesser, Stephan Rau, Filippo Vitale, Marc Walter, Marcos Alvarez Gonzalez, Martin Broschwitz, Cristian Chetreanu, Andrea Sorrentino, Jörg Weller, Peter Mayer 0003, Michael Richter 0003, Casto Salobrena Garcia, Andreas Schneider, Shih Nern Wong |
25.3 An 8Gb GDDR6X DRAM Achieving 22Gb/s/pin with Single-Ended PAM4 Signaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2021, San Francisco, CA, USA, February 13-22, 2021, pp. 348-350, 2021, IEEE, 978-1-7281-9549-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Dong-Uk Lee, Bor-Doou Rong, Kyu-Hyoun Kim |
Session 25 Overview: DRAM Memory Subcommittee. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2021, San Francisco, CA, USA, February 13-22, 2021, pp. 342-343, 2021, IEEE, 978-1-7281-9549-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Siddhartha Balakrishna Rai, Anand Sivasubramaniam, Adithya Kumar, Prasanna Venkatesh Rengasamy, Vijaykrishnan Narayanan, Ameen Akel, Sean Eilert |
Design space for scaling-in general purpose computing within the DDR DRAM hierarchy for map-reduce workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CF ![In: CF '21: Computing Frontiers Conference, Virtual Event, Italy, May 11-13, 2021, pp. 113-123, 2021, ACM, 978-1-4503-8404-9. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Nicky Lu, Chun Shiah, Juang-Ying Chueh, Bor-Doou Rong, Wei-Jr Huang, Ho-Yin Chen, Cheng-Nan Chang, Chia-Wei Chang, Tzung-Shen Chen |
Enhanced Core Circuits for scaling DRAM: 0.7V VCC with Long Retention 138ms at 125°C and Random Row/Column Access Times Accelerated by 1.5ns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, pp. 1-2, 2021, IEEE, 978-4-86348-780-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Sangjin Kim, Juhyoung Lee, Dongseok Im, Hoi-Jun Yoo |
PNNPU: A 11.9 TOPS/W High-speed 3D Point Cloud-based Neural Network Processor with Block-based Point Processing for Regular DRAM Access. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, pp. 1-2, 2021, IEEE, 978-4-86348-780-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Zhengtao Li, Zhipeng Tan, Jianxi Chen |
HASDH: A Hotspot-Aware and Scalable Dynamic Hashing for Hybrid DRAM-NVM Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 39th IEEE International Conference on Computer Design, ICCD 2021, Storrs, CT, USA, October 24-27, 2021, pp. 154-161, 2021, IEEE, 978-1-6654-3219-1. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Gian Singh, Ankit Wagle, Sarma B. K. Vrudhula, Sunil P. Khatri |
CIDAN: Computing in DRAM with Artificial Neurons. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 39th IEEE International Conference on Computer Design, ICCD 2021, Storrs, CT, USA, October 24-27, 2021, pp. 349-356, 2021, IEEE, 978-1-6654-3219-1. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Khaled Humood, Baker Mohammad, Heba Abunahla |
DTRNG: Low Cost and Robust True Random Number Generator Using DRAM Weak Write Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021, pp. 1-5, 2021, IEEE, 978-1-7281-9201-7. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Dong-Wan Ko, Won-Young Lee |
A Low EMI Transmitter for DRAM Interface with Quadrature Clock Corrector. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021, pp. 1-5, 2021, IEEE, 978-1-7281-9201-7. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Yinchuan Gu, Chris Eom, Jake Jung, Brian Lee 0003, Edwin Kim, Kanyu Cao |
A 2-stage with 3-stack 1-tap DFE Sense Amplifier based on Dual Reference for High Speed & Low Power DRAM Interface. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021, pp. 1-4, 2021, IEEE, 978-1-6654-3867-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Xiong Li, Huangxia Zhu, Xiaolin Guo, Kejun Mu, Peng Feng, Qi-An Xu, Blacksmith Wu, Kanyu Cao |
Impact of Hydrogen Anneal on Peripheral PMOS NBTI and Array Transistor GIDL in DRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021, pp. 1-4, 2021, IEEE, 978-1-6654-3867-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Yanzhe Tang, Zhongming Liu, Weibing Shang, Fengqin Zhang, Bernard Wu, Zhong Kong, Hongwen Li, Hong Ma, Kanyu Cao |
Pitch Device Design in 10nm-Class DRAM Process through DTCO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021, pp. 1-4, 2021, IEEE, 978-1-6654-3867-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Tanmay Goel, Divyansh Maura, Kaustav Goswami 0002, Shirshendu Das, Dip Sankar Banerjee |
Towards Row Sensitive DRAM Refresh through Retention Awareness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 22nd International Symposium on Quality Electronic Design, ISQED 2021, Santa Clara, CA, USA, April 7-9, 2021, pp. 450-456, 2021, IEEE, 978-1-7281-7641-3. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Hanbyeol Kwon, Kwangrae Kim, Dongsuk Jeon, Ki-Seok Chung |
Reducing Refresh Overhead with In-DRAM Error Correction Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISOCC ![In: 18th International SoC Design Conference, ISOCC 2021, Jeju Island, South Korea, Republic of, October 6-9, 2021, pp. 211-214, 2021, IEEE, 978-1-6654-0174-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Yihuan Qian, Songwen Pei, Jihong Yuan, Dianle Zhou, Tong Liu, Linghe Kong |
DRAM: Dragonfly Routing Algorithm on Multi-objects by Optimal Thresholds. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA/BDCloud/SocialCom/SustainCom ![In: 2021 IEEE Intl Conf on Parallel & Distributed Processing with Applications, Big Data & Cloud Computing, Sustainable Computing & Communications, Social Computing & Networking (ISPA/BDCloud/SocialCom/SustainCom), New York City, NY, USA, September 30 - Oct. 3, 2021, pp. 135-142, 2021, IEEE, 978-1-6654-3574-1. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Xingyi Wang, Yu Li 0007, Yiquan Chen, Shiwen Wang, Yin Du, Cheng He, Yuzhong Zhang, Pinan Chen, Xin Li, Wenjun Song, Qiang Xu 0001, Li Jiang 0002 |
On Workload-Aware DRAM Failure Prediction in Large-Scale Data Centers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 39th IEEE VLSI Test Symposium, VTS 2021, San Diego, CA, USA, April 25-28, 2021, pp. 1-6, 2021, IEEE, 978-1-6654-1949-9. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Junhao Zhu, Kaixin Huang, Xiaomin Zou, Chenglong Huang, Nuo Xu, Liang Fang |
HDNH: a read-efficient and write-optimized hashing scheme for hybrid DRAM-NVM memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: ICPP 2021: 50th International Conference on Parallel Processing, Lemont, IL, USA, August 9 - 12, 2021, pp. 47:1-47:10, 2021, ACM, 978-1-4503-9068-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Xiping Jiang, Fengguo Zuo, Song Wang, Xiaofeng Zhou, Bing Yu, Yubing Wang, Qi Liu, Ming Liu, Yi Kang, Qiwei Ren |
A 1596GB/s 48Gb Embedded DRAM 384-Core SoC with Hybrid Bonding Integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
A-SSCC ![In: IEEE Asian Solid-State Circuits Conference, A-SSCC 2021, Busan, Korea, Republic of, November 7-10, 2021, pp. 1-3, 2021, IEEE, 978-1-6654-4350-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Gyu-hyeon Lee, Seongmin Na, Ilkwon Byun, Dongmoon Min, Jangwoo Kim |
CryoGuard: A Near Refresh-Free Robust DRAM Design for Cryogenic Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 48th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2021, Virtual Event / Valencia, Spain, June 14-18, 2021, pp. 637-650, 2021, IEEE, 978-1-6654-3333-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Lingxi Wu, Rasool Sharifi, Marzieh Lenjani, Kevin Skadron, Ashish Venkat |
Sieve: Scalable In-situ DRAM-based Accelerator Designs for Massively Parallel k-mer Matching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 48th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2021, Virtual Event / Valencia, Spain, June 14-18, 2021, pp. 251-264, 2021, IEEE, 978-1-6654-3333-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Adarsh Patil 0002, Vijay Nagarajan, Rajeev Balasubramonian, Nicolai Oswald |
Dvé: Improving DRAM Reliability and Performance On-Demand via Coherent Replication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 48th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2021, Virtual Event / Valencia, Spain, June 14-18, 2021, pp. 526-539, 2021, IEEE, 978-1-6654-3333-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Ataberk Olgun, Minesh Patel, Abdullah Giray Yaglikçi, Haocong Luo, Jeremie S. Kim, Nisa Bostanci, Nandita Vijaykumar, Oguz Ergin, Onur Mutlu |
QUAC-TRNG: High-Throughput True Random Number Generation Using Quadruple Row Activation in Commodity DRAM Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 48th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2021, Virtual Event / Valencia, Spain, June 14-18, 2021, pp. 944-957, 2021, IEEE, 978-1-6654-3333-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Lois Orosa 0001, Yaohua Wang, Mohammad Sadrosadati, Jeremie S. Kim, Minesh Patel, Ivan Puddu, Haocong Luo, Kaveh Razavi, Juan Gómez-Luna, Hasan Hassan, Nika Mansouri-Ghiasi, Saugata Ghose, Onur Mutlu |
CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 48th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2021, Virtual Event / Valencia, Spain, June 14-18, 2021, pp. 484-497, 2021, IEEE, 978-1-6654-3333-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Suk Han Lee, Shinhaeng Kang, Jaehoon Lee 0005, Hyeonsu Kim, Eojin Lee, Seungwoo Seo, Hosang Yoon, Seungwon Lee, Kyounghwan Lim, Hyunsung Shin, Jinhyun Kim, Seongil O, Anand Iyer, David Wang 0003, Kyomin Sohn, Nam Sung Kim |
Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology : Industrial Product. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 48th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2021, Virtual Event / Valencia, Spain, June 14-18, 2021, pp. 43-56, 2021, IEEE, 978-1-6654-3333-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Kurt B. Ferreira, Scott Levy, Victor Kuhns, Nathan DeBardeleben, Sean Blanchard |
Understanding the Effects of DRAM Correctable Error Logging at Scale. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: IEEE International Conference on Cluster Computing, CLUSTER 2021, Portland, OR, USA, September 7-10, 2021, pp. 421-432, 2021, IEEE, 978-1-7281-9666-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Nastaran Hajinazar, Geraldo F. Oliveira, Sven Gregorio, João Dinis Ferreira, Nika Mansouri-Ghiasi, Minesh Patel, Mohammed Alser, Saugata Ghose, Juan Gómez-Luna, Onur Mutlu |
SIMDRAM: a framework for bit-serial SIMD processing using DRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Virtual Event, USA, April 19-23, 2021, pp. 329-345, 2021, ACM, 978-1-4503-8317-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Mihir Mody, Rajasekhar Allu, Gang Hua 0003, Brijesh Jadav, Niraj Nandan, Ankur, Mayank Mangla |
DRAM Bandwidth Optimal Perspective Transform Engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Autonomous Vehicles and Machines ![In: Autonomous Vehicles and Machines 2021, online, January 11-28, 2021, pp. 1-6, 2021, Society for Imaging Science and Technology. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Rachmad Vidya Wicaksana Putra, Muhammad Abdullah Hanif, Muhammad Shafique 0001 |
SparkXD: A Framework for Resilient and Energy-Efficient Spiking Neural Network Inference using Approximate DRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 58th ACM/IEEE Design Automation Conference, DAC 2021, San Francisco, CA, USA, December 5-9, 2021, pp. 379-384, 2021, IEEE, 978-1-6654-3274-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Litong You, Tianxiao Gu, Shengan Zheng, Jianmei Guo, Sanhong Li, Yuting Chen, Linpeng Huang |
JPDHeap: A JVM Heap Design for PM-DRAM Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 58th ACM/IEEE Design Automation Conference, DAC 2021, San Francisco, CA, USA, December 5-9, 2021, pp. 31-36, 2021, IEEE, 978-1-6654-3274-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Yichen Jiang, Huifeng Zhu, Dean Sullivan, Xiaolong Guo, Xuan Zhang 0001, Yier Jin |
Quantifying Rowhammer Vulnerability for DRAM Security. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 58th ACM/IEEE Design Automation Conference, DAC 2021, San Francisco, CA, USA, December 5-9, 2021, pp. 73-78, 2021, IEEE, 978-1-6654-3274-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Fan Zhang 0069, Shaahin Angizi, Deliang Fan |
Max-PIM: Fast and Efficient Max/Min Searching in DRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 58th ACM/IEEE Design Automation Conference, DAC 2021, San Francisco, CA, USA, December 5-9, 2021, pp. 211-216, 2021, IEEE, 978-1-6654-3274-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Hyojin Choi, In Huh, Seungju Kim, Jeonghoon Ko, Changwook Jeong, Hyeonsik Son, Kiwon Kwon, Joonwan Chai, Younsik Park, Jaehoon Jeong, Daesin Kim, Jung Yun Choi |
Application of Deep Reinforcement Learning to Dynamic Verification of DRAM Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 58th ACM/IEEE Design Automation Conference, DAC 2021, San Francisco, CA, USA, December 5-9, 2021, pp. 523-528, 2021, IEEE, 978-1-6654-3274-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Xinhan Lin, Liang Sun, Fengbin Tu, Leibo Liu, Xiangyu Li, Shaojun Wei, Shouyi Yin |
ADROIT: An Adaptive Dynamic Refresh Optimization Framework for DRAM Energy Saving In DNN Training. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 58th ACM/IEEE Design Automation Conference, DAC 2021, San Francisco, CA, USA, December 5-9, 2021, pp. 751-756, 2021, IEEE, 978-1-6654-3274-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Dongjae Shin, Hyunil Byun, Dongshik Shim, Jungho Cha, Yonghwack Shin, Changgyun Shin, Chang-Bum Lee, Eunkyung Lee, Jisan Lee, Inoh Hwang, Kyunghyun Son, Hyuck Choo, Kyoungho Ha |
III/V-on-bulk-Si Platform: Born for DRAM, Transplanted to LiDAR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECOC ![In: European Conference on Optical Communication, ECOC 2021, Bordeaux, France, September 13-16, 2021, pp. 1-3, 2021, IEEE, 978-1-6654-3868-1. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Yu Zheng, Zhao Huang, Liang Li, Changjian Xie, Quan Wang 0006, Zili Wu |
Implementation and Analysis of Hybrid DRAM PUFs on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NaNA ![In: 2021 International Conference on Networking and Network Applications, NaNA 2021, Lijiang City, China, October 29 - Nov. 1, 2021, pp. 390-394, 2021, IEEE, 978-1-6654-4158-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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13 | Seyed Armin Vakil-Ghahani, Mahmut Taylan Kandemir, Jagadish B. Kotra |
DSM: A Case for Hardware-Assisted Merging of DRAM Rows with Same Content. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Proc. ACM Meas. Anal. Comput. Syst. ![In: Proc. ACM Meas. Anal. Comput. Syst. 4(2), pp. 33:1-33:26, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Shang Li 0001, Zhiyuan Yang 0001, Dhiraj Reddy, Ankur Srivastava 0001, Bruce L. Jacob |
DRAMsim3: A Cycle-Accurate, Thermal-Capable DRAM Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 19(2), pp. 110-113, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Reza Mirosanlou, Danlu Guo, Mohamed Hassan 0002, Rodolfo Pellizzoni |
MCsim: An Extensible DRAM Memory Controller Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 19(2), pp. 105-109, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Zhiyuan Shao, Chenhao Liu, Ruoshi Li, Xiaofei Liao, Hai Jin 0001 |
Processing Grid-format Real-world Graphs on DRAM-based FPGA Accelerators with Application-specific Caching Mechanisms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 13(3), pp. 11:1-11:33, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Tomohiro Korikawa, Akio Kawabata, Fujun He, Eiji Oki |
Packet Processing Architecture Using Last-Level-Cache Slices and Interleaved 3D-Stacked DRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 8, pp. 59290-59304, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Ingab Kang, Eojin Lee, Jung Ho Ahn |
CAT-TWO: Counter-Based Adaptive Tree, Time Window Optimized for DRAM Row-Hammer Prevention. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 8, pp. 17366-17377, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Minwoo Jang, Seungkyu Lee, Jaeha Kung, Daehoon Kim |
Defending Against Flush+Reload Attack With DRAM Cache by Bypassing Shared SRAM Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 8, pp. 179837-179844, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Ling Zhan, Kai Lu, Zhilong Cheng, Jiguang Wan |
RangeKV: An Efficient Key-Value Store Based on Hybrid DRAM-NVM-SSD Storage Structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 8, pp. 154518-154529, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Anthony Agnesina, James Yamaguchi, Christian Krutzik, John Carson, Jean Yang-Scharlotta, Sung Kyu Lim |
A COTS-Based Novel 3-D DRAM Memory Cube Architecture for Space Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 28(9), pp. 2055-2068, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Mohamed Hassan 0002 |
Reduced latency DRAM for multi-core safety-critical real-time systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Syst. ![In: Real Time Syst. 56(2), pp. 171-206, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Supriya Karmakar |
Three-state dynamic random-access memory (DRAM). ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Circuits Devices Syst. ![In: IET Circuits Devices Syst. 14(2), pp. 176-181, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Byeongho Kim, Jongwook Chung, Eojin Lee, Wonkyung Jung, Sunjung Lee, Jaewan Choi, Jaehyun Park 0006, Minbok Wi, Sukhan Lee 0002, Jung Ho Ahn |
MViD: Sparse Matrix-Vector Multiplication in Mobile DRAM for Accelerating Recurrent Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 69(7), pp. 955-967, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Haerang Choi, Do-sun Hong, Jaesung Lee, Sungjoo Yoo |
Reducing DRAM refresh power consumption by runtime profiling of retention time and dual-row activation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 72, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Zhiyong Zhang, Zhaoyan Shen, Zhiping Jia, Zili Shao |
UniBuffer: Optimizing Journaling Overhead With Unified DRAM and NVM Hybrid Buffer Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(9), pp. 1792-1805, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Minxuan Zhou, Andreas Prodromou, Rui Wang 0014, Hailong Yang, Depei Qian, Dean M. Tullsen |
Temperature-Aware DRAM Cache Management - Relaxing Thermal Constraints in 3-D Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10), pp. 1973-1986, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Jack Miskelly, Máire O'Neill |
Fast DRAM PUFs on Commodity Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11), pp. 3566-3576, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Asif Ali Khan, Norman A. Rink, Fazal Hameed, Jerónimo Castrillón |
Optimizing Tensor Contractions for Embedded Devices with Racetrack and DRAM Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 19(6), pp. 44:1-44:26, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Rajeswari Packianathan, Gobinath Arumugam |
Performance Analysis of Microstriplines Interconnect Structure with Novel Guard Trace as Parallel Links for High Speed Dram Interfaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Wirel. Pers. Commun. ![In: Wirel. Pers. Commun. 112(1), pp. 261-271, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Odem Harel, Yarden Nachum, Robert Giterman |
Replica Bit-Line Technique for Internal Refresh in Logic-Compatible Gain-Cell Embedded DRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 101, pp. 104781, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Yoonah Paik, Seon Wook Kim, Dongha Jung, Minseong Kim |
Generating Representative Test Sequences from Real Workload for Minimizing DRAM Verification Overhead. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 25(4), pp. 30:1-30:23, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Yaohua Wang, Lois Orosa 0001, Xiangjun Peng, Yang Guo 0003, Saugata Ghose, Minesh Patel, Jeremie S. Kim, Juan Gómez-Luna, Mohammad Sadrosadati, Nika Mansouri-Ghiasi, Onur Mutlu |
FIGARO: Improving System Performance via Fine-Grained In-DRAM Data Relocation and Caching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2009.08437, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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13 | Adarsh Patil 0002 |
TLB and Pagewalk Performance in Multicore Architectures with Large Die-Stacked DRAM Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2002.01073, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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13 | Chao-Hsuan Huang, Ishan G. Thakkar |
Mitigating the Latency-Area Tradeoffs for DRAM Design with Coarse-Grained Monolithic 3D (M3D) Integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2008.11367, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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13 | Jeremie S. Kim, Minesh Patel, Abdullah Giray Yaglikçi, Hasan Hassan, Roknoddin Azizi, Lois Orosa 0001, Onur Mutlu |
Revisiting RowHammer: An Experimental Analysis of Modern DRAM Devices and Mitigation Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2005.13121, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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13 | Karthikeyan Nagarajan, Asmit De, Mohammad Nasim Imtiaz Khan, Swaroop Ghosh |
TrappeD: DRAM Trojan Designs for Information Leakage and Fault Injection Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2001.00856, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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13 | Rachmad Vidya Wicaksana Putra, Muhammad Abdullah Hanif, Muhammad Shafique 0001 |
DRMap: A Generic DRAM Data Mapping Policy for Energy-Efficient Processing of Convolutional Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2004.10341, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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13 | Nastaran Hajinazar, Geraldo F. Oliveira, Sven Gregorio, João Dinis Ferreira, Nika Mansouri-Ghiasi, Minesh Patel, Mohammed Alser, Saugata Ghose, Juan Gómez-Luna, Onur Mutlu |
SIMDRAM: A Framework for Bit-Serial SIMD Processing Using DRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2012.11890, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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13 | Tobi Delbrück, Shih-Chii Liu |
Data-Driven Neuromorphic DRAM-based CNN and RNN Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2003.13006, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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13 | Yinjin Fu |
CARAM: A Content-Aware Hybrid PCM/DRAM Main Memory System Framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2007.13661, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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13 | Minghua Wang, Zhi Zhang 0001, Yueqiang Cheng, Surya Nepal |
DRAMDig: A Knowledge-assisted Tool to Uncover DRAM Address Mapping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2004.02354, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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13 | Lev Mukhanov, Konstantinos Tovletoglou, Hans Vandierendonck, Dimitrios S. Nikolopoulos, Georgios Karakonstantis |
Workload-Aware DRAM Error Prediction using Machine Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2003.12448, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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13 | Dimitrios Stathis 0001, Chirag Sudarshan, Yu Yang, Matthias Jung 0001, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn |
eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 92(11), pp. 1323-1343, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Mustafa Fayez Ali, Akhilesh Jaiswal 0001, Kaushik Roy 0001 |
In-Memory Low-Cost Bit-Serial Addition Using Commodity DRAM Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(1), pp. 155-165, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Xueyong Zhang, Vivek Mohan, Arindam Basu |
CRAM: Collocated SRAM and DRAM With In-Memory Computing-Based Denoising and Filling for Neuromorphic Vision Sensors in 65 nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 67-II(5), pp. 816-820, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Youngbog Yoon, Hyunsu Park, Chulwoo Kim |
A DLL-Based Quadrature Clock Generator With a 3-Stage Quad Delay Unit Using the Sub-Range Phase Interpolator for Low-Jitter and High-Phase Accuracy DRAM Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. ![In: IEEE Trans. Circuits Syst. 67-II(11), pp. 2342-2346, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Youngbog Yoon, Chulwoo Kim |
An Area-Efficient and Wide-Range Inter-Signal Skew Compensation Scheme With the Embedded Bypass Control Register Operating as a Binary Search Algorithm for DRAM Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 67-II(10), pp. 1775-1779, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Chenji Liu, Lan Chen, Xiaoran Hao, Mao Ni, Hao Sun |
Fast cacheline-based data replacement for hybrid DRAM and STT-MRAM main memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 17(10), pp. 20200090, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Rakesh Pandey, Aryabartta Sahu |
Run-time adaptive data page mapping: A Comparison with 3D-stacked DRAM cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Syst. Archit. ![In: J. Syst. Archit. 110, pp. 101798, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Yinjin Fu, Yang Wu |
CARAM: A Content-Aware Hybrid PCM/DRAM Main Memory System Framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NPC ![In: Network and Parallel Computing - 17th IFIP WG 10.3 International Conference, NPC 2020, Zhengzhou, China, September 28-30, 2020, Revised Selected Papers, pp. 243-248, 2020, Springer, 978-3-030-79477-4. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Lukas Steiner, Matthias Jung 0001, Felipe S. Prado, Kirill Bykov, Norbert Wehn |
DRAMSys4.0: A Fast and Cycle-Accurate SystemC/TLM-Based DRAM Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation - 20th International Conference, SAMOS 2020, Samos, Greece, July 5-9, 2020, Proceedings, pp. 110-126, 2020, Springer, 978-3-030-60938-2. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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13 | Do-Yeon Kim, Kee-Won Kwon |
Smart Adaptive Refresh for Optimum Refresh Interval Tracking using in-DRAM ECC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 63rd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2020, Springfield, MA, USA, August 9-12, 2020, pp. 822-825, 2020, IEEE, 978-1-7281-8058-8. The full citation details ...](Pics/full.jpeg) |
2020 |
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