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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 19541 occurrences of 5230 keywords
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Results
Found 53773 publication records. Showing 53773 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
23 | M. M. Adams, Philip B. Clayton |
ClawZ: Cost-Effective Formal Verification for Control Systems. |
ICFEM |
2005 |
DBLP DOI BibTeX RDF |
industrial formal verification, ProofPower, Eurofighter Typhoon, Ada, refinement, Z, control systems, safety-critical software, Simulink, real-time software, formal proof |
23 | Farn Wang |
Symbolic Verification of Distributed Real-Time Systems with Complex Synchronizations. |
ICFEM |
2005 |
DBLP DOI BibTeX RDF |
model-checking, verification, real-time, synchronization, distributed |
23 | Jens Oehlerking, Abhishek Dhama, Oliver E. Theel |
Towards Automatic Convergence Verification of Self-stabilizing Algorithms. |
Self-Stabilizing Systems |
2005 |
DBLP DOI BibTeX RDF |
Verification, Distributed Algorithms, Convergence, Hybrid Systems, Self-Stabilization, Lyapunov Functions, Piecewise Affine Systems |
23 | Lester O. Lobo, James D. Arthur |
Local and global analysis: complementary activities for increasing the effectiveness of requirements verification and validation. |
ACM Southeast Regional Conference (2) |
2005 |
DBLP DOI BibTeX RDF |
verification, validation, requirements, analysis |
23 | Nikolai Kosmatov |
Constraint Solving for Sequences in Software Validation and Verification. |
INAP |
2005 |
DBLP DOI BibTeX RDF |
verification, validation, sequences, constraint solver |
23 | Youngsik Kim, Parija Sule, Nazanin Mansouri |
Exploiting PSL standard assertions in a theorem-proving-based verification environment. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
assertion-based design, modeling, verification, theorem-proving, formal semantics, PSL |
23 | Sadik Ezer, Scott Johnson |
Smart diagnostics for configurable processor verification. |
DAC |
2005 |
DBLP DOI BibTeX RDF |
embedded test-bench control, coverage, functional verification, diagnostics, configurable processors |
23 | Josep Domingo-Ferrer |
On the Synergy Between Certificate Verification Trees and PayTree-like Micropayments. |
EuroPKI |
2004 |
DBLP DOI BibTeX RDF |
PKI and eCommerce, Certificate Directories, Coin-Based Payments, PayTree, Certificate Verification Trees, Protocols, Micropayments |
23 | Pao-Ann Hsiung, Shang-Wei Lin 0001 |
Formal Design and Verification of Real-Time Embedded Software. |
APLAS |
2004 |
DBLP DOI BibTeX RDF |
scheduling, formal verification, code generation, software components, application framework, UML modeling, real-time embedded software, formal synthesis |
23 | Pao-Ann Hsiung, Shang-Wei Lin 0001 |
Automatic Synthesis and Verification of Real-Time Embedded Software. |
EUC |
2004 |
DBLP DOI BibTeX RDF |
scheduling, formal verification, code generation, software components, Application framework, UML modeling, real-time embedded software |
23 | Nirav Patel, M. Srihari, Pooja Maheswari, G. N. Nandakumar |
An Efficient Method to Generate Test Vectors for Combinational Cell Verification. |
VLSI Design |
2004 |
DBLP DOI BibTeX RDF |
combinational cell verification, Gray-code, vector generation, Euler tour |
23 | Fang Yu 0001, Bow-Yaw Wang |
Toward Unbounded Model Checking for Region Automata. |
ATVA |
2004 |
DBLP DOI BibTeX RDF |
Region automata, Real-time systems, Model checking, Verification, Induction, BMC |
23 | Theo C. Ruys, Ed Brinksma |
Managing the verification trajectory. |
Int. J. Softw. Tools Technol. Transf. |
2003 |
DBLP DOI BibTeX RDF |
Model checking, Software configuration management, Computer-aided verification |
23 | Luca Durante, Riccardo Sisto, Adriano Valenzano |
Automatic testing equivalence verification of spi calculus specifications. |
ACM Trans. Softw. Eng. Methodol. |
2003 |
DBLP DOI BibTeX RDF |
equivalence verification, Cryptographic protocols, state space exploration |
23 | Eva Rose |
Lightweight Bytecode Verification. |
J. Autom. Reason. |
2003 |
DBLP DOI BibTeX RDF |
data flow analysis, proof-carrying code, bytecode verification |
23 | Xiaodong Yi 0002, Xuejun Yang |
A Security Verification Method for Information Flow Security Policies Implemented in Operating Systems. |
ICICS |
2003 |
DBLP DOI BibTeX RDF |
Information Flow Security Policy, Security Verification, Secure Operating System |
23 | Vamsi Krishna Madasu, Mohd. Hafizuddin Mohd. Yusof, Madasu Hanmandlu, Kurt Kubik |
Off-Line Signature Verification and Forgery Detection System Based on Fuzzy Modeling. |
Australian Conference on Artificial Intelligence |
2003 |
DBLP DOI BibTeX RDF |
Box-Method, Fuzzy Modeling, Signature Verification, Forgery detection |
23 | Vlad Rusu |
Verification Using Test Generation Techniques. |
FME |
2002 |
DBLP DOI BibTeX RDF |
electronic purse, Formal verification, conformance testing |
23 | Steven Shapiro, Yves Lespérance, Hector J. Levesque |
The cognitive agents specification language and verification environment for multiagent systems. |
AAMAS |
2002 |
DBLP DOI BibTeX RDF |
agent specification languages, theorem proving, proof assistants, verification tools |
23 | Marieke Huisman, Bart Jacobs 0001, Joachim van den Berg |
A case study in class library verification: Java's vector class. |
Int. J. Softw. Tools Technol. Transf. |
2001 |
DBLP DOI BibTeX RDF |
Java, Specification, Program verification, Invariant |
23 | Philip W. L. Fong, Robert D. Cameron |
Proof linking: modular verification of mobile programs in the presence of lazy, dynamic linking. |
ACM Trans. Softw. Eng. Methodol. |
2000 |
DBLP DOI BibTeX RDF |
correctness conditions, proof linking, verification protocol, virtual machine architecture, Java, modularity, safety, mobile code, dynamic linking |
23 | Jörg Fischer 0002, Stefan Conrad 0001 |
Formalizing Timing Diagrams as Causal Dependencies for Verification Purposes. |
IFM |
2000 |
DBLP DOI BibTeX RDF |
hardware and software design, relational semantics, formal semantics, dynamic logic, timing diagrams, integrated verification, causal dependencies |
23 | Marinés Puig-Medina, Gülbin Ezer, Pavlos Konas |
Verification of configurable processor cores. |
DAC |
2000 |
DBLP DOI BibTeX RDF |
configurable processor cores, system-on-chip, test generation, design verification, co-simulation, coverage analysis |
23 | Arne Borälv |
Case Study: Formal Verification of a Computerized Railway Interlocking. |
Formal Aspects Comput. |
1998 |
DBLP DOI BibTeX RDF |
Stålmarck's method, Formal verification, Railway interlocking |
23 | Eric Y. T. Juan, Jeffrey J. P. Tsai, Tadao Murata |
Compositional Verification of Concurrent Systems Using Petri-Net-Based Condensation Rules. |
ACM Trans. Program. Lang. Syst. |
1998 |
DBLP DOI BibTeX RDF |
deadlock states, reachable markings, Petri nets, reachability analysis, compositional verification, boundedness, reachability graphs |
23 | Evguenii I. Goldberg, Yuji Kukimoto, Robert K. Brayton |
Combinational Verification based on High-Level Functional Specifications. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
Combinational verification, Domain transformations, BDDs |
23 | Fong Pong, Michel Dubois 0001 |
Verification Techniques for Cache Coherence Protocols. |
ACM Comput. Surv. |
1997 |
DBLP DOI BibTeX RDF |
state representation and expansion, finite state machine, shared-memory multiprocessors, cache coherence, protocol verification |
23 | Matteo Golfarelli, Dario Maio, Davide Maltoni |
On the Error-Reject Trade-Off in Biometric Verification Systems. |
IEEE Trans. Pattern Anal. Mach. Intell. |
1997 |
DBLP DOI BibTeX RDF |
Biometric verification systems, rejection error rate, statistical pattern recognition, human face, hand geometry, Bayes error rate |
23 | Dhiraj K. Pradhan, Debjyoti Paul, Mitrajit Chatterjee |
VERILAT: verification using logic augmentation and transformations. |
ICCAD |
1996 |
DBLP DOI BibTeX RDF |
VERILAT, formal logic verification, implication-based methods, logic augmentation, logic transformations, logic testing |
23 | Fong Pong, Michel Dubois 0001 |
A New Approach for the Verification of Cache Coherence Protocols. |
IEEE Trans. Parallel Distributed Syst. |
1995 |
DBLP DOI BibTeX RDF |
symbolic expansion, formal verification, finite state machine, shared-memory multiprocessor, Cache coherence protocol |
23 | Oriol Roig, Jordi Cortadella, Enric Pastor |
Hierarchical gate-level verification of speed-independent circuits. |
ASYNC |
1995 |
DBLP DOI BibTeX RDF |
hierarchical gate-level verification, state signals, computational complexity, logic testing, time complexity, asynchronous circuits, speed-independent circuits, complex gates |
23 | Xuhua Yang, Takeshi Furuhashi, Kenzo Obata, Yoshiki Uchikawa |
Constructing a High Performance Signature Verification System Using a GA Method. |
ANNES |
1995 |
DBLP DOI BibTeX RDF |
Fuzzy Network, Feature Selection, GA, Signature Verification |
23 | Robert M. O'Keefe, Daniel E. O'Leary |
Expert system verification and validation: a survey and tutorial. |
Artif. Intell. Rev. |
1993 |
DBLP DOI BibTeX RDF |
ACM Categories and Subject Descriptors D.2.4 [Software Engineering] Program Verification - Validation, D.2.5 [Software Engineering] Testing and Debugging, 1.2 [Artificial Intelligence] Applications and Expert Systems, K.6.1 [Management of Computers and Information System] Project and People Management - Life Cycle |
22 | Manfred Broy |
Architecture Based Specification and Verification of Embedded Software Systems (Work in Progress). |
ISoLA |
2008 |
DBLP DOI BibTeX RDF |
Large Scale Embedded Software Systems, Comprehensive Architecture, Verification, Specification |
22 | Patrice Chalin, Perry R. James, George Karabotsos |
An integrated verification environment for JML: architecture and early results. |
SAVCBS |
2007 |
DBLP DOI BibTeX RDF |
JML4, integrated verification environment, Eclipse, java modeling language |
22 | Prosenjit Chatterjee |
Streamline verification process with formal property verification to meet highly compressed design cycle. |
DAC |
2005 |
DBLP DOI BibTeX RDF |
formal verification |
22 | Wen-Kui Chang, Chun-Yuan Chen |
Integrity-Enhanced Verification Scheme for Software-Intensive Organizations. |
ATVA |
2004 |
DBLP DOI BibTeX RDF |
Software Capability Level, Software Integrity Level, ISO 9001:2000, Software Process Improvement (SPI), CMMI, Software Verification and Validation |
22 | Farn Wang |
Efficient Verification of Timed Automata with BDD-Like Data-Structures. |
VMCAI |
2003 |
DBLP DOI BibTeX RDF |
model-checking, verification, data-structures, timed automata, BDD |
22 | Ricky W. Butler |
Formal Methods at NASA Langley. |
TPHOLs |
2002 |
DBLP DOI BibTeX RDF |
|
22 | Naoki Kobayashi 0001 |
Types and higher-order recursion schemes for verification of higher-order programs. |
POPL |
2009 |
DBLP DOI BibTeX RDF |
model checking, type system, higher-order recursion scheme |
22 | Alin Deutsch, Richard Hull 0001, Fabio Patrizi, Victor Vianu |
Automatic verification of data-centric business processes. |
ICDT |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Victor Vianu |
Automatic verification of database-driven systems: a new frontier. |
ICDT |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Tarvo Raudvere, Ingo Sander, Axel Jantsch |
Application and Verification of Local Nonsemantic-Preserving Transformations in System Design. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Jan B. Freuer, Göran Jerke, Joachim Gerlach, Wolfgang Nebel |
On the Verification of High-Order Constraint Compliance in IC Design. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Katharina Weinberger, Slava Bulach, Robert P. Bosch Jr. |
Application of Workflow Petri Nets to Modeling of Formal Verification Processes in Design Flow of Digital Integrated Circuits. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Alex X. Liu |
Formal Verification of Firewall Policies. |
ICC |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Gwo Giun Lee, He-Yuan Lin, Ming-Jiun Wang, Bo-Han Chen, Yuan-Long Cheng |
On the verification of multi-standard SoC'S for reconfigurable video coding based on algorithm/architecture co-exploration. |
SiPS |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Muhammad Talal Ibrahim, Ling Guan |
On-line signature verification by using most discriminating points. |
ICPR |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Dipankar Das 0002, P. P. Chakrabarti 0001, Rajeev Kumar 0004 |
Functional verification of task partitioning for multiprocessor embedded systems. |
ACM Trans. Design Autom. Electr. Syst. |
2007 |
DBLP DOI BibTeX RDF |
Containment checking, state space reduction, UML activity diagrams, multiprocessor embedded systems |
22 | Shuicheng Yan, Jianzhuang Liu, Xiaoou Tang, Thomas S. Huang |
Formulating Face Verification With Semidefinite Programming. |
IEEE Trans. Image Process. |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Chien-Lin Huang, Chung-Hsien Wu |
Spoken Document Retrieval Using Multilevel Knowledge and Semantic Verification. |
IEEE Trans. Speech Audio Process. |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Yu Qiao 0001, Jianzhuang Liu, Xiaoou Tang |
Offline Signature Verification Using Online Handwriting Registration. |
CVPR |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Alon Flaisher, Alon Gluska, Eli Singerman |
Case study: Integrating FV and DV in the Verification of the Intel CoreTM 2 Duo Microprocessor. |
FMCAD |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Holger Giese, Stefan Henkler, Martin Hirsch 0001 |
Combining Formal Verification and Testing for Correct Legacy Component Integration in Mechatronic UML. |
WADS |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Jacob A. Abraham, Daniel G. Saab |
Tutorial T4A: Formal Verification Techniques and Tools for Complex Designs. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Praveen Tiwari, Raj S. Mitra, Manu Chopra, Alok Jain |
Tutorial T4B: Formal Assertion-Based Verification in Industrial Setting. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Fei Xie, Guowu Yang, Xiaoyu Song |
Component-based hardware/software co-verification. |
MEMOCODE |
2006 |
DBLP DOI BibTeX RDF |
|
22 | G. Zarri, Federico Colucci, F. Dupuis, Riccardo Mariani, Mario Pasquariello, G. Risaliti, C. Tibaldi |
On the verification of automotive protocols. |
DATE Designers' Forum |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Irem Aktug, Dilian Gurov |
State Space Representation for Verification of Open Systems. |
AMAST |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Fei Xie, James C. Browne |
Verification of Component-Based Software Application Families. |
CBSE |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Stefan Andrei, Albert Mo Kim Cheng |
Faster Verification of RTL-Specified Systems via Decomposition and Constraint Extension. |
RTSS |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Anupam Chattopadhyay, Arnab Sinha, Diandian Zhang, Rainer Leupers, Gerd Ascheid, Heinrich Meyr |
Integrated Verification Approach during ADL-Driven Processor Design. |
IEEE International Workshop on Rapid System Prototyping |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Tilman Glökler, Jason Baumgartner, Devi Shanmugam, A. E. (Rick) Seigler, Gary A. Van Huben, Barinjato Ramanandray, Hari Mony, Paul Roessler |
Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning. |
FMCAD |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Zurab Khasidashvili, Marcelo Skaba, Daher Kaiss, Ziyad Hanna |
Post-reboot Equivalence and Compositional Verification of Hardware. |
FMCAD |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Dejan Desovski, Bojan Cukic |
A Component-Based Approach to Verification and Validation of Formal Software Models. |
WADS |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Dejan Desovski, Bojan Cukic |
A Strategy for Verification of Decomposable SCR Models. |
PRDC |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Fei Xie, Xiaoyu Song, Haera Chung, Ranajoy Nandi |
Translation-based co-verification. |
MEMOCODE |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Aysu Betin-Can, Tevfik Bultan, Xiang Fu 0001 |
Design for verification for asynchronously communicating Web services. |
WWW |
2005 |
DBLP DOI BibTeX RDF |
design patterns, BPEL, asynchronous communication, composite web services |
22 | Tsung-Hsi Chiang, Lan-Rong Dung, Ming-Feng Yaung |
Modeling and formal verification of dataflow graph in system-level design using Petri net. |
ISCAS (6) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Pao-Ann Hsiung, Yen-Hung Lin |
Modeling and Verification of Safety-Critical Systems Using Safecharts. |
FORTE |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Aysu Betin-Can, Tevfik Bultan, Mikael Lindvall, Benjamin Lux, Stefan Topp |
Application of design for verification with concurrency controllers to air traffic control software. |
ASE |
2005 |
DBLP DOI BibTeX RDF |
model checking, synchronization, design patterns, interfaces, concurrent programming |
22 | Nick Feamster |
Practical verification techniques for wide-area routing. |
Comput. Commun. Rev. |
2004 |
DBLP DOI BibTeX RDF |
|
22 | Ying-Tsai Chang, Kwang-Ting Cheng |
Self-referential verification for gate-level implementations of arithmetic circuits. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2004 |
DBLP DOI BibTeX RDF |
|
22 | Wei Zhang 0004, Haiyan Zhao, Hong Mei 0001 |
A Propositional Logic-Based Method for Verification of Feature Models. |
ICFEM |
2004 |
DBLP DOI BibTeX RDF |
|
22 | Gerard J. Holzmann, Rajeev Joshi |
Model-Driven Software Verification. |
SPIN |
2004 |
DBLP DOI BibTeX RDF |
|
22 | Isao Nakanishi, Naoto Nishiguchi, Yoshio Itoh, Yutaka Fukui |
On-Line Signature Verification Based on Discrete Wavelet Domain Adaptive Signal Processing. |
ICBA |
2004 |
DBLP DOI BibTeX RDF |
|
22 | Reiner Hähnle, Wojciech Mostowski |
Verification of Safety Properties in the Presence of Transactions. |
CASSIS |
2004 |
DBLP DOI BibTeX RDF |
|
22 | Giorgio Delzanno |
Constraint-Based Verification of Parameterized Cache Coherence Protocols. |
Formal Methods Syst. Des. |
2003 |
DBLP DOI BibTeX RDF |
constraints, abstractions, symbolic model checking, cache coherence protocols |
22 | Fady Copty, Amitai Irron, Osnat Weissberg, Nathan P. Kropp, Gila Kamhi |
Efficient debugging in a formal verification environment. |
Int. J. Softw. Tools Technol. Transf. |
2003 |
DBLP DOI BibTeX RDF |
Counter-example, Model checking, Counterexample |
22 | Jun-Su Jang, Kuk-Hyun Han, Jong-Hwan Kim 0001 |
Quantum-Inspired Evolutionary Algorithm-Based Face Verification. |
GECCO |
2003 |
DBLP DOI BibTeX RDF |
|
22 | Shaz Qadeer, Serdar Tasiran |
Promising Directions in Hardware Design Verification (invited). |
ISQED |
2002 |
DBLP DOI BibTeX RDF |
|
22 | David L. Dill, Nate James, Shishpal Rawat, Gérard Berry, Limor Fix, Harry Foster, Rajeev K. Ranjan 0001, Gunnar Stålmarck, Curt Widdoes |
Formal verification methods: getting around the brick wall. |
DAC |
2002 |
DBLP DOI BibTeX RDF |
|
22 | Ed Brinksma |
Verification is experimentation! |
Int. J. Softw. Tools Technol. Transf. |
2001 |
DBLP DOI BibTeX RDF |
|
22 | Fumitaka Hoshino, Masayuki Abe, Tetsutaro Kobayashi |
Lenient/Strict Batch Verification in Several Groups. |
ISC |
2001 |
DBLP DOI BibTeX RDF |
|
22 | Byeong Min, Gwan Choi |
ECC: Extended Condition Coverage for Design Verification Using Excitation and Observation. |
PRDC |
2001 |
DBLP DOI BibTeX RDF |
|
22 | Debjyoti Paul, Mitrajit Chatterjee, Dhiraj K. Pradhan |
VERILAT: verification using logic augmentation and transformations. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2000 |
DBLP DOI BibTeX RDF |
|
22 | Brian D. Winters, Alan J. Hu |
Source-Level Transformations for Improved Formal Verification. |
ICCD |
2000 |
DBLP DOI BibTeX RDF |
|
22 | Ed Brinksma |
Verification Is Experimentation! |
CONCUR |
2000 |
DBLP DOI BibTeX RDF |
|
22 | Yonit Kesten, Amit Klein 0001, Amir Pnueli, Gil Raanan |
A Perfect Verification: Combining Model Checking with Deductive Analysis to Verify Real-Life Software. |
World Congress on Formal Methods |
1999 |
DBLP DOI BibTeX RDF |
|
22 | Enrico Macii, Bernard Plessier, Fabio Somenzi |
Formal verification of digital systems by automatic reduction of data paths. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1997 |
DBLP DOI BibTeX RDF |
|
22 | Bernd Finkbeiner, Zohar Manna, Henny Sipma |
Deductive Verification of Modular Systems. |
COMPOS |
1997 |
DBLP DOI BibTeX RDF |
|
22 | Brian A. A. Antao, Arthur J. Brodersen |
Behavioral simulation for analog system design verification. |
IEEE Trans. Very Large Scale Integr. Syst. |
1995 |
DBLP DOI BibTeX RDF |
|
22 | David K. Probst, Hon Fung Li |
Partial-Order Model Checking: A Guide for the Perplexed. |
CAV |
1991 |
DBLP DOI BibTeX RDF |
delay-insensitive system, partial-order representation, recurrence structure, model checking, state explosion, state encoding |
22 | Nam Ling, Magdy A. Bayoumi |
Systolic temporal arithmetic: a new formalism for specification and verification of systolic arrays. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1990 |
DBLP DOI BibTeX RDF |
|
21 | Sriram K. Rajamani |
Verification, Testing and Statistics. |
RV |
2009 |
DBLP DOI BibTeX RDF |
|
21 | Ariel Cohen 0002, Amir Pnueli, Lenore D. Zuck |
Mechanical Verification of Transactional Memories with Non-transactional Memory Accesses. |
CAV |
2008 |
DBLP DOI BibTeX RDF |
|
21 | Sagar Chaki, Christian Schallhart, Helmut Veith |
Verification Across Intellectual Property Boundaries. |
CAV |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Cindy Eisner |
PSL for Runtime Verification: Theory and Practice. |
RV |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Eric Bodden, Laurie J. Hendren, Patrick Lam 0001, Ondrej Lhoták, Nomair A. Naeem |
Collaborative Runtime Verification with Tracematches. |
RV |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Huu Hai Nguyen, Cristina David, Shengchao Qin, Wei-Ngan Chin |
Automated Verification of Shape and Size Properties Via Separation Logic. |
VMCAI |
2007 |
DBLP DOI BibTeX RDF |
|
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