Search results for "domino"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
16	Dong Sam Ha, Sudhakar M. Reddy	On the Design of Testable Domino PLAs.	ITC	1985	DBLP BibTeX RDF
16	Thomas Kreifelts	DOMINO: Ein System zur Abwicklung arbeitsteiliger Vorgänge im Büro.	Angew. Inform.	1984	DBLP BibTeX RDF
16	Bogdan S. Chlebus	From domino tilings to a new model of computation.	Symposium on Computation Theory	1984	DBLP DOI BibTeX RDF
16	D. Briatico, Augusto Ciuffoletti, Luca Simoncini	A Distributed Domino-Effect free recovery Algorithm.	Symposium on Reliability in Distributed Software and Database Systems	1984	DBLP BibTeX RDF
16	Martin Fürer	The computational complexity of the unconstrained limited domino problem (with implications for logical decision problems).	Logic and Machines	1983	DBLP DOI BibTeX RDF
16	Heinz-Dieter Ebbinghaus	Undecidability Of Some Domino Connectability Problems.	Math. Log. Q.	1982	DBLP DOI BibTeX RDF
16	David Klarner, Jordan Pollack	Domino tilings of rectangles with fixed width.	Discret. Math.	1980	DBLP DOI BibTeX RDF
16	David W. Straight	Domino f-Sets.	Math. Log. Q.	1979	DBLP DOI BibTeX RDF
16	R. C. Grimson	Enumeration of dimer (domino) configurations.	Discret. Math.	1977	DBLP DOI BibTeX RDF
16	Augustin A. Dubrulle	An extension of the domain of the APL domino function to rank deficient linear least squares systems.	APL	1975	DBLP DOI BibTeX RDF
16	Michael A. Jenkins	DOMINO: an APL primitive function for matrix inversion - - its implementation and applications.	ACM SIGPLAN Notices	1972	DBLP DOI BibTeX RDF
11	Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala	Design of self correcting radiation hardened digital circuits using decoupled ground bus.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	self-repairing circuits, soft errors, radiation hardening
11	Luciano Caroprese, Sergio Greco, Ester Zumpano	Active Integrity Constraints for Database Consistency Maintenance.	IEEE Trans. Knowl. Data Eng.	2009	DBLP DOI BibTeX RDF
11	Nicolas Ollinger	Tiling the Plane with a Fixed Number of Polyominoes.	LATA	2009	DBLP DOI BibTeX RDF
11	I-Hsin Chung, Seetharami R. Seelam, Bernd Mohr, Jesús Labarta	Tools for scalable performance analysis on Petascale systems.	IPDPS	2009	DBLP DOI BibTeX RDF
11	Sohan Purohit, Marco Lanuzza, Stefania Perri, Pasquale Corsonello, Martin Margala	Design-Space Exploration of Energy-Delay-Area Efficient Coarse-Grain Reconfigurable Datapath.	VLSI Design	2009	DBLP DOI BibTeX RDF
11	Thomas Zimmermann 0001	Changes and bugs - Mining and predicting development activities.	ICSM	2009	DBLP DOI BibTeX RDF
11	Shingo Takeuchi, Kazuhiro Saitou	Design for Product Embedded Disassembly.	Evolutionary Computation in Practice	2008	DBLP DOI BibTeX RDF	Design for disassembly, environmentally-conscious design, Operant behavior, multi-objective genetic algorithm, design optimization
11	Mary Ellen Zurko, Andrew S. Patrick	Panel: Usable Cryptography: Manifest Destiny or Oxymoron?.	Financial Cryptography	2008	DBLP DOI BibTeX RDF	User-centered security, cryptography
11	Bruno Durand 0001, Andrei E. Romashchenko, Alexander Shen	Fixed Point and Aperiodic Tilings.	Developments in Language Theory	2008	DBLP DOI BibTeX RDF
11	Jakob Leitner, Michael Haller, Kyungdahm Yun, Woontack Woo, Maki Sugimoto, Masahiko Inami	IncreTable, a mixed reality tabletop game experience.	Advances in Computer Entertainment Technology	2008	DBLP DOI BibTeX RDF	interaction design, tangible user interfaces, mixed reality, pervasive games, tabletop gaming
11	Chin-Khai Tang, Chun-Yen Lin, Yi-Chang Lu	An Asynchronous Circuit Design with Fast Forwarding Technique at Advanced Technology Node.	ISQED	2008	DBLP DOI BibTeX RDF	Asynchronous Circuit Design, Single Track, Dual-Rail, Fast Forwarding
11	Erkki Laitila	Symbolic Hybrid Programming Tool for Software Understanding.	HAIS	2008	DBLP DOI BibTeX RDF	reverse engineering, Program comprehension, hybrid architecture
11	Stephen Tong, Joseph Williams	Are You Prepared for Daylight Saving Time 2007?	IT Prof.	2007	DBLP DOI BibTeX RDF
11	Nikhil Jayakumar, Sunil P. Khatri	A Predictably Low-Leakage ASIC Design Style.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
11	Annika Wolff, Paul Mulholland, Zdenek Zdráhal, Richard W. Joiner	Combining gameplay and narrative techniques to enhance the user experience of viewing galleries.	Comput. Entertain.	2007	DBLP DOI BibTeX RDF	child-friendly interface, content reuse, games, narrative
11	Stan Kelly-Bootle	The Code Delusion.	ACM Queue	2007	DBLP DOI BibTeX RDF
11	Krishna Santhanam, Kenneth S. Stevens	Dynamic gates with hysteresis and configurable noise tolerance.	VLSI-SoC	2007	DBLP DOI BibTeX RDF
11	Alessandro Ferrante, Aniello Murano	Enriched µ-Calculi Module Checking.	FoSSaCS	2007	DBLP DOI BibTeX RDF
11	Bruno Coutinho, Dorgival Olavo Guedes Neto, Wagner Meira Jr., Renato Ferreira 0001	Fault-tolerance in filter-labeled-stream applications.	SBAC-PAD	2007	DBLP DOI BibTeX RDF
11	Jichiang Tsai 0001, Chia-Yang Chen, Ming-Fa Hu, Jenn-Wei Lin	Self-Adjusting Indexing Techniques for Communication-Induced Checkpointing Protocols.	PRDC	2007	DBLP DOI BibTeX RDF
11	Jie Gu 0003, Sachin S. Sapatnekar, Chris H. Kim	Width-dependent Statistical Leakage Modeling for Random Dopant Induced Threshold Voltage Shift.	DAC	2007	DBLP DOI BibTeX RDF
11	Stijn Heymans, Davy Van Nieuwenborgh, Dirk Vermeir	Conceptual logic programs.	Ann. Math. Artif. Intell.	2006	DBLP DOI BibTeX RDF	Mathematics Subject Classifications (2000) 68T27, 68N17, 68T30
11	Johannes Grad, James E. Stine	Dual-Mode High-Speed Low-Energy Binary Addition.	ISVLSI	2006	DBLP DOI BibTeX RDF
11	Antoine Dupret, Marius Vasiliu, Francis Devos	Performance and power analysis on asynchronous reading of binary arrays.	ISCAS	2006	DBLP DOI BibTeX RDF
11	Joo-Young Kim 0001, Kangmin Lee, Hoi-Jun Yoo	A 372 ps 64-bit adder using fast pull-up logic in 0.18µm CMOS.	ISCAS	2006	DBLP DOI BibTeX RDF
11	Y. Tsiatouhas, Angela Arapoyanni	High fan-in differential current mirror logic.	ISCAS	2006	DBLP DOI BibTeX RDF
11	Massimo Alioto, Gaetano Palumbo	Delay uncertainty due to supply variations in static and dynamic full adders.	ISCAS	2006	DBLP DOI BibTeX RDF
11	Peter J. Vidler, Michael J. Pont	Computer Assisted Source-Code Parallelisation.	ICCSA (5)	2006	DBLP DOI BibTeX RDF
11	Giby Samson, Lawrence T. Clark	Circuit architecture for low-power race-free programmable logic arrays.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	circuit timing, low power, programmable logic arrays
11	Palanichamy Manikandan, B. D. Liu, L. Y. Chiou, G. Sundar, Chittaranjan R. Mandal	Asynchronous Design Methodology for an Efficient Implementation of Low power ALU.	APCCAS	2006	DBLP DOI BibTeX RDF
11	Himanshu Kaul, Dennis Sylvester, Mark A. Anders 0001, Ram Krishnamurthy 0001	Design and analysis of spatial encoding circuits for peak power reduction in on-chip buses.	IEEE Trans. Very Large Scale Integr. Syst.	2005	DBLP DOI BibTeX RDF
11	Natarajan Viswanathan, Chris C. N. Chu	FastPlace: efficient analytical placement using cell shifting, iterative local refinement, and a hybrid net model.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2005	DBLP DOI BibTeX RDF
11	Joseph S. Miller, Lawrence S. Moss	The Undecidability of Iterated Modal Relativization.	Stud Logica	2005	DBLP DOI BibTeX RDF	iterated relativization, modal logic, undecidability, Dynamic epistemic logic
11	K. G. Subramanian 0001, A. Roslin Sagaya Mary, K. S. Dersanambika	Splicing Array Grammar Systems.	ICTAC	2005	DBLP DOI BibTeX RDF
11	Christoph Bobrowski, Georg Kreymann	Knowledge Management in Internal Medicine Using Lotus Notus - A Knowledge Management Perspective.	Wissensmanagement (LNCS Volume)	2005	DBLP DOI BibTeX RDF
11	Suwen Yang, Brian D. Winters, Mark R. Greenstreet	Energy Efficient Surfing.	ASYNC	2005	DBLP DOI BibTeX RDF
11	Arkadiy Morgenshtein, Israel Cidon, Ran Ginosar, Avinoam Kolodny	Low-leakage repeaters for NoC interconnects.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
11	Srivathsan Krishnamohan, Nihar R. Mahapatra	Increasing the energy efficiency of pipelined circuits via slack redistribution.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	slack passing, time borrowing, low-power design
11	Jeetendra Kumar, Mehdi Baradaran Tahoori	A Low Power Soft Error Suppression Technique for Dynamic Logic.	DFT	2005	DBLP DOI BibTeX RDF
11	Jichiang Tsai 0001, Jenn-Wei Lin	On the Fully-Informed Communication-Induced Checkpointing Protocol.	PRDC	2005	DBLP DOI BibTeX RDF
11	Tongchit Tantikul, D. Manivannan 0001	A Communication-Induced Checkpointing and Asynchronous Recovery Protocol for Mobile Computing Systems.	PDCAT	2005	DBLP DOI BibTeX RDF	fault-tolerance, failure recovery, mobile computing system, Distributed checkpointing
11	Bhaskar Chatterjee, Manoj Sachdev, Ali Keshavarzi	DFT for Delay Fault Testing of High-Performance Digital Circuits.	IEEE Des. Test Comput.	2004	DBLP DOI BibTeX RDF
11	Goce Trajcevski, Ouri Wolfson, Klaus H. Hinrichs, Sam Chamberlain	Managing uncertainty in moving objects databases.	ACM Trans. Database Syst.	2004	DBLP DOI BibTeX RDF	Moving Objects Databases
11	Frederick T. Sheldon, Thomas E. Potok, Andy Loebl, Axel W. Krings, Paul W. Oman	Managing Secure Survivable Critical Infrastructures to Avoid Vulnerabilities.	HASE	2004	DBLP DOI BibTeX RDF
11	Jean-Pierre Hubaux	New Research Challenges for the Security of Ad Hoc and Sensor Networks.	ESAS	2004	DBLP DOI BibTeX RDF
11	Annika Wolff, Paul Mulholland, Zdenek Zdráhal	Scene-Driver: reusing broadcast animation content for engaging, narratively coherent games.	AVI	2004	DBLP DOI BibTeX RDF	AI planning algorithms, child directed interface, interactive narrative, interface evaluation, visual interaction, animated interfaces
11	Martin V. Butz, David E. Goldberg, Pier Luca Lanzi	Bounding Learning Time in XCS.	GECCO (2)	2004	DBLP DOI BibTeX RDF
11	Annika Wolff, Paul Mulholland, Zdenek Zdráhal	Scene-driver: a narrative-driven game architecture reusing broadcast animation content.	Advances in Computer Entertainment Technology	2004	DBLP DOI BibTeX RDF	broadcast content reuse, child-friendly interface, narrative
11	Himanshu Kaul, Dennis Sylvester, Mark A. Anders 0001, Ram Krishnamurthy 0001	Spatial encoding circuit techniques for peak power reduction of on-chip high-performance buses.	ISLPED	2004	DBLP DOI BibTeX RDF
11	Najwa Aaraj, Anis Nazer, Ali Chehab, Ayman I. Kayssi	Transient Current Testing of Dynamic CMOS Circuits.	DFT	2004	DBLP DOI BibTeX RDF
11	Ge Yang 0004, Zhongda Wang, Sung-Mo Kang	Low Power and High Performance Circuit Techniques for High Fan-In Dynamic Gates.	ISQED	2004	DBLP DOI BibTeX RDF
11	Annika Wolff, Paul Mulholland, Zdenek Zdráhal, Richard W. Joiner	Scene-Driver: An Interactive Narrative Environment Using Content from an Animated Children's Television Series.	TIDSE	2004	DBLP DOI BibTeX RDF
11	Zhong Xiu, James D. Z. Ma, Suzanne M. Fowler, Rob A. Rutenbar	Large-scale placement by grid-warping.	DAC	2004	DBLP DOI BibTeX RDF	algorithms, placement
11	Lei Wang 0003, Naresh R. Shanbhag	Energy-efficiency bounds for deep submicron VLSI systems in the presence of noise.	IEEE Trans. Very Large Scale Integr. Syst.	2003	DBLP DOI BibTeX RDF
11	Michael A. Riepe, Karem A. Sakallah	Transistor placement for noncomplementary digital VLSI cell synthesis.	ACM Trans. Design Autom. Electr. Syst.	2003	DBLP DOI BibTeX RDF	Cell Synthesis, Euler graphs, noncomplementary circuits, sequence pair optimization, transistor chaining, transistor placement, digital circuits, benchmark circuits
11	Naran Sirisantana, Kaushik Roy 0001	Selectively Clocked CMOS Logic Style for Low-Power Noise-Immune Operations in Scaled Technologies.	DATE	2003	DBLP DOI BibTeX RDF
11	Tony F. Chan, Jason Cong, Tim Kong, Joseph R. Shinnerl, Kenton Sze	An Enhanced Multilevel Algorithm for Circuit Placement.	ICCAD	2003	DBLP DOI BibTeX RDF
11	Frank Grassert, Dirk Timmermann	Dynamic single-rail self-timed logic structures for power efficient synchronous pipelined designs.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	redundant numbers, self-timed logic, single-rail logic, low power, dynamic logic
11	Ching-Hwa Cheng	Design Scan Test Strategy for Single Phase Dynamic Circuits.	DFT	2003	DBLP DOI BibTeX RDF
11	Rajesh Kumar 0006	Interconnect and noise immunity design for the Pentium 4 processor.	DAC	2003	DBLP DOI BibTeX RDF
11	Massimo Alioto, Gaetano Palumbo	Analysis and comparison on full adder block in submicron technology.	IEEE Trans. Very Large Scale Integr. Syst.	2002	DBLP DOI BibTeX RDF
11	Keerthi Heragu, Manish Sharma, Rahul Kundu, Ronald D. Blanton	Test vector generation for charge sharing failures in dynamic logic.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2002	DBLP DOI BibTeX RDF
11	Geun Rae Cho, Tom Chen 0001	On The Impact of Technology Scaling On Mixed PTL/Static Circuits.	ICCD	2002	DBLP DOI BibTeX RDF
11	Rouwaida Kanj, Elyse Rosenbaum	A critical look at design guidelines for SOI logic gates.	ISCAS (3)	2002	DBLP DOI BibTeX RDF
11	Mohab Anis, Mohamed I. Elmasry	Self-timed MOS current mode logic for digital applications.	ISCAS (5)	2002	DBLP DOI BibTeX RDF
11	G. R. Chaji, Seid Mehdi Fakhraie, Kenneth Carless Smith	Pseudo dynamic logic (SDL): a high-speed and low-power dynamic logic family.	ISCAS (3)	2002	DBLP DOI BibTeX RDF
11	Sreejit Chakravarty, Ankur Jain	Fault Models for Speed Failures Caused by Bridges and Opens.	VTS	2002	DBLP DOI BibTeX RDF
11	Jichiang Tsai 0001, Jenn-Wei Lin	On Characteristics of DEF Communication-Induced Checkpointing Protocols.	PRDC	2002	DBLP DOI BibTeX RDF
11	Goce Trajcevski, Ouri Wolfson, Fengli Zhang, Sam Chamberlain	The Geometry of Uncertainty in Moving Objects Databases.	EDBT	2002	DBLP DOI BibTeX RDF
11	Guohong Cao, Mukesh Singhal	Mutable Checkpoints: A New Checkpointing Approach for Mobile Computing Systems.	IEEE Trans. Parallel Distributed Syst.	2001	DBLP DOI BibTeX RDF	Mobile computing, nonblocking, causal dependency, coordinated checkpointing
11	Chris J. Myers, Wendy Belluomini, Kip Kallpack, Eric Peskin, Hao Zheng 0001	Timed circuits: a new paradigm for high-speed design.	ASP-DAC	2001	DBLP DOI BibTeX RDF
11	Abdoul Rjoub, M. Alrousan, Omar M. Al-Jarrah, Odysseas G. Koufopavlou	Multi-level low swing voltage values for low power design applications.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
11	Keerthi Heragu, Manish Sharma, Rahul Kundu, R. D. (Shawn) Blanton	Testing of Dynamic Logic Circuits Based on Charge Sharing.	VTS	2001	DBLP DOI BibTeX RDF
11	Kenneth Y. Yun, Kevin W. James, Robert H. Fairlie-Cuninghame, Supratik Chakraborty, Rene L. Cruz	A self-timed real-time sorting network.	IEEE Trans. Very Large Scale Integr. Syst.	2000	DBLP DOI BibTeX RDF
11	Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L. Liu 0001, Sung-Mo Kang	Noise-aware power optimization for on-chip interconnect.	ISLPED	2000	DBLP DOI BibTeX RDF
11	Marcin Jurdzinski, Mogens Nielsen	Hereditary History Preserving Bisimilarity Is Undecidable.	STACS	2000	DBLP DOI BibTeX RDF
11	Madhuban Kishor, José Pineda de Gyvez	Threshold Voltage and Power-Supply Tolerance of CMOS Logic Design Families.	DFT	2000	DBLP DOI BibTeX RDF
11	Gin Yee, Tyler Thorp, Ron Christopherson, Ban P. Wang, Carl Sechen	An Automated Shielding Algorithm and Tool For Dynamic Circuits.	ISQED	2000	DBLP DOI BibTeX RDF
11	Lorenzo Alvisi, E. N. Elnozahy, Sriram Rao, Syed Amir Husain, Asanka De Mel	An Analysis of Communication Induced Checkpointing.	FTCS	1999	DBLP DOI BibTeX RDF	Performance Evaluation, MPI, Checkpointing, Rollback Recovery, Consistent Global States
11	Tyler Thorp, Gin Yee, Carl Sechen	Design and Synthesis of Monotonic Circuits.	ICCD	1999	DBLP DOI BibTeX RDF
11	Lei Wang 0003, Naresh R. Shanbhag	Noise-tolerant dynamic circuit design.	ISCAS (1)	1999	DBLP DOI BibTeX RDF
11	Richard B. Brown, Bruce Bernhardt, M. LaMacchia, J. Abrokwah, Phiroze N. Parakh, Todd D. Basso, Spencer M. Gold, S. Stetson, Claude R. Gauthier, D. Foster, B. Crawforth, T. McQuire, Karem A. Sakallah, Ronald J. Lomax, Trevor N. Mudge	Overview of complementary GaAs technology for high-speed VLSI circuits.	IEEE Trans. Very Large Scale Integr. Syst.	1998	DBLP DOI BibTeX RDF
11	Guohong Cao, Mukesh Singhal	On Coordinated Checkpointing in Distributed Systems.	IEEE Trans. Parallel Distributed Syst.	1998	DBLP DOI BibTeX RDF	consistent checkpoints, Distributed system, nonblocking, causal dependence, coordinated checkpointing
11	Christopher H. Young, Nael B. Abu-Ghazaleh, Philip A. Wilsey	OFC: A Distributed Fossil-Collection Algorithm for Time-Warp.	DISC	1998	DBLP DOI BibTeX RDF
11	Petra Schubert, Dorian Selz	Organizational Design of an IT-Based Knowledge System: The NetAcademy Concept.	HICSS (2)	1998	DBLP DOI BibTeX RDF
11	Subbarayan Venkatesan, Tong-Ying Tony Juang, Sridhar Alagar	Optimistic Crash Recovery without Changing Application Messages.	IEEE Trans. Parallel Distributed Syst.	1997	DBLP DOI BibTeX RDF	fail-stop failures, optimistic message logging, distributed algorithms, time complexity, message complexity, Crash recovery
11	Hajo Broersma, Elias Dahlhaus, Ton Kloks	Algorithms for the Treewidth and Minimum Fill-in of HHD-Free Graphs.	WG	1997	DBLP DOI BibTeX RDF	MSC 68R10
11	Martin Benes 0002, Andrew Wolfe, Steven M. Nowick	A High-Speed Asynchronous Decompression Circuit for Embedded Processors.	ARVLSI	1997	DBLP DOI BibTeX RDF
11	Moazzem Hossain, Bala Thumma, Sunil Ashtaputre	A New Faster Algorithm for Iterative Placement Improvement.	Great Lakes Symposium on VLSI	1996	DBLP DOI BibTeX RDF