Search results for "IOLTS"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
44	Celia López-Ongil, Alejandro Jiménez-Horas, Marta Portela-García, Mario García-Valderas, Enrique San Millán, Luis Entrena	Smart Hardening for Round-based Encryption Algorithms: Application to Advanced Encryption Standard.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, Andreas G. Veneris	On the Minimization of Potential Transient Errors and SER in Logic Circuits Using SPFD.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Julien Vial, Alberto Bosio, Patrick Girard 0001, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel	Yield Improvement, Fault-Tolerance to the Rescue?.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Taiki Uemura, Ryo Tanabe, Yoshiharu Tosaka, Shigeo Satoh	Using Low Pass Filters in Mitigation Techniques against Single-Event Transients in 45nm Technology LSIs.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Rishad A. Shafik, Paul M. Rosinger, Bashir M. Al-Hashimi	SystemC-Based Minimum Intrusive Fault Injection Technique with Improved Fault Representation.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Jaume Abella 0001, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio González 0001	On-Line Failure Detection and Confinement in Caches.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Norbert Seifert	Soft Error Rates of Hardened Sequentials utilizing Local Redundancy.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Fan Yang 0060, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz	An Enhanced Logic BIST Architecture for Online Testing.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Sreenivas Gangadhar, Michael N. Skoufis, Spyros Tragoudas	Propagation of Transients Along Sensitizable Paths.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Dimitris Magos, Ioannis Voyiatzis, Steffen Tarnick	A Low-Cost Accumulator-Based Test Pattern Generation Architecture.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas 0001, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira 0001	Exploiting Parametric Power Supply and/or Temperature Variations to Improve Fault Tolerance in Digital Circuits.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Wilson J. Pérez H., Jaime Velasco-Medina, Danilo Ravotto, Edgar E. Sánchez, Matteo Sonza Reorda	A Hybrid Approach to the Test of Cache Memory Controllers Embedded in SoCs.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Philipp Öhler, Alberto Bosio, Giorgio Di Natale, Sybille Hellebrand	A Modular Memory BIST for Optimized Memory Repair.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan	Design Techniques for Bit-Parallel Galois Field Multipliers with On-Line Single Error Correction and Double Error Detection.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Gaetan Canivet, Jessy Clédière, Jean Baptiste Ferron, Frédéric Valette, Marc Renaudin, Régis Leveugle	Detailed Analyses of Single Laser Shot Effects in the Configuration of a Virtex-II FPGA.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Zhengfeng Huang, Huaguo Liang	A New Radiation Hardened by Design Latch for Ultra-Deep-Sub-Micron Technologies.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Damien Leroy, Rémi Gaillard, Erwin Schäfer, Cyrille Beltrando, Shi-Jie Wen, Richard Wong	Variation of SRAM Alpha-Induced Soft Error Rate with Technology Node.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Ricardo de Oliveira Duarte, Luiz de Siqueira Martins-Filho, Guilherme F. T. Knop, Ricardo S. Prado	A Fault-Tolerant Attitude Determination System Based on COTS Devices.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Piotr Zajac, Jacques Henri Collet, Andrzej Napieralski	Self-Configuration and Reachability Metrics in Massively Defective Multiport Chips.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Yu (Kevin) Kao	Modeling and Simulation of Circuit Aging in Scaled CMOS Design.	IOLTS	2008	DBLP DOI BibTeX RDF
44	Tino Heijmen	Special Session 3 - Panel: SER in Automotive: what is the impact of the AEC Q100-G spec?	IOLTS	2008	DBLP DOI BibTeX RDF
44		13th IEEE International On-Line Testing Symposium (IOLTS 2007), 8-11 July 2007, Heraklion, Crete, Greece	IOLTS	2007	DBLP BibTeX RDF
44	Franz X. Ruckerbauer, Georg Georgakos	Soft Error Rates in 65nm SRAMs--Analysis of new Phenomena.	IOLTS	2007	DBLP DOI BibTeX RDF	NSER, ASER, multi-bit upset, soft errors and radiation, CMOS, SRAM, SEU
44	Cristian Grecu, Lorena Anghel, Partha Pratim Pande, André Ivanov, Resve A. Saleh	Essential Fault-Tolerance Metrics for NoC Infrastructures.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Jimson Mathew, Hafizur Rahaman 0001, Dhiraj K. Pradhan	Efficient Testable Bit Parallel Multipliers over GF(2^m) with Constant Test set.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Jaume Abella 0001, Xavier Vera, Osman S. Unsal, Oguz Ergin, Antonio González 0001	Fuse: A Technique to Anticipate Failures due to Degradation in ALUs.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Ilia Polian, Damian Nowroth, Bernd Becker 0001	Identification of Critical Errors in Imaging Applications.	IOLTS	2007	DBLP DOI BibTeX RDF	Low-cost on-line test, Selective hardening, Imaging applications, Error tolerance
44	Tino Heijmen	Spread in Alpha-Particle-Induced Soft-Error Rate of 90-nm Embedded SRAMs.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Marta Portela-García, Celia López-Ongil, Mario García-Valderas, Luis Entrena	A Rapid Fault Injection Approach for Measuring SEU Sensitivity in Complex Processors.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Claudia Rusu, Antonin Bougerol, Lorena Anghel, Cécile Weulersse, Nadine Buard, S. Benhammadi, Nicolas Renaud, Guillaume Hubert, Frederic Wrobel, Thierry Carrière, Rémi Gaillard	Multiple Event Transient Induced by Nuclear Reactions in CMOS Logic Cells.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Mohammad Hosseinabady, Mohammad Hossein Neishaburi, Zainalabedin Navabi, Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Giorgio Di Natale	Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Fabian Vargas 0001, Leonardo Piccoli 0001, Juliano Benfica, Antonio A. de Alecrim Jr., Marlon Moraes	Time-Sensitive Control-Flow Checking for Multitask Operating System-Based SoCs.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Olivier Faurax, Assia Tria, Laurent Freund, Frédéric Bancel	Robustness of circuits under delay-induced faults : test of AES with the PAFI tool.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Atefe Dalirsani, Mohammad Hosseinabady, Zainalabedin Navabi	An Analytical Model for Reliability Evaluation of NoC Architectures.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Alodeep Sanyal, Kunal P. Ganeshpure, Sandip Kundu	Accelerating Soft Error Rate Testing Through Pattern Selection.	IOLTS	2007	DBLP DOI BibTeX RDF	soft error rate (SER), simulation, automatic test pattern generation (ATPG), Soft error
44	Steffen Tarnick	Design of Embedded m-out-of-n Code Checkers Using Complete Parallel Counters.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Xavier Vera, Jaume Abella 0001	Surviving to Errors in Multi-Core Environments.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Osama Daifallah Al-Khaleel, Christos A. Papachristou, Francis G. Wolff, Kiamal Z. Pekmestzi	An Elliptic Curve Cryptosystem Design Based on FPGA Pipeline Folding.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Nadine Buard, Florent Miller, Cédric Ruby, Rémi Gaillard	Latchup effect in CMOS IC: a solution for crypto-processors protection against fault injection attacks?	IOLTS	2007	DBLP DOI BibTeX RDF
44	Subhasish Mitra	Circuit Failure Prediction Enables Robust System Design Resilient to Aging and Wearout.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Mark Derbey	Soft-Errors Phenomenon Impacts on Design for Reliability Technologies.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Nikolaos G. Bartzoudis, Klaus D. McDonald-Maier	Online monitoring of FPGA-based co-processing engines embedded in dependable workstations.	IOLTS	2007	DBLP DOI BibTeX RDF	FPGAs, error detection, dependable systems, online monitoring
44	Riccardo Mariani, Gabriele Boschi	A systematic approach for Failure Modes and Effects Analysis of System-On-Chips.	IOLTS	2007	DBLP DOI BibTeX RDF
44	R. Frost, D. Rudolph, Christian Galke, René Kothe, Heinrich Theodor Vierhaus	A Configurable Modular Test Processor and Scan Controller Architecture.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas 0001, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira 0001	On-line Dynamic Delay Insertion to Improve Signal Integrity in Synchronous Circuits.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Snehal Udar, Dimitri Kagaris	LFSR Reseeding with Irreducible Polynomials.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Somnath Paul, Rajat Subhra Chakraborty, Swarup Bhunia	Defect-Aware Configurable Computing in Nanoscale Crossbar for Improved Yield.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Alodeep Sanyal, Sandip Kundu	On Derating Soft Error Probability Based on Strength Filtering.	IOLTS	2007	DBLP DOI BibTeX RDF	soft error rate, logic switching threshold voltage, Soft error, single event upset, single event transient
44	Partha Pratim Pande, Amlan Ganguly, Brett Feero, Cristian Grecu	Applicability of Energy Efficient Coding Methodology to Address Signal Integrity in 3D NoC Fabrics.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Subhasish Mitra, Pia N. Sanda, Norbert Seifert	Soft Errors: Technology Trends, System Effects, and Protection Techniques.	IOLTS	2007	DBLP DOI BibTeX RDF	Memory soft errors, Logic soft errors, timing derating, logic derating, architectural derating, Built-In Soft Error Resilience, reliability, data integrity, availability, Error Correcting Codes, error detection, recovery, Soft errors, FITs, radiation hardening
44	Salvatore Pontarelli, Luca Sterpone, Gian Carlo Cardarilli, Marco Re, Matteo Sonza Reorda, Adelio Salsano, Massimo Violante	Self Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Yannick Monnet, Marc Renaudin, Régis Leveugle	Formal Analysis of Quasi Delay Insensitive Circuits Behavior in the Presence of SEUs.	IOLTS	2007	DBLP DOI BibTeX RDF
44	T. M. Mak	Infant Mortality--The Lesser Known Reliability Issue.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Asen Asenov	Statistical Device Variability and its Impact on Yield and Performance.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Davide Pandini	Innovative Design Platforms for Reliable SoCs in Advanced Nanometer Technologies.	IOLTS	2007	DBLP DOI BibTeX RDF
44	X. Cano, Sebastià A. Bota, Ricardo Graciani Diaz, David Gascon, A. Herms, Albert Comerma, Jaume Segura 0001, Lluís Garrido	Heavy Ion Test Results in a CMOS triple Voting Register for a High-Energy Physics Experiment.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Michael Nicolaidis	GRAAL: A Fault-Tolerant Architecture for Enabling Nanometric Technologies.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Krisztián Flautner	Blurring the Layers of Abstractions: Time to Take a Step Back?	IOLTS	2007	DBLP DOI BibTeX RDF
44	Ming Zhang 0017, T. M. Mak, James W. Tschanz, Kee Sup Kim, Norbert Seifert, Davia Lu	Design for Resilience to Soft Errors and Variations.	IOLTS	2007	DBLP DOI BibTeX RDF
44	K. T. Gardiner, Alexandre Yakovlev, Alexandre V. Bystrov	A C-element Latch Scheme with Increased Transient Fault Tolerance for Asynchronous Circuits.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Antonis Papanikolaou, Hua Wang, Miguel Miranda, Francky Catthoor	Reliability issues in deep deep sub-micron technologies: time-dependent variability and its impact on embedded system design.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre	An On-Line Fault Detection Scheme for SBoxes in Secure Circuits.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Karthik Pattabiraman, Zbigniew Kalbarczyk, Ravishankar K. Iyer	Automated Derivation of Application-aware Error Detectors using Static Analysis.	IOLTS	2007	DBLP DOI BibTeX RDF	Critical Variables, backward slicing, checking expression, Compiler techniques, path-tracking
44	Michel Pignol	Methodology and Tools Developed for Validation of COTS-based Fault-Tolerant Spacecraft Supercomputers.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Muhammad Mudassar Nisar, Maryam Ashouei, Abhijit Chatterjee	Probabilistic Concurrent Error Compensation in Nonlinear Digital Filters Using Linearized Checksums.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Manuel G. Gericota, Luís F. Lemos, Gustavo R. Alves, José M. Ferreira 0001	On-Line Self-Healing of Circuits Implemented on Reconfigurable FPGAs.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Costas Argyrides, Dhiraj K. Pradhan	Highly Reliable Power Aware Memory Design.	IOLTS	2007	DBLP DOI BibTeX RDF
44	John C. Liobe, Martin Margala	Novel Process and Temperature-Stable BICS for Embedded Analog and Mixed-Signal Test.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Krisztián Flautner	Architectural Trade-Offs for Fault Tolerant Multi-Core Systems.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Paolo Bernardi, Letícia Maria Veiras Bolzani, Matteo Sonza Reorda	A Hybrid Approach to Fault Detection and Correction in SoCs.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Jacques Henri Collet, Piotr Zajac	Resilience, Production Yield and Self-Configuration in the Future Massively Defective Nanochips.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Swaroop Ghosh, Patrick Ndai, Swarup Bhunia, Kaushik Roy 0001	Tolerance to Small Delay Defects by Adaptive Clock Stretching.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Daniele Rossi 0001, Paolo Angelini, Cecilia Metra	Configurable Error Control Scheme for NoC Signal Integrity.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Marta Bagatin, Giorgio Cellere, Simone Gerardin, Alessandro Paccagnella, Angelo Visconti, Silvia Beltrami, M. Maccarrone	Single Event Effects in 1Gbit 90nm NAND Flash Memories under Operating Conditions.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Letícia Maria Veiras Bolzani, Ernesto Sánchez 0001, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero	An Automated Methodology for Cogeneration of Test Blocks for Peripheral Cores.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Sanjiv Taneja	Accelerating Yield Ramp through Real-Time Testing.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Fabrice Monteiro, Stanislaw J. Piestrak, Houssein Jaber, Abbas Dandache	Fault-Secure Interface Between Fault-Tolerant RAM and Transmission Channel Using Systematic Cyclic Codes.	IOLTS	2007	DBLP DOI BibTeX RDF
44	Ioannis Voyiatzis	Embedding test patterns into Low-Power BIST sequences.	IOLTS	2007	DBLP DOI BibTeX RDF	Test set embedding, Gray sequences, Low power sequences, Built-In Self Test
44	Emmanuel Simeu, Salvador Mir, R. Kherreddine, Hoang Nam Nguyen	Envelope Detection Based Transition Time Supervision for Online Testing of RF MEMS Switches.	IOLTS	2007	DBLP DOI BibTeX RDF	RF MEMS, capacitive switch, envelope detection, transition time, Online testing, recursive estimation
44	Andreas Apostolakis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis	A Functional Self-Test Approach for Peripheral Cores in Processor-Based SoCs.	IOLTS	2007	DBLP DOI BibTeX RDF
44		12th IEEE International On-Line Testing Symposium (IOLTS 2006), 10-12 July 2006, Como, Italy	IOLTS	2006	DBLP BibTeX RDF
44	Melanie Berg	Fault Tolerance Implementation within SRAM Based FPGA Design Based upon the Increased Level of Single Event Upset Susceptibility.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Robert C. Aitken	Reliability Issues for Embedded SRAM at 90nm and Below.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Lorena Anghel, Michael Nicolaidis, Nadine Buard	From Nuclear Reaction to System Failures: Can We Address All Levels of Soft Errors Accurately?	IOLTS	2006	DBLP DOI BibTeX RDF
44	T. M. Mak	Test Challenges for 3D Circuits.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Norbert Seifert	Extending Moore's Law into the next Decade - the SER Challenge.	IOLTS	2006	DBLP DOI BibTeX RDF
44	André V. Fidalgo, Gustavo R. Alves, José M. Ferreira 0001	Real Time Fault Injection Using a Modified Debugging Infrastructure.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Frederic Worm, Patrick Thiran, Paolo Ienne	Designing Robust Checkers in the Presence of Massive Timing Errors.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Michel Pignol	DMT and DT2: Two Fault-Tolerant Architectures developed by CNES for COTs-based Spacecraft Supercomputers.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Sandip Kundu, Ilia Polian	An Improved Technique for Reducing False Alarms Due to Soft Errors.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Daniele Rossi 0001, Martin Omaña 0001, Cecilia Metra, Andrea Pagni	Checker No-Harm Alarm Robustness.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Deepali Koppad, Danil Sokolov, Alexandre V. Bystrov, Alexandre Yakovlev	Online Testing by Protocol Decomposition.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Pavel Kubalík, Petr Fiser, Hana Kubátová	Fault Tolerant System Design Method Based on Self-Checking Circuits.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Petros Oikonomakos, Paul Fox	Error Correction in Arithmetic Operations by I/O Inversion.	IOLTS	2006	DBLP DOI BibTeX RDF
44	T. M. Mak, Subhasish Mitra	Should Logic SER be Solved at the Circuit Level?	IOLTS	2006	DBLP DOI BibTeX RDF
44	Tino Heijmen, Damien Giot, Philippe Roche	Factors That Impact the Critical Charge of Memory Elements.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Maico Cassel, Fernanda Lima Kastensmidt	Evaluating One-Hot Encoding Finite State Machines for SEU Reliability in SRAM-based FPGAs.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Swaroop Ghosh, Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy 0001	Delay Fault Localization in Test-Per-Scan BIST Using Built-In Delay Sensor.	IOLTS	2006	DBLP DOI BibTeX RDF	Test-per-scan BIST, delay sensor, fault diagnosis, fault localization, test point insertion
44	Riccardo Mariani, Peter Fuhrmann, Boris Vittorelli	Fault-Robust Microcontrollers for Automotive Applications.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Cristiano Lazzari, Ricardo A. L. Reis, Lorena Anghel	Phase-Locked Loop Automatic Layout Generation and Transient Fault Injection Analysis: A Case Study.	IOLTS	2006	DBLP DOI BibTeX RDF