Search results for "SoC"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
21	Tan Nguyen, Swathi T. Gurumani, Kyle Rupnow, Deming Chen	FCUDA-SoC: Platform Integration for Field-Programmable SoC with the CUDA-to-FPGA Compiler.	FPGA	2016	DBLP DOI BibTeX RDF
21	Luis D. Couto, Julien Schorsch, Marco M. Nicotra, Michel Kinnaert	SOC and SOH estimation for Li-ion batteries based on an equivalent hydraulic model. Part I: SOC and surface concentration estimation.	ACC	2016	DBLP DOI BibTeX RDF
21	Senwen Kan, Matthew Lam, Tyler Porter, Jennifer Dworak	A Case Study: Pre-Silicon SoC RAS Validation for NoC Server Processor.	MTV	2016	DBLP DOI BibTeX RDF
21	Chong-Yang Lin, Kuei-Ann Wen	MEMS resonator based thermometer SoC design in CMOS 0.18 μm standard process.	ISOCC	2016	DBLP DOI BibTeX RDF
21	Chia-Hong Jan, F. Al-amoody, H.-Y. Chang, T. Chang, Y.-W. Chen, N. Dias, Walid M. Hafez, Doug B. Ingerly, M. Jang, Eric Karl, S. K.-Y. Shi, K. Komeyli, H. Kilambi, A. Kumar, K. Byon, C.-G. Lee, J. Lee, T. Leo, P.-C. Liu, N. Nidhi, R. Olac-vaw, C. Petersburg, K. Phoa, Chetan Prasad, C. Quincy, R. Ramaswamy, T. Rana, L. Rockford, Aravinth Subramaniam, C. Tsai, Peter Vandervoorn, L. Yang, A. Zainuddin, Peng Bai	A 14 nm SoC platform technology featuring 2nd generation Tri-Gate transistors, 70 nm gate pitch, 52 nm metal pitch, and 0.0499 um2 SRAM cells, optimized for low power, high performance and high density SoC products.	VLSIC	2015	DBLP DOI BibTeX RDF
21	Taylor Holmes, Andrew Passerelli, John Connor	SoC Development and Prototype with VDK.	MTV	2015	DBLP DOI BibTeX RDF
21	Hannu Heusala, Jorma Skyttä	How small and still effective a CMOS-SoC could ever be?	NORCAS	2015	DBLP DOI BibTeX RDF
21	Mi-Kyung Oh, Jae-Young Kim 0002, Sangjae Lee, Youngae Jeon, Sangsung Choi	A fully integrated ieee IEEE 802.15.4g MR-FSK SoC soc for smart utility network applications.	IEEE Trans. Consumer Electron.	2014	DBLP DOI BibTeX RDF
21	Sofiane Lagraa	New MP-SoC profiling tools based on data mining techniques. (Nouveaux outils de profilage de MP-SoC basés sur des techniques de fouille de données).		2014	RDF
21	Elena Dubrova, Mats Näslund, Gunnar Carlsson, Ben J. M. Smeets	Keyed logic BIST for Trojan detection in SoC.	ISSoC	2014	DBLP DOI BibTeX RDF
21	Heinrich Milosiu, Frank Oehler	Sub-10 µW CMOS wake-up receiver IP for green SoC designs.	SoCC	2013	DBLP DOI BibTeX RDF
21	Roman P. Bazylevych, Lubov Bazylevych	Tutorial: Macro-modeling for solving SOC physical design automation problems.	SoCC	2013	DBLP DOI BibTeX RDF
21	Volker Politz	Plenary speaker: "Visions of future SoC design: Why heterogeneous architectures and power matter".	SoCC	2013	DBLP DOI BibTeX RDF
21	Carsten Elgert	Plenary speaker: "The pig in the poke? - Strategies to avoid unpleasant surprises with IP on your SoC".	SoCC	2013	DBLP DOI BibTeX RDF
21	Yiran Chen 0001, Qing Wu	Neuromorphic computing: A SoC scaling path for the next decades.	SoCC	2012	DBLP DOI BibTeX RDF
21	Yuejian Wu, Sandy Thomson, Han Sun, David Krause, Song Yu, George Kurio	"Free" Razor: A novel adaptive voltage scaling low power technique for data path SoC designs.	SoCC	2012	DBLP DOI BibTeX RDF
21	Vijay Sheshadri, Vishwani D. Agrawal, Prathima Agrawal	Optimal power-constrained SoC test schedules with customizable clock rates.	SoCC	2012	DBLP DOI BibTeX RDF
21	Upasna Vishnoi, Michael Meixner, Tobias G. Noll	An approach for quantitative optimization of highly efficient dedicated CORDIC macros as SoC building blocks.	SoCC	2012	DBLP DOI BibTeX RDF
21	Youngchan Lee, Namdo Kim, Jay B. Kim, Byeong Min	Millions to thousands issues through knowledge based SoC CDC verification.	ISOCC	2012	DBLP DOI BibTeX RDF
21	Hongbin Sun 0001, Longjun Liu, Qiubo Chen, Baolu Zhai, Nanning Zheng 0001	Design and implementation of a video display processing SoC for full HD LCD TV.	ISOCC	2012	DBLP DOI BibTeX RDF
21	Zhaohui Hu, Arnaud Pierres, Shiqing Hu, Chen Fang, Philippe Royannez, Eng Pek See, Yean Ling Hoon	Practical and efficient SOC verification flow by reusing IP testcase and testbench.	ISOCC	2012	DBLP DOI BibTeX RDF
21	Yeon-Ho Im, Seong-Hee Yim, Jay B. Kim	A web service for automated IP/SoC verification using computers on network.	ISOCC	2012	DBLP DOI BibTeX RDF
21	Tae-Yon Lee, Jung-Kyu Jung, Dong-Ki Min, Yoondong Park, Kwanghyuk Bae, Tae-Chan Kim 0002	Perspectives on 3D ToF sensor SoC integration for user interface application.	ISOCC	2012	DBLP DOI BibTeX RDF
21	Adolf Samir Abdallah	Conception de SoC à Base d'Horloges Abstraites : Vers l'Exploration d'Architectures en MARTE. (Clock Based SoC Design, Towards a Design Space Exploration in MARTE).		2011	RDF
21	Flavio De Paoli, Ioan Toma, Carlos Pedrinaci, Marcel Tilly	Introduction to the Fifth Workshop on Non-Functional Properties and Service Level Agreements Management in Service-Oriented Computing (NFPSLAM-SOC 2011).	ICSOC Workshops	2011	DBLP DOI BibTeX RDF
21	Yi-Li Lin, Alvin W. Y. Su	Functional verifications for SoC software/hardware co-design: From virtual platform to physical platform.	SoCC	2011	DBLP DOI BibTeX RDF
21	Yan Zhao, Nianxiong Tan, Kun Yang, Shupeng Zhong, Changyou Men	A single-phase energy metering SoC with IAS-DSP and ultra low power metering mode.	SoCC	2011	DBLP DOI BibTeX RDF
21	Jeffrey L. Burns	Technology trends and implications on SoC design.	SoCC	2011	DBLP DOI BibTeX RDF
21	Virendra Singh, Masahiro Fujita	Tutorial: "Post silicon debug of SOC designs".	SoCC	2011	DBLP DOI BibTeX RDF
21	Laung-Terng Wang	Luncheon Speaker: "Introduction to SoC testing".	SoCC	2011	DBLP DOI BibTeX RDF
21	Shawn S. H. Hsu, Ming-Hsien Tsai 0002	Low-noise amplifiers with robust ESD protection for RF SOC.	ISOCC	2011	DBLP DOI BibTeX RDF
21	Young-Nam Yun, Jae-Beom Kim, Nam-Do Kim, Byeong Min	Beyond UVM for practical SoC verification.	ISOCC	2011	DBLP DOI BibTeX RDF
21	Jörg Leukel, André Ludwig, Alex Norta	Introduction to the Second International Workshop on Service Oriented Computing in Logistics (SOC-LOG 2010).	ICSOC Workshops	2010	DBLP DOI BibTeX RDF
21	Lech Józwiak	Quality-driven SoC architecture synthesis for embedded applications.	SoCC	2010	DBLP DOI BibTeX RDF
21	Kaijian Shi	Low-power SOC implementation: What you need to know.	SoCC	2010	DBLP DOI BibTeX RDF
21	Tuyet-Trang Lam, Ricardo Citro	A multimedia content generation methodology in support to SOC decoder development and validation.	SoCC	2010	DBLP DOI BibTeX RDF
21	Jein-Shan Chen, Xin Chen, Shaohua Pan, Jiawei Zhang	Some characterizations for SOC-monotone and SOC-convex functions.	J. Glob. Optim.	2009	DBLP DOI BibTeX RDF
21	Michael Guarisco, Hassan Rabah, Yves Berviller, Serge Weber, Said Belkouch	FPGA-based SoC for transcoding H264/AVC-SVC with low latency and high bitrate entropy coding.	SoCC	2009	DBLP DOI BibTeX RDF
21	Kuen-Jong Lee, Si-Yuan Liang, Alan P. Su	A low-cost SOC debug platform based on on-chip test architectures.	SoCC	2009	DBLP DOI BibTeX RDF
21	Süleyman Sirri Demirsoy, Kellie Marks	SoC framework for FPGA: A case study of LTE PUSCH receiver.	SoCC	2009	DBLP DOI BibTeX RDF
21	Marc Molina, Xavier Aragonès, José Luis González 0001	Experimental analysis of substrate isolation techniques for RF-SOC integration.	SoCC	2009	DBLP DOI BibTeX RDF
21	Younsun Kim, Hong-Sik Kim, R. Lee, Sungho Kang 0001	FPGA-based verification methodology of SoC-type CMOS image signal processor.	SoCC	2009	DBLP DOI BibTeX RDF
21	Hui Geng, Weiqian Liang, Ming Dong	A speech recognition SoC based on ARM7-TDMI core and a MSAC co-processor.	SoCC	2009	DBLP DOI BibTeX RDF
21	Vijay K. Jain	3-D Heterogeneous SoC for detecting and filtering infected biological cells.	SoCC	2008	DBLP DOI BibTeX RDF
21	Alexander D. Peleg	"Future trends in PC computing and their implications to SoC".	SoCC	2008	DBLP DOI BibTeX RDF
21	Guang-Huei Lin, Ya-Nan Wen, Xiao-Long Wu, Sao-Jie Chen, Yu Hen Hu	Design of a SIMD multimedia SoC platform.	SoCC	2007	DBLP DOI BibTeX RDF
21	Prakash Srinivasan, Ali Ahmadinia, Ahmet T. Erdogan, Tughrul Arslan	Power estimation framework for single processor based SoC platform.	SoCC	2007	DBLP DOI BibTeX RDF
21	Jeong Hun Kim, Jeongwoo Park, Kwangjae Lee, Kyoungbum Kim, Kwang-Hyun Baek, Suki Kim	Surveillance camera SOC architecture using one-bit motion detection for portable applications.	SoCC	2007	DBLP DOI BibTeX RDF
21	Roshan Weerasekera, Li-Rong Zheng 0001, Dinesh Pamunuwa, Hannu Tenhunen	Early selection of system implementation choice among SoC, SoP and 3-D Integration.	SoCC	2007	DBLP DOI BibTeX RDF
21	Sumek Wisayataksin, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda	H.264/AVC decoder SoC towards the low cost mobile video player.	SoCC	2007	DBLP DOI BibTeX RDF
21	Prakash Srinivasan, Ali Ahmadinia, Ahmet T. Erdogan, Tughrul Arslan	Power evaluation of the arbitration policy for different on-chip bus based SoC platform.	SoCC	2007	DBLP DOI BibTeX RDF
21	Chi-Yi Yeh, Hung-Ming Chen, Li-Da Huang, Wei-Ting Wei, Chao-Hung Lu, Chien-Nan Jimmy Liu	Using power gating techniques in area-array SoC floorplan design.	SoCC	2007	DBLP DOI BibTeX RDF
21	Yuan Sun, Liter Siek	A spur-reduction technique in a fully integrated CMOS frequency synthesizer for 5-GHz WLAN SOC.	SoCC	2007	DBLP DOI BibTeX RDF
21	Kilhwan Kim, Unsun Cho, Seunghyun Lim, Youngcheol Chae, Yunho Jung, Gunhee Han, Jaeseok Kim	A 1.5V mixed signal biomedical SOC for implantable cardioverter defibrillators.	SoCC	2007	DBLP DOI BibTeX RDF
21	Haolu Xie, Siqiang Fan, Xin Wang 0031, Albert Z. Wang, Zhihua Wang, Hongyi Chen	A Pulse-Based Full-Band UWB Transceiver SoC in 0.18μm SiGe BiCMOS.	SoCC	2006	DBLP DOI BibTeX RDF
21	Tongtong Chen, Zhengtao Yu 0002, Yuantao Peng, Yanbing Zhang, Huaiyu Dai, Xun Liu	A Mimo Receiver SOC for CDMA Applications.	SoCC	2006	DBLP DOI BibTeX RDF
21	Zhenyu Qi, Wei Huang 0004, Adam C. Cabe, Wenqian Wu, Yan Zhang 0028, Garrett S. Rose, Mircea R. Stan	A Design Methodology for a Low-Power, Temperature-Aware SoC Developed for Medical Image Processors.	SoCC	2006	DBLP DOI BibTeX RDF
21	Raj Varada, Simon Tarn, John Benoit, Kris Chou	SOC Design Challenges in a Multi-threaded 65nm Dual Core Xeon® MP Processor.	SoCC	2006	DBLP DOI BibTeX RDF
21	Alan P. Su, Robert Chen	Applying ESL in A Dual-Core SoC Platform Designing.	SoCC	2006	DBLP DOI BibTeX RDF
21	Deepak Mathaikutty, Sandeep K. Shukla	SoC Design Space Exploration through Automated IP Selection from SystemC IP Library.	SoCC	2006	DBLP DOI BibTeX RDF
21	Wonseok Oh 0002, Bertan Bakkaloglu, Bhaskar Aravind, Siew Kuok Hoon	A CMOS Low-Noise, Low-Dropout Regulator for Transceiver SOC Supply Management.	SoCC	2006	DBLP DOI BibTeX RDF
21	Karen Chow, David Abercrombie, Mark Basel	Method for Managing Electromigration in SOC'S When Designing for Both Reliability and Manufacturing.	SoCC	2006	DBLP DOI BibTeX RDF
21	N. Dakwala	Silicon Debug and DFT for SOC IP.	SoCC	2006	DBLP DOI BibTeX RDF
21	Dan Zhao 0001, Yi Wang 0007	MTNET: Design and Optimization of a Wireless SOC Test Framework.	SoCC	2006	DBLP DOI BibTeX RDF
21	Huang-Liang Chen, Hung-Ming Chen	On Achieving Low-Power SoC Clock Tree Synthesis by Transition Time Planning via Buffer Library Study.	SoCC	2006	DBLP DOI BibTeX RDF
21	Ming-Ching Lu, Meng-Chen Wu, Hung-Ming Chen, Iris Hui-Ru Jiang	Performance Constraints Aware Voltage Islands Generation in SoC Floorplan Design.	SoCC	2006	DBLP DOI BibTeX RDF
21	Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla	A Trace Based Framework for Validation of SoC Designs with GALS Systems.	SoCC	2006	DBLP DOI BibTeX RDF
21	Mikhail Popovich, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin	On-Chip Power Noise Reduction Techniques in High Performance SoC-Based Integrated Circuits.	SoCC	2005	DBLP DOI BibTeX RDF
21	Amir Hekmatpour, Kenneth Goodnow, Hemen Shah	Standards-compliant IP-based ASIC and SoC design.	SoCC	2005	DBLP DOI BibTeX RDF
21	Nan Wang, Magdy A. Bayoumi	Dynamic fraction control bus: new SOC on-chip communication architecture design.	SoCC	2005	DBLP DOI BibTeX RDF
21	Sangwook Cho, Jaehoon Song, Hyunbean Yi, Sungju Park	Hybrid test data compression technique for SOC scan testing.	SoCC	2005	DBLP DOI BibTeX RDF
21	Kaijian Shi, Hichem Belhadj	A Clock Isolation Method For Complex SoC Designs.	SoCC	2005	DBLP DOI BibTeX RDF
21	Suresh Srinivasan, Federico Angiolini, Martino Ruggiero, Luca Benini, Narayanan Vijaykrishnan	Simultaneous memory and bus partitioning for SoC architectures.	SoCC	2005	DBLP DOI BibTeX RDF
21	Soujanna Sarkar, Subash Chandar G., Sanjay Shinde	Effective IP reuse for high quality SOC design.	SoCC	2005	DBLP DOI BibTeX RDF
21	José Camargo da Costa, Adson Ferreira da Rocha, Leonardo R. A. X. de Menezes, Ricardo Pezzuol Jacobi, Alexandre R. S. Romariz, R. R. P. Soares, Gilmar S. Beserra, J. D. Costa, Genival Mariano de Araujo, W. A. Araujo, J. C. Sd. S. Marra, W. A. Amaral, P. R. O. Vogel, A. L. da Silva, A. Jd. O. Martins, L. R. Povoa	CMOS SoC for irrigation control.	SoCC	2005	DBLP DOI BibTeX RDF
21	Ajay Joshi, Jeffrey A. Davis	Gigascale ASIC/SoC design using wave-pipelined multiplexed (WPM) routing.	SoCC	2005	DBLP DOI BibTeX RDF
21	Vijay K. Jain, Sanjukta Bhanja, Glenn H. Chapman, Lavanya Doddannagari	A highly reconfigurable computing array: DSP plane of a 3D heterogeneous SoC.	SoCC	2005	DBLP DOI BibTeX RDF
21	Alberto Donato, Fabrizio Ferrandi, Marco D. Santambrogio, Donatella Sciuto	Operating system support for dynamically reconfigurable SoC architectures.	SoCC	2005	DBLP DOI BibTeX RDF
21	Jun Cheng Chi, Tsung Hui Huang, Mely Chen Chi	An IR drop-driven placer for standard cells in a SOC design.	SoCC	2005	DBLP DOI BibTeX RDF
21	Vinita V. Deodhar, Jeffrey A. Davis	Designing for signal integrity in wave-pipelined SOC global interconnects.	SoCC	2005	DBLP DOI BibTeX RDF
21	Saiyu Ren, Ray Siferd, Robert Blumgold	Parallel time interleaved delta sigma band pass analog to digital converter for SOC applications.	SoCC	2004	DBLP DOI BibTeX RDF
21	Makoto Saen, Motohiro Nakagawa, Junichi Nishimoto, Tomoyuki Kodama, Fumio Arakawa	Transparent SOC: on-chip analyzing techniques and implementation for embedded processor.	SoCC	2004	DBLP DOI BibTeX RDF
21	Vishal Gupta 0003, Gabriel A. Rincón-Mora, Prasun Raha	Analysis and design of monolithic, high PSR, linear regulators for SoC applications.	SoCC	2004	DBLP DOI BibTeX RDF
21	Wonjae Lee, Sangyun Hwang, Minho Kwon, Seongjoo Lee, Jaeseok Kim	SoC design of remote terminals for wireless telemetry system.	SoCC	2004	DBLP DOI BibTeX RDF
21	Pascal Nsame, Yvon Savaria	Multi-processor SoC integration: a case study on BlueGene/L.	SoCC	2004	DBLP DOI BibTeX RDF
21	Gerard Boudon, Alan Wall, Joe Foster, Barry Wolford, John Fakiris	A 800 MHz PowerPC SOC with PCI-X DDR266, DDRII-667, and RAID assist.	SoCC	2004	DBLP DOI BibTeX RDF
21	K. Brock, C. Edwards, R. Lannoo, Ulf Schlichtmann, Antun Domic, Jacques Benkoski, David Overhauser, M. Kliment	Power Crisis in SoC Design: Strategies for Constructing Low-Power, High-Performance SoC Designs.	DATE	2002	DBLP DOI BibTeX RDF
21	Amer Baghdadi	Exploration et conception systématique d'architectures multiprocesseurs monopuces dédiées à des applications spécifiques = methods and tools for multiprocessor systems on chip, hardware/software co-designExploration and Systematic Design of Application-Specific Heterogeneous Multiprocessor SoC. (Exploration and Systematic Design of Application-Specific Heterogeneous Multiprocessor SoC).		2002	RDF
21	Samy Meftali	Exploration d'architectures et allocation/affectation mémoire dans les systèmes multiprocesseurs mono puce = Architectures exploration and memory allocation/assignment in multiprocessor SoC. (Architectures exploration and memory allocation/assignment in multiprocessor SoC).		2002	RDF
21	Grant Martin	Surviving the SOC Revolution: The Platform Approach to SOC Design.	VLSI Design	2000	DBLP DOI BibTeX RDF
20	Rafael H. Bordini, Antônio Carlos da Rocha Costa, Jomi Fred Hübner, Álvaro F. Moreira, Fabio Y. Okuyama, Renata Vieira	MAS-SOC: a Social Simulation Platform Based on Agent-Oriented Programming.	J. Artif. Soc. Soc. Simul.	2005	DBLP BibTeX RDF
19	Suman Kalyan Mandal, Ron Denton, Saraju P. Mohanty, Rabi N. Mahapatra	Low power nanoscale buffer management for network on chip routers.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	nanoscale technology noc, soc, noc, router, dynamic power management
19	P. Ezudheen, Priya Chandran, Joy Chandra, Biju Puthur Simon, Deepak Ravi	Parallelizing SystemC Kernel for Fast Hardware Simulation on SMP Machines.	PADS	2009	DBLP DOI BibTeX RDF	OSCI, Core affinity, SoC, SystemC, SMP, TLM
19	Roy Chaoming Hsu, Yaw-Yu Lee, Bin-Wen Kao, Din-Yuen Chan	Hardware Design of Shape-Preserving Contour Tracing for Object of Segmented Images.	PSIVT	2009	DBLP DOI BibTeX RDF	AMBA bus, SOC, Boundary Extraction, Contour Tracing
19	Shu-Hsuan Chou, Chien-Chih Chen, Chi-Neng Wen, Yi-Chao Chan, Tien-Fu Chen, Chao-Ching Wang, Jinn-Shyan Wang	No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips.	DAC	2009	DBLP DOI BibTeX RDF	level-1 non-uniform cache architecture, ring interconnection, single-cycle transactions, multi-core, NOC, SOC, arbitration, memory structure
19	John Mark Nolen, Rabi N. Mahapatra	Time-Division-Multiplexed Test Delivery for NoC Systems.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF	scan test delivery, SoC, NoC, TAM, time-division multiplexing, test access mechanism, embedded-core testing, TDM
19	Haresh Luthria, Fethi A. Rabhi	Organizational Constraints to Realizing Business Value from Service Oriented Architectures: An Empirical Study of Financial Service Institutions.	ICSOC	2008	DBLP DOI BibTeX RDF	Organizational Constraints, SOA, Service Oriented, Technology Adoption, SOC, Business Value, Technology Diffusion
19	Peter Bollen	Service-Oriented Conceptual Modeling.	OTM Workshops	2008	DBLP DOI BibTeX RDF	CogNIAM, Fact-orientation, Service-oriented Architecture, SOA, Conceptual Modeling, Business Process Management, Service-oriented Computing, SOC, ORM, NIAM
19	Wolfgang Klingauf, Robert Günzel, Christian Schröder	Embedded software development on top of transaction-level models.	CODES+ISSS	2007	DBLP DOI BibTeX RDF	hardware-software communication, middleware, SoC, embedded software, SystemC, HPC, TLM
19	Fei He 0001, Xiaoyu Song, Ming Gu 0001, Jiaguang Sun 0001	Effective heuristics for counterexample-guided abstraction refinement.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	model checking, verification, heuristics, SoC, abstraction