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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 1539 publication records. Showing 1539 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
9 | Alvernon Walker |
A Step Response Based Mixed-Signal BIST Approach . ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 24-26 October 2001, San Francisco, CA, USA, Proceedings, pp. 329-337, 2001, IEEE Computer Society, 0-7695-1203-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
9 | Wei-Cheng Lai, Jing-Reng Huang, Kwang-Ting (Tim) Cheng |
Embedded-Software-Based Approach to Testing Crosstalk-Induced Faults at On-Chip Buses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA, USA, pp. 204-209, 2001, IEEE Computer Society, 0-7695-1122-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
9 | Janusz Sosnowski, Tomasz Bech |
Testing Arithmetic Coprocessor in System Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France, pp. 752, 2000, IEEE Computer Society / ACM, 0-7695-0537-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
9 | Marly Roncken, Ken S. Stevens, Rajesh Pendurkar, Shai Rotem, Parimal Pal Chaudhuri |
CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2-6 April 2000, Eilat, Israel, pp. 62-72, 2000, IEEE Computer Society, 0-7695-0586-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
pulse logic, switch-level fault simulation, Cellular Automata, BIST, asynchronous circuits, testability, stuck-at faults, domino logic, self-timed circuits, dynamic circuits |
9 | Chuang Cheng, Chih-Tsun Huang, Jing-Reng Huang, Cheng-Wen Wu, Chen-Jong Wey, Ming-Chang Tsai |
BRAINS: A BIST Compiler for Embedded Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 25-27 October 2000, Yamanashi, Japan, Proceedings, pp. 299-, 2000, IEEE Computer Society, 0-7695-0719-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
9 | Jeongjin Roh, Jacob A. Abraham |
A Comprehensive TDM Comparator Scheme for Effective Analysis of Oscillation-Based Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 18th IEEE VLSI Test Symposium (VTS 2000), 30 April - 4 May 2000, Montreal, Canada, pp. 143-148, 2000, IEEE Computer Society, 0-7695-0613-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
oscillation test, BIST, signature, analog, time-division multiplexing, comparator, mixed-signal |
9 | Laurence Goodby, Alex Orailoglu |
Redundancy and testability in digital filter datapaths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(5), pp. 631-644, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Samir Boubezari, Eduard Cerny, Bozena Kaminska, Benoit Nadeau-Dostie |
Testability analysis and test-point insertion in RTL VHDL specifications for scan-based BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(9), pp. 1327-1340, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi |
Novel Control Pattern Generators for Interconnect Testing with Boundary Scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), November 1-3, 1999, Albuquerque, NM, USA, Proceedings, pp. 112-120, 1999, IEEE Computer Society, 0-7695-0325-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
BIST, boundary scan, Interconnect testing |
9 | Ishwar Parulkar, Sandeep K. Gupta 0001, Melvin A. Breuer |
Allocation Techniques for Reducing BIST Area Overhead of Data Paths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 13(2), pp. 149-166, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
9 | José M. Miranda |
A BIST and Boundary-Scan Economics Framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 14(3), pp. 17-23, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
9 | Christian Dufaza, Yervant Zorian |
On the generation of pseudo-deterministic two-patterns test sequence with LFSRs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ED&TC ![In: European Design and Test Conference, ED&TC '97, Paris, France, 17-20 March 1997, pp. 69-76, 1997, IEEE Computer Society, 0-8186-7786-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
9 | Shyue-Kung Lu, Jen-Chuan Wang, Cheng-Wen Wu |
C-testable design techniques for iterative logic arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 3(1), pp. 146-152, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
9 | Steve Vinoski |
RISE++: A Symbolic Environment for Scan-Based Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 10(2), pp. 56-68, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
9 | David R. Tryon |
Self-testing with correlated faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, NV, USA, June, 1986., pp. 374-377, 1986, IEEE Computer Society Press. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
|
9 | Kanad Chakraborty, Shriram Kulkarni, Mayukh Bhattacharya, Pinaki Mazumder, Anurag Gupta |
A physical design tool for built-in self-repairable RAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 9(2), pp. 352-364, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
9 | Sorin Liviu Jurj, Raul Rotar |
Increasing the Solar Reliability Factor of a Dual-Axis Solar Tracker Using an Improved Online Built-In Self-Test Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 12, pp. 37715-37730, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
9 | Mohsen Askarzadeh, Majid Haghparast, Sam Jabbehdari |
Power consumption reduction in built-in self-test circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Ambient Intell. Humaniz. Comput. ![In: J. Ambient Intell. Humaniz. Comput. 14(2), pp. 1109-1122, February 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
9 | Irith Pomeranz |
Storage and Counter Based Logic Built-In Self-Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 139335-139344, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
9 | Irith Pomeranz |
Storage-Based Logic Built-In Self-Test With Partitioned Deterministic Compressed Tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 31(9), pp. 1259-1268, September 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
9 | Arjun Chaudhuri, Sanmitra Banerjee, Jinwoo Kim, Sung Kyu Lim, Krishnendu Chakrabarty |
Built-In Self-Test of High-Density and Realistic ILV Layouts in Monolithic 3-D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 31(3), pp. 296-309, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
9 | Xiangyu Li, Pengjun Wang, Gang Li, Yuejun Zhang |
Design of a Novel Self-Test-on-Chip Interface ASIC for Capacitive Accelerometers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 70(7), pp. 2834-2843, July 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
9 | Irith Pomeranz |
Storage-Based Logic Built-In Self-Test With Cyclic Tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(9), pp. 3118-3122, September 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
9 | Ya Hai, Fei Liu, Yongshan Wang, Jing Kang |
An all-digital built-in-self-test scheme for duty cycle corrector with de-skew circuit in NAND Flash memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 141, pp. 105947, November 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
9 | Yan Li, Weifeng Yang, Jiang Li, Yanfang Yuan, Hu Zhang, Fengdi Wang, Yijun Cui |
Dynamic self-test scheme and authentication protocol for improving robustness of strong PUF. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 139, pp. 105864, September 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
9 | Nicola Ferrante, Francesco Terrosi, Luca Maruccio, Francesco Rossi, Luca Fanucci, Andrea Bondavalli |
HUSTLE: A Hardware Unit for Self-test-Libraries Efficient Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ApplePies ![In: Applications in Electronics Pervading Industry, Environment and Society - APPLEPIES 2023, Genoa, Italy, 28-29 September 2023., pp. 392-398, 2023, Springer, 978-3-031-48120-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
9 | Hao Cheng, Chi-Jhe Li, Hung-Lin Chen, Jiun-Lang Huang |
BDD-Based Self-Test Program Generation for Processor Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC-Asia ![In: IEEE International Test Conference in Asia, ITC-Asia 2023, Matsue, Japan, September 12-14, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-1281-2. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
9 | Riccardo Cantoro, Sandro Sartoni, Matteo Sonza Reorda, Lorena Anghel, Michele Portolan |
Evaluating the Impact of Aging on Path-Delay Self-Test Libraries. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023, Juan-Les-Pins, France, October 3-5, 2023, pp. 1-7, 2023, IEEE, 979-8-3503-1500-4. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
9 | Subashini Gopalsamy, Irith Pomeranz |
Fully Deterministic Storage Based Logic Built-In Self-Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 41st IEEE VLSI Test Symposium, VTS 2023, San Diego, CA, USA, April 24-26, 2023, pp. 1-7, 2023, IEEE, 979-8-3503-4630-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
9 | Yunfei Gu, Xingyu Wang, Zixiao Chen, Chentao Wu, Xinfei Guo, Jie Li 0002, Minyi Guo, Song Wu, Rong Yuan, Taile Zhang, Yawen Zhang, Haoran Cai |
Improving Productivity and Efficiency of SSD Manufacturing Self-Test Process by Learning-Based Proactive Defect Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: IEEE International Test Conference, ITC 2023, Anaheim, CA, USA, October 7-15, 2023, pp. 226-235, 2023, IEEE, 979-8-3503-4325-0. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
9 | Ireneusz Mrozek, Nikolai A. Shevchenko, Vyacheslav N. Yarmolik |
Universal Address Sequence Generator for Memory Built-in Self-test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Fundam. Informaticae ![In: Fundam. Informaticae 188(1), pp. 41-61, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Yiming Yu, Dong Chen, Xiaoning Zhang, Chenxi Zhao, Huihua Liu, Yunqiu Wu, Wen-Yan Yin, Kai Kang |
A Ku-Band Eight-Element Phased-Array Transmitter With Built-in Self-Test Capability in 180-nm CMOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 30(6), pp. 694-705, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Ying Hou, Jianyu Fu, Chao Liu, Yihong Lu, Zhenfeng Li, Dapeng Chen |
A Time-Efficient Self-Test Method for Evaluating Thermal Parameters of Uncooled Infrared Detectors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Instrum. Meas. ![In: IEEE Trans. Instrum. Meas. 71, pp. 1-8, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Irith Pomeranz |
Storage-Based Logic Built-in Self-Test With Multicycle Tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(10), pp. 3553-3557, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Brett Sparkman, Scott C. Smith, Jia Di |
Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits using Pipeline Stage Parallelism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 38(3), pp. 321-334, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Mehmet Ince, Bora Bilgic, Sule Ozev |
Digital Fault-based Built-in Self-test and Evaluation of Low Dropout Voltage Regulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 18(3), pp. 54:1-54:20, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Dilip Kumar Maity, Surajit Kumar Roy, Chandan Giri |
A Cost-Effective Built-In Self-Test Mechanism for Post-Manufacturing TSV Defects in 3D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 18(4), pp. 70:1-70:23, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Arjun Chaudhuri, Sanmitra Banerjee, Jinwoo Kim, Heechun Park, Bon Woong Ku, Sukeshwar Kannan, Krishnendu Chakrabarty, Sung Kyu Lim |
Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 18(1), pp. 22:1-22:37, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Ireneusz Mrozek, Nikolai A. Shevchenko, Vyacheslav N. Yarmolik |
Universal Address Sequence Generator for Memory Built-in Self-test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2208.05325, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Honghao Fu |
Constant-sized correlations are sufficient to self-test maximally entangled states with unbounded dimension. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Quantum ![In: Quantum 6, pp. 614, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Riccardo Cantoro, Francesco Garau, Patrick Girard 0001, Nima Kolahimahmoudi, Sandro Sartoni, Matteo Sonza Reorda, Arnaud Virazel |
Effective techniques for automatically improving the transition delay fault coverage of Self-Test Libraries. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: IEEE European Test Symposium, ETS 2022, Barcelona, Spain, May 23-27, 2022, pp. 1-2, 2022, IEEE, 978-1-6654-6706-3. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Youssef Abdelkareem, Islam Nasr, Lobna Nassar, Fakhri Karray |
COVID-19 Self-Test Guidance System For Swab Collection Using Deep Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SMC ![In: IEEE International Conference on Systems, Man, and Cybernetics, SMC 2022, Prague, Czech Republic, October 9-12, 2022, pp. 2350-2357, 2022, IEEE, 978-1-6654-5258-8. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Gayatri Malhotra, Punithavathi Duraiswamy, J. K. Kishore |
GA Evolved Configuration Data for Embryonic Architecture with Built-in Self-test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISDA (1) ![In: Intelligent Systems Design and Applications - 22nd International Conference on Intelligent Systems Design and Applications (ISDA 2022) Held December 12-14, 2022 - Volume 1, pp. 34-43, 2022, Springer, 978-3-031-27439-8. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Mona Ganji, Marampally Saikiran, Degang Chen 0001 |
All Digital Low-Overhead SAR ADC Built-In Self-Test for Fault Detection and Diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 40th IEEE VLSI Test Symposium, VTS 2022, San Diego, CA, USA, April 25-27, 2022, pp. 1-7, 2022, IEEE, 978-1-6654-1060-1. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Takumi Uezono, Yi He 0010, Yanjing Li |
Achieving Automotive Safety Requirements through Functional In-Field Self-Test for Deep Learning Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: IEEE International Test Conference, ITC 2022, Anaheim, CA, USA, September 23-30, 2022, pp. 465-473, 2022, IEEE, 978-1-6654-6270-9. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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9 | Masato Kohtani, Tomotoshi Murakami, Yoshiyuki Utagawa, Tomoyuki Arai, Shinji Yamaura |
76- to 81-GHz CMOS Built-In Self-Test With 72-dB C/N and Less Than 1 ppm Frequency Tolerance for Multi-Channel Radar Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 56(5), pp. 1345-1359, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | |
Bit-swapping linear feedback shift register (LFSR) for power reduction using pre-charged XOR with multiplexer technique in built in self-test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Ambient Intell. Humaniz. Comput. ![In: J. Ambient Intell. Humaniz. Comput. 12(6), pp. 6367-6373, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | Ahmed S. Emara, Denis Romanov, Gordon W. Roberts, Sadok Aouini, Soheyl Ziabakhsh, Mahdi Parvizi, Naim Ben-Hamida |
An Area-Efficient High-Resolution Segmented ΣΔ-DAC for Built-In Self-Test Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 29(11), pp. 1861-1874, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | Lanhua Xia, Jifei Tang |
All-digital built-in self-test scheme for charge-pump phase-locked loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Circuits Devices Syst. ![In: IET Circuits Devices Syst. 15(1), pp. 1-10, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | Vasudevan Madampu Suryasarman, Santosh Biswas, Aryabartta Sahu |
Fragmented software-based self-test technique for online intermittent fault detection in processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Comput. Digit. Tech. ![In: IET Comput. Digit. Tech. 15(1), pp. 56-76, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | Antonios Pavlidis, Marie-Minerve Louërat, Eric Faehn, Anand Kumar, Haralampos-G. Stratigopoulos |
SymBIST: Symmetry-Based Analog and Mixed-Signal Built-In Self-Test for Functional Safety. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 68(6), pp. 2580-2593, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | Irith Pomeranz |
Storage-Based Built-In Self-Test for Gate-Exhaustive Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(10), pp. 2189-2193, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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9 | Mehmet Ince, Ender Yilmaz, Wei Fu, Joonsung Park, Krishnaswamy Nagaraj, LeRoy Winemberg, Sule Ozev |
Fault-based Built-in Self-test and Evaluation of Phase Locked Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 26(3), pp. 20:1-20:18, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | Linda Mansson, Pernilla Bäckman, Fredrik Öhberg, Jonas Sandlund, Jonas Selling, Marlene Sandlund |
Evaluation of Concurrent Validity between a Smartphone Self-Test Prototype and Clinical Instruments for Balance and Leg Strength. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 21(5), pp. 1765, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | Fanruo Meng, Fateme S. Hosseini, Chengmo Yang |
A Self-Test Framework for Detecting Fault-induced Accuracy Drop in Neural Network Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, Tokyo, Japan, January 18-21, 2021, pp. 722-727, 2021, ACM, 978-1-4503-7999-1. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | Haochen Wu, Xilong Shen, Hailong Ma, Chencheng Yu, Jian Zhao 0004 |
Mismatch of nonlinear stiffness in differential MEMS resonating sensors and its self-test and calibration technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTA ![In: 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2021, Zhuhai, China, November 24-26, 2021, pp. 195-196, 2021, IEEE, 978-1-6654-1745-7. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | Max Bothe, Christoph Meinel |
The Impact of Mobile Learning on Students' Self-Test Behavior in MOOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
L@S ![In: L@S'21: Eighth ACM Conference on Learning @ Scale, Virtual Event, Germany, June 22-25, 2021., pp. 251-254, 2021, ACM, 978-1-4503-8215-1. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | Riccardo Cantoro, Patrick Girard 0001, Riccardo Masante, Sandro Sartoni, Matteo Sonza Reorda, Arnaud Virazel |
Self-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage Improvement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 27th IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2021, Torino, Italy, June 28-30, 2021, pp. 1-4, 2021, IEEE, 978-1-6654-3370-9. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | Anuraag Narang, Balaji Venn, S. Saqib Khursheed, Peter Harrod |
An Exploration of Microprocessor Self-Test Optimisation Based On Safe Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021, pp. 1-6, 2021, IEEE, 978-1-6654-1609-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | Irith Pomeranz |
Zoom-In Feature for Storage-Based Logic Built-In Self-Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021, pp. 1-6, 2021, IEEE, 978-1-6654-1609-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | Donghyun Han, Youngkwang Lee, Sooryeong Lee, Sungho Kang 0001 |
Hardware Efficient Built-in Self-test Architecture for Power and Ground TSVs in 3D IC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISOCC ![In: 18th International SoC Design Conference, ISOCC 2021, Jeju Island, South Korea, Republic of, October 6-9, 2021, pp. 101-102, 2021, IEEE, 978-1-6654-0174-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | Yi He 0010, Takumi Uezono, Yanjing Li |
Efficient Functional In-Field Self-Test for Deep Learning Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: IEEE International Test Conference, ITC 2021, Anaheim, CA, USA, October 10-15, 2021, pp. 93-102, 2021, IEEE, 978-1-6654-1695-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
9 | Yasuhiro Ogasahara, Yohei Hori, Toshihiro Katashita, Tomoki Iizuka, Hiromitsu Awano, Makoto Ikeda, Hanpei Koike |
Implementation of pseudo-linear feedback shift register-based physical unclonable functions on silicon and sufficient Challenge-Response pair acquisition using Built-In Self-Test before shipping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 71, pp. 144-153, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
9 | Zhangqing He, Wanbo Chen, Lingchao Zhang, Gaojun Chi, Qi Gao, Lein Harn |
A Highly Reliable Arbiter PUF With Improved Uniqueness in FPGA Implementation Using Bit-Self-Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 8, pp. 181751-181762, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
9 | Paolo Bernardi, Riccardo Cantoro, Sergio de Luca, Ernesto Sánchez 0001, Alessandro Sansonetti, Giovanni Squillero |
Software-Based Self-Test Techniques for Dual-Issue Embedded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Emerg. Top. Comput. ![In: IEEE Trans. Emerg. Top. Comput. 8(2), pp. 464-477, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
9 | Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik |
High-Level Implementation-Independent Functional Software-Based Self-Test for RISC Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 36(1), pp. 87-103, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
9 | Andrea Floridia, Tzamn Melendez Carmona, Davide Piumatti, Annachiara Ruospo, Ernesto Sánchez 0001, Sergio de Luca, Rosario Martorana, Mose Alessandro Pernice |
Deterministic Cache-based Execution of On-line Self-Test Routines in Multi-core Automotive System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020, pp. 1235-1240, 2020, IEEE, 978-3-9819263-4-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
9 | Panos Ioakim, Iasonas F. Triantis |
On-Demand MEMS Accelerometer Dynamic Response Acquisition and Output Dithering via Self Test Pin Actuation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE SENSORS ![In: 2020 IEEE Sensors, Rotterdam, The Netherlands, October 25-28, 2020, pp. 1-3, 2020, IEEE, 978-1-7281-6801-2. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
9 | Manhong Zhu, Jia Li 0022, Weibing Wang, Dapeng Chen |
A Built-In Self-Test Method For MEMS Piezoresistive Sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: IEEE European Test Symposium, ETS 2020, Tallinn, Estonia, May 25-29, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-4312-5. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
9 | Mehmet Ince, Sule Ozev |
Digital Defect Based Built-in Self-Test for Low Dropout Voltage Regulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: IEEE European Test Symposium, ETS 2020, Tallinn, Estonia, May 25-29, 2020, pp. 1-2, 2020, IEEE, 978-1-7281-4312-5. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
9 | Aishwarya Natarajan, Jennifer Hasler |
Built-in Self-Test of Vector Matrix Multipliers on a Reconfigurable Device. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020, pp. 1-5, 2020, IEEE, 978-1-7281-3320-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
9 | Brett Sparkman, Scott C. Smith, Jia Di |
Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 38th IEEE VLSI Test Symposium, VTS 2020, San Diego, CA, USA, April 5-8, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-5359-9. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
9 | Max Bothe, Jan Renz, Christoph Meinel |
On the Acceptance and Effects of Recapping Self-Test Questions in MOOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDUCON ![In: 2020 IEEE Global Engineering Education Conference, EDUCON 2020, Porto, Portugal, April 27-30, 2020, pp. 264-272, 2020, IEEE, 978-1-7281-0930-5. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
9 | Zeeshan Haider, Khalid Javeed, Mei Song, Xiaojun Wang 0001 |
A Low-Cost Self-Test Architecture Integrated With PRESENT Cipher Core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 46045-46058, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Edinei Santin, Luís B. Oliveira, João Goes |
Built-in self test of high speed analog-to-digital converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Instrum. Meas. Mag. ![In: IEEE Instrum. Meas. Mag. 22(6), pp. 4-10, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Dmitry V. Efanov, Valery V. Sapozhnikov, Vladimir V. Sapozhnikov, Dmitrii V. Pivovarov |
Synthesis of Built-in Self-Test Control Circuits Based on the Method of Boolean Complement to Constant-Weight 1-out-of-n Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Autom. Control. Comput. Sci. ![In: Autom. Control. Comput. Sci. 53(6), pp. 481-491, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Vasudevan Madampu Suryasarman, Santosh Biswas, Aryabartta Sahu |
RSBST: an Accelerated Automated Software-Based Self-Test Synthesis for Processor Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 35(5), pp. 695-714, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Osman Emir Erol, Sule Ozev |
Knowledge- and Simulation-Based Synthesis of Area-Efficient Passive Loop Filter Incremental Zoom-ADC for Built-In Self-Test Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 24(1), pp. 3:1-3:27, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Shu-Feng Cheng, Po-Tsang Huang, Li-Chun Wang 0001, Mau-Chung Frank Chang |
Built-In Self-Test/Repair Methodology for Multiband RF-Interconnected TSV 3D Integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test ![In: IEEE Des. Test 36(6), pp. 63-71, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Andrea Floridia, Gianmarco Mongano, Davide Piumatti, Ernesto Sánchez 0001 |
Hybrid on-line self-test architecture for computational units on embedded processor cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2019, Cluj-Napoca, Romania, April 24-26, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-0073-9. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Ching-Che Chung, Wei-Jung Chu, Yi-Ting Tsai |
Built-in Self-Test Circuits for All-digital Phase-Locked Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCE-TW ![In: IEEE International Conference on Consumer Electronics - Taiwan, ICCE-TW 2019, Yilan, Taiwan, May 20-22, 2019, pp. 1-2, 2019, IEEE, 978-1-7281-3279-2. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Michelangelo Grosso, Salvatore Rinaudo, Andrea Casalino, Matteo Sonza Reorda |
Software-Based Self-Test for Transition Faults: a Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: 27th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019, pp. 76-81, 2019, IEEE, 978-1-7281-3915-9. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Michelangelo Grosso, Matteo Sonza Reorda, Salvatore Rinaudo |
Software-Based Self-Test for Delay Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC (Selected Papers) ![In: VLSI-SoC: New Technology Enabler - 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6-9, 2019, Revised and Extended Selected Papers, pp. 1-19, 2019, Springer, 978-3-030-53272-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Paolo Bernardi, Riccardo Cantoro, Andrea Floridia, Davide Piumatti, C. Pogonea, Annachiara Ruospo, Ernesto Sánchez 0001, Sergio de Luca, Alessandro Sansonetti |
Non-Intrusive Self-Test Library for Automotive Critical Applications: Constraints and Solutions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Florence, Italy, March 25-29, 2019, pp. 920-923, 2019, IEEE, 978-3-9819263-2-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Wei-Hsuan Yang, Jin-Fu Li 0001, Chun-Lung Hsu, Chi-Tien Sun, Shih-Hsu Huang |
A Built-in Self-Test Scheme for TSVs of Logic-DRAM Stacked 3D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
3DIC ![In: 2019 International 3D Systems Integration Conference (3DIC), Sendai, Japan, October 8-10, 2019, pp. 1-3, 2019, IEEE, 978-1-7281-4870-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Arjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Bon Woong Ku, Krishnendu Chakrabarty, Sung Kyu Lim |
Built-in Self-Test for Inter-Layer Vias in Monolithic 3D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 24th IEEE European Test Symposium, ETS 2019, Baden-Baden, Germany, May 27-31, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-1173-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Mehmet Ince, Ender Yilmaz, Wei Fu, Joonsung Park, Krishnaswamy Nagaraj, LeRoy Winemberg, Sule Ozev |
Digital Built-in Self-Test for Phased Locked Loops to Enable Fault Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 24th IEEE European Test Symposium, ETS 2019, Baden-Baden, Germany, May 27-31, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-1173-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Ahmed E. Amer, Ahmed Ashry, Mohamed A. Y. Abdalla, Islam A. Eshrah |
Gilbert Based Power Detector for 5G mm-Wave Transceivers Built-in-Self Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pp. 1-5, 2019, IEEE, 978-1-7281-0397-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Andrea Floridia, Davide Piumatti, Annachiara Ruospo, Ernesto Sánchez 0001, Sergio de Luca, Rosario Martorana |
A Decentralized Scheduler for On-line Self-test Routines in Multi-core Automotive System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: IEEE International Test Conference, ITC 2019, Washington, DC, USA, November 9-15, 2019, pp. 1-10, 2019, IEEE, 978-1-7281-4823-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Vasudevan M. S, Santosh Biswas, Aryabartta Sahu |
RSBST: A Rapid Software-Based Self-Test Methodology for Processor Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSID ![In: 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, VLSID 2019, Delhi, India, January 5-9, 2019, pp. 112-117, 2019, IEEE, 978-1-7281-0409-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Sara Carbonara, Paolo Bernardi, Marco Restifo |
A Hybrid In-Field Self-Test Technique for SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DTIS ![In: 14th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, DTIS 2019, Mykonos, Greece, April 16-18, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-3424-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Aydin Dirican, Cagatay Ozmen, Martin Margala |
Leakage-Aware Droop Measurement Built-in Self-Test Circuit for Digital Low-Dropout Regulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 34(4), pp. 405-415, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
9 | Maryam Shafiee, Navankur Beohar, Priyanka Bakliwal, Sidhanto Roy, Debashis Mandal, Bertan Bakkaloglu, Sule Ozev |
A Disturbance-Free Built-In Self-Test and Diagnosis Technique for DC-DC Converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 23(2), pp. 25:1-25:22, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
9 | Andreas Helwig, Angelika Hackner, J. Gerhard Müller, Dario Zappa, Giorgio Sberveglieri |
Self-Test Procedures for Gas Sensors Embedded in Microreactor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 18(2), pp. 453, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
9 | Sanghoon Lee 0008, Congyin Shi, Jiafan Wang 0002, Adriana C. Sanabria-Borbon, Hatem Osman, Jiang Hu, Edgar Sánchez-Sinencio |
A Built-In Self-Test and In Situ Analog Circuit Optimization Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10), pp. 3445-3458, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
9 | Navankur Beohar, Venkata N. K. Malladi, Debashis Mandal, Sule Ozev, Bertan Bakkaloglu |
Online Built-In Self-Test of High Switching Frequency DC-DC Converters Using Model Reference Based System Identification Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(2), pp. 818-831, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
9 | Sebastian Nessler, Maximilian Marx 0002, Yiannos Manoli |
A Self-Test on Wafer Level for a MEM Gyroscope Readout Based on ΔΣ Modulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(3), pp. 870-880, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
9 | Tao Chen 0006, Xiankun Jin, Randall L. Geiger, Degang Chen 0001 |
USER-SMILE: Ultrafast Stimulus Error Removal and Segmented Model Identification of Linearity Errors for ADC Built-in Self-Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(7), pp. 2059-2069, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
9 | Jan Schat |
On-line RF built-in self-test using noise injection and transmitter signal modulation by phase shifter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, pp. 1003-1004, 2018, IEEE, 978-3-9819263-0-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
9 | Wenjian Ke, Yi Wang, Hong Zhou, Tie Li, Yuelin Wang |
Research on Self-Test Method Based on Thermopile Infrared Sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE SENSORS ![In: 2018 IEEE SENSORS, New Delhi, India, October 28-31, 2018, pp. 1-4, 2018, IEEE, 978-1-5386-4708-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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