Search results for "self-test"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
9	Alvernon Walker	A Step Response Based Mixed-Signal BIST Approach .	DFT	2001	DBLP DOI BibTeX RDF
9	Wei-Cheng Lai, Jing-Reng Huang, Kwang-Ting (Tim) Cheng	Embedded-Software-Based Approach to Testing Crosstalk-Induced Faults at On-Chip Buses.	VTS	2001	DBLP DOI BibTeX RDF
9	Janusz Sosnowski, Tomasz Bech	Testing Arithmetic Coprocessor in System Environment.	DATE	2000	DBLP DOI BibTeX RDF
9	Marly Roncken, Ken S. Stevens, Rajesh Pendurkar, Shai Rotem, Parimal Pal Chaudhuri	CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder.	ASYNC	2000	DBLP DOI BibTeX RDF	pulse logic, switch-level fault simulation, Cellular Automata, BIST, asynchronous circuits, testability, stuck-at faults, domino logic, self-timed circuits, dynamic circuits
9	Chuang Cheng, Chih-Tsun Huang, Jing-Reng Huang, Cheng-Wen Wu, Chen-Jong Wey, Ming-Chang Tsai	BRAINS: A BIST Compiler for Embedded Memories.	DFT	2000	DBLP DOI BibTeX RDF
9	Jeongjin Roh, Jacob A. Abraham	A Comprehensive TDM Comparator Scheme for Effective Analysis of Oscillation-Based Test.	VTS	2000	DBLP DOI BibTeX RDF	oscillation test, BIST, signature, analog, time-division multiplexing, comparator, mixed-signal
9	Laurence Goodby, Alex Orailoglu	Redundancy and testability in digital filter datapaths.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1999	DBLP DOI BibTeX RDF
9	Samir Boubezari, Eduard Cerny, Bozena Kaminska, Benoit Nadeau-Dostie	Testability analysis and test-point insertion in RTL VHDL specifications for scan-based BIST.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1999	DBLP DOI BibTeX RDF
9	Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi	Novel Control Pattern Generators for Interconnect Testing with Boundary Scan.	DFT	1999	DBLP DOI BibTeX RDF	BIST, boundary scan, Interconnect testing
9	Ishwar Parulkar, Sandeep K. Gupta 0001, Melvin A. Breuer	Allocation Techniques for Reducing BIST Area Overhead of Data Paths.	J. Electron. Test.	1998	DBLP DOI BibTeX RDF
9	José M. Miranda	A BIST and Boundary-Scan Economics Framework.	IEEE Des. Test Comput.	1997	DBLP DOI BibTeX RDF
9	Christian Dufaza, Yervant Zorian	On the generation of pseudo-deterministic two-patterns test sequence with LFSRs.	ED&TC	1997	DBLP DOI BibTeX RDF
9	Shyue-Kung Lu, Jen-Chuan Wang, Cheng-Wen Wu	C-testable design techniques for iterative logic arrays.	IEEE Trans. Very Large Scale Integr. Syst.	1995	DBLP DOI BibTeX RDF
9	Steve Vinoski	RISE++: A Symbolic Environment for Scan-Based Testing.	IEEE Des. Test Comput.	1993	DBLP DOI BibTeX RDF
9	David R. Tryon	Self-testing with correlated faults.	DAC	1986	DBLP DOI BibTeX RDF
9	Kanad Chakraborty, Shriram Kulkarni, Mayukh Bhattacharya, Pinaki Mazumder, Anurag Gupta	A physical design tool for built-in self-repairable RAMs.	IEEE Trans. Very Large Scale Integr. Syst.	2001	DBLP DOI BibTeX RDF
9	Sorin Liviu Jurj, Raul Rotar	Increasing the Solar Reliability Factor of a Dual-Axis Solar Tracker Using an Improved Online Built-In Self-Test Architecture.	IEEE Access	2024	DBLP DOI BibTeX RDF
9	Mohsen Askarzadeh, Majid Haghparast, Sam Jabbehdari	Power consumption reduction in built-in self-test circuits.	J. Ambient Intell. Humaniz. Comput.	2023	DBLP DOI BibTeX RDF
9	Irith Pomeranz	Storage and Counter Based Logic Built-In Self-Test.	IEEE Access	2023	DBLP DOI BibTeX RDF
9	Irith Pomeranz	Storage-Based Logic Built-In Self-Test With Partitioned Deterministic Compressed Tests.	IEEE Trans. Very Large Scale Integr. Syst.	2023	DBLP DOI BibTeX RDF
9	Arjun Chaudhuri, Sanmitra Banerjee, Jinwoo Kim, Sung Kyu Lim, Krishnendu Chakrabarty	Built-In Self-Test of High-Density and Realistic ILV Layouts in Monolithic 3-D ICs.	IEEE Trans. Very Large Scale Integr. Syst.	2023	DBLP DOI BibTeX RDF
9	Xiangyu Li, Pengjun Wang, Gang Li, Yuejun Zhang	Design of a Novel Self-Test-on-Chip Interface ASIC for Capacitive Accelerometers.	IEEE Trans. Circuits Syst. I Regul. Pap.	2023	DBLP DOI BibTeX RDF
9	Irith Pomeranz	Storage-Based Logic Built-In Self-Test With Cyclic Tests.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
9	Ya Hai, Fei Liu, Yongshan Wang, Jing Kang	An all-digital built-in-self-test scheme for duty cycle corrector with de-skew circuit in NAND Flash memory.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
9	Yan Li, Weifeng Yang, Jiang Li, Yanfang Yuan, Hu Zhang, Fengdi Wang, Yijun Cui	Dynamic self-test scheme and authentication protocol for improving robustness of strong PUF.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
9	Nicola Ferrante, Francesco Terrosi, Luca Maruccio, Francesco Rossi, Luca Fanucci, Andrea Bondavalli	HUSTLE: A Hardware Unit for Self-test-Libraries Efficient Execution.	ApplePies	2023	DBLP DOI BibTeX RDF
9	Hao Cheng, Chi-Jhe Li, Hung-Lin Chen, Jiun-Lang Huang	BDD-Based Self-Test Program Generation for Processor Cores.	ITC-Asia	2023	DBLP DOI BibTeX RDF
9	Riccardo Cantoro, Sandro Sartoni, Matteo Sonza Reorda, Lorena Anghel, Michele Portolan	Evaluating the Impact of Aging on Path-Delay Self-Test Libraries.	DFT	2023	DBLP DOI BibTeX RDF
9	Subashini Gopalsamy, Irith Pomeranz	Fully Deterministic Storage Based Logic Built-In Self-Test.	VTS	2023	DBLP DOI BibTeX RDF
9	Yunfei Gu, Xingyu Wang, Zixiao Chen, Chentao Wu, Xinfei Guo, Jie Li 0002, Minyi Guo, Song Wu, Rong Yuan, Taile Zhang, Yawen Zhang, Haoran Cai	Improving Productivity and Efficiency of SSD Manufacturing Self-Test Process by Learning-Based Proactive Defect Prediction.	ITC	2023	DBLP DOI BibTeX RDF
9	Ireneusz Mrozek, Nikolai A. Shevchenko, Vyacheslav N. Yarmolik	Universal Address Sequence Generator for Memory Built-in Self-test.	Fundam. Informaticae	2022	DBLP DOI BibTeX RDF
9	Yiming Yu, Dong Chen, Xiaoning Zhang, Chenxi Zhao, Huihua Liu, Yunqiu Wu, Wen-Yan Yin, Kai Kang	A Ku-Band Eight-Element Phased-Array Transmitter With Built-in Self-Test Capability in 180-nm CMOS Technology.	IEEE Trans. Very Large Scale Integr. Syst.	2022	DBLP DOI BibTeX RDF
9	Ying Hou, Jianyu Fu, Chao Liu, Yihong Lu, Zhenfeng Li, Dapeng Chen	A Time-Efficient Self-Test Method for Evaluating Thermal Parameters of Uncooled Infrared Detectors.	IEEE Trans. Instrum. Meas.	2022	DBLP DOI BibTeX RDF
9	Irith Pomeranz	Storage-Based Logic Built-in Self-Test With Multicycle Tests.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
9	Brett Sparkman, Scott C. Smith, Jia Di	Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits using Pipeline Stage Parallelism.	J. Electron. Test.	2022	DBLP DOI BibTeX RDF
9	Mehmet Ince, Bora Bilgic, Sule Ozev	Digital Fault-based Built-in Self-test and Evaluation of Low Dropout Voltage Regulators.	ACM J. Emerg. Technol. Comput. Syst.	2022	DBLP DOI BibTeX RDF
9	Dilip Kumar Maity, Surajit Kumar Roy, Chandan Giri	A Cost-Effective Built-In Self-Test Mechanism for Post-Manufacturing TSV Defects in 3D ICs.	ACM J. Emerg. Technol. Comput. Syst.	2022	DBLP DOI BibTeX RDF
9	Arjun Chaudhuri, Sanmitra Banerjee, Jinwoo Kim, Heechun Park, Bon Woong Ku, Sukeshwar Kannan, Krishnendu Chakrabarty, Sung Kyu Lim	Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICs.	ACM J. Emerg. Technol. Comput. Syst.	2022	DBLP DOI BibTeX RDF
9	Ireneusz Mrozek, Nikolai A. Shevchenko, Vyacheslav N. Yarmolik	Universal Address Sequence Generator for Memory Built-in Self-test.	CoRR	2022	DBLP DOI BibTeX RDF
9	Honghao Fu	Constant-sized correlations are sufficient to self-test maximally entangled states with unbounded dimension.	Quantum	2022	DBLP DOI BibTeX RDF
9	Riccardo Cantoro, Francesco Garau, Patrick Girard 0001, Nima Kolahimahmoudi, Sandro Sartoni, Matteo Sonza Reorda, Arnaud Virazel	Effective techniques for automatically improving the transition delay fault coverage of Self-Test Libraries.	ETS	2022	DBLP DOI BibTeX RDF
9	Youssef Abdelkareem, Islam Nasr, Lobna Nassar, Fakhri Karray	COVID-19 Self-Test Guidance System For Swab Collection Using Deep Learning.	SMC	2022	DBLP DOI BibTeX RDF
9	Gayatri Malhotra, Punithavathi Duraiswamy, J. K. Kishore	GA Evolved Configuration Data for Embryonic Architecture with Built-in Self-test.	ISDA (1)	2022	DBLP DOI BibTeX RDF
9	Mona Ganji, Marampally Saikiran, Degang Chen 0001	All Digital Low-Overhead SAR ADC Built-In Self-Test for Fault Detection and Diagnosis.	VTS	2022	DBLP DOI BibTeX RDF
9	Takumi Uezono, Yi He 0010, Yanjing Li	Achieving Automotive Safety Requirements through Functional In-Field Self-Test for Deep Learning Accelerators.	ITC	2022	DBLP DOI BibTeX RDF
9	Masato Kohtani, Tomotoshi Murakami, Yoshiyuki Utagawa, Tomoyuki Arai, Shinji Yamaura	76- to 81-GHz CMOS Built-In Self-Test With 72-dB C/N and Less Than 1 ppm Frequency Tolerance for Multi-Channel Radar Applications.	IEEE J. Solid State Circuits	2021	DBLP DOI BibTeX RDF
9		Bit-swapping linear feedback shift register (LFSR) for power reduction using pre-charged XOR with multiplexer technique in built in self-test.	J. Ambient Intell. Humaniz. Comput.	2021	DBLP DOI BibTeX RDF
9	Ahmed S. Emara, Denis Romanov, Gordon W. Roberts, Sadok Aouini, Soheyl Ziabakhsh, Mahdi Parvizi, Naim Ben-Hamida	An Area-Efficient High-Resolution Segmented ΣΔ-DAC for Built-In Self-Test Applications.	IEEE Trans. Very Large Scale Integr. Syst.	2021	DBLP DOI BibTeX RDF
9	Lanhua Xia, Jifei Tang	All-digital built-in self-test scheme for charge-pump phase-locked loops.	IET Circuits Devices Syst.	2021	DBLP DOI BibTeX RDF
9	Vasudevan Madampu Suryasarman, Santosh Biswas, Aryabartta Sahu	Fragmented software-based self-test technique for online intermittent fault detection in processors.	IET Comput. Digit. Tech.	2021	DBLP DOI BibTeX RDF
9	Antonios Pavlidis, Marie-Minerve Louërat, Eric Faehn, Anand Kumar, Haralampos-G. Stratigopoulos	SymBIST: Symmetry-Based Analog and Mixed-Signal Built-In Self-Test for Functional Safety.	IEEE Trans. Circuits Syst. I Regul. Pap.	2021	DBLP DOI BibTeX RDF
9	Irith Pomeranz	Storage-Based Built-In Self-Test for Gate-Exhaustive Faults.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2021	DBLP DOI BibTeX RDF
9	Mehmet Ince, Ender Yilmaz, Wei Fu, Joonsung Park, Krishnaswamy Nagaraj, LeRoy Winemberg, Sule Ozev	Fault-based Built-in Self-test and Evaluation of Phase Locked Loops.	ACM Trans. Design Autom. Electr. Syst.	2021	DBLP DOI BibTeX RDF
9	Linda Mansson, Pernilla Bäckman, Fredrik Öhberg, Jonas Sandlund, Jonas Selling, Marlene Sandlund	Evaluation of Concurrent Validity between a Smartphone Self-Test Prototype and Clinical Instruments for Balance and Leg Strength.	Sensors	2021	DBLP DOI BibTeX RDF
9	Fanruo Meng, Fateme S. Hosseini, Chengmo Yang	A Self-Test Framework for Detecting Fault-induced Accuracy Drop in Neural Network Accelerators.	ASP-DAC	2021	DBLP DOI BibTeX RDF
9	Haochen Wu, Xilong Shen, Hailong Ma, Chencheng Yu, Jian Zhao 0004	Mismatch of nonlinear stiffness in differential MEMS resonating sensors and its self-test and calibration technique.	ICTA	2021	DBLP DOI BibTeX RDF
9	Max Bothe, Christoph Meinel	The Impact of Mobile Learning on Students' Self-Test Behavior in MOOCs.	L@S	2021	DBLP DOI BibTeX RDF
9	Riccardo Cantoro, Patrick Girard 0001, Riccardo Masante, Sandro Sartoni, Matteo Sonza Reorda, Arnaud Virazel	Self-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage Improvement.	IOLTS	2021	DBLP DOI BibTeX RDF
9	Anuraag Narang, Balaji Venn, S. Saqib Khursheed, Peter Harrod	An Exploration of Microprocessor Self-Test Optimisation Based On Safe Faults.	DFT	2021	DBLP DOI BibTeX RDF
9	Irith Pomeranz	Zoom-In Feature for Storage-Based Logic Built-In Self-Test.	DFT	2021	DBLP DOI BibTeX RDF
9	Donghyun Han, Youngkwang Lee, Sooryeong Lee, Sungho Kang 0001	Hardware Efficient Built-in Self-test Architecture for Power and Ground TSVs in 3D IC.	ISOCC	2021	DBLP DOI BibTeX RDF
9	Yi He 0010, Takumi Uezono, Yanjing Li	Efficient Functional In-Field Self-Test for Deep Learning Accelerators.	ITC	2021	DBLP DOI BibTeX RDF
9	Yasuhiro Ogasahara, Yohei Hori, Toshihiro Katashita, Tomoki Iizuka, Hiromitsu Awano, Makoto Ikeda, Hanpei Koike	Implementation of pseudo-linear feedback shift register-based physical unclonable functions on silicon and sufficient Challenge-Response pair acquisition using Built-In Self-Test before shipping.	Integr.	2020	DBLP DOI BibTeX RDF
9	Zhangqing He, Wanbo Chen, Lingchao Zhang, Gaojun Chi, Qi Gao, Lein Harn	A Highly Reliable Arbiter PUF With Improved Uniqueness in FPGA Implementation Using Bit-Self-Test.	IEEE Access	2020	DBLP DOI BibTeX RDF
9	Paolo Bernardi, Riccardo Cantoro, Sergio de Luca, Ernesto Sánchez 0001, Alessandro Sansonetti, Giovanni Squillero	Software-Based Self-Test Techniques for Dual-Issue Embedded Processors.	IEEE Trans. Emerg. Top. Comput.	2020	DBLP DOI BibTeX RDF
9	Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik	High-Level Implementation-Independent Functional Software-Based Self-Test for RISC Processors.	J. Electron. Test.	2020	DBLP DOI BibTeX RDF
9	Andrea Floridia, Tzamn Melendez Carmona, Davide Piumatti, Annachiara Ruospo, Ernesto Sánchez 0001, Sergio de Luca, Rosario Martorana, Mose Alessandro Pernice	Deterministic Cache-based Execution of On-line Self-Test Routines in Multi-core Automotive System-on-Chips.	DATE	2020	DBLP DOI BibTeX RDF
9	Panos Ioakim, Iasonas F. Triantis	On-Demand MEMS Accelerometer Dynamic Response Acquisition and Output Dithering via Self Test Pin Actuation.	IEEE SENSORS	2020	DBLP DOI BibTeX RDF
9	Manhong Zhu, Jia Li 0022, Weibing Wang, Dapeng Chen	A Built-In Self-Test Method For MEMS Piezoresistive Sensor.	ETS	2020	DBLP DOI BibTeX RDF
9	Mehmet Ince, Sule Ozev	Digital Defect Based Built-in Self-Test for Low Dropout Voltage Regulators.	ETS	2020	DBLP DOI BibTeX RDF
9	Aishwarya Natarajan, Jennifer Hasler	Built-in Self-Test of Vector Matrix Multipliers on a Reconfigurable Device.	ISCAS	2020	DBLP DOI BibTeX RDF
9	Brett Sparkman, Scott C. Smith, Jia Di	Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits.	VTS	2020	DBLP DOI BibTeX RDF
9	Max Bothe, Jan Renz, Christoph Meinel	On the Acceptance and Effects of Recapping Self-Test Questions in MOOCs.	EDUCON	2020	DBLP DOI BibTeX RDF
9	Zeeshan Haider, Khalid Javeed, Mei Song, Xiaojun Wang 0001	A Low-Cost Self-Test Architecture Integrated With PRESENT Cipher Core.	IEEE Access	2019	DBLP DOI BibTeX RDF
9	Edinei Santin, Luís B. Oliveira, João Goes	Built-in self test of high speed analog-to-digital converters.	IEEE Instrum. Meas. Mag.	2019	DBLP DOI BibTeX RDF
9	Dmitry V. Efanov, Valery V. Sapozhnikov, Vladimir V. Sapozhnikov, Dmitrii V. Pivovarov	Synthesis of Built-in Self-Test Control Circuits Based on the Method of Boolean Complement to Constant-Weight 1-out-of-n Codes.	Autom. Control. Comput. Sci.	2019	DBLP DOI BibTeX RDF
9	Vasudevan Madampu Suryasarman, Santosh Biswas, Aryabartta Sahu	RSBST: an Accelerated Automated Software-Based Self-Test Synthesis for Processor Testing.	J. Electron. Test.	2019	DBLP DOI BibTeX RDF
9	Osman Emir Erol, Sule Ozev	Knowledge- and Simulation-Based Synthesis of Area-Efficient Passive Loop Filter Incremental Zoom-ADC for Built-In Self-Test Applications.	ACM Trans. Design Autom. Electr. Syst.	2019	DBLP DOI BibTeX RDF
9	Shu-Feng Cheng, Po-Tsang Huang, Li-Chun Wang 0001, Mau-Chung Frank Chang	Built-In Self-Test/Repair Methodology for Multiband RF-Interconnected TSV 3D Integration.	IEEE Des. Test	2019	DBLP DOI BibTeX RDF
9	Andrea Floridia, Gianmarco Mongano, Davide Piumatti, Ernesto Sánchez 0001	Hybrid on-line self-test architecture for computational units on embedded processor cores.	DDECS	2019	DBLP DOI BibTeX RDF
9	Ching-Che Chung, Wei-Jung Chu, Yi-Ting Tsai	Built-in Self-Test Circuits for All-digital Phase-Locked Loops.	ICCE-TW	2019	DBLP DOI BibTeX RDF
9	Michelangelo Grosso, Salvatore Rinaudo, Andrea Casalino, Matteo Sonza Reorda	Software-Based Self-Test for Transition Faults: a Case Study.	VLSI-SoC	2019	DBLP DOI BibTeX RDF
9	Michelangelo Grosso, Matteo Sonza Reorda, Salvatore Rinaudo	Software-Based Self-Test for Delay Faults.	VLSI-SoC (Selected Papers)	2019	DBLP DOI BibTeX RDF
9	Paolo Bernardi, Riccardo Cantoro, Andrea Floridia, Davide Piumatti, C. Pogonea, Annachiara Ruospo, Ernesto Sánchez 0001, Sergio de Luca, Alessandro Sansonetti	Non-Intrusive Self-Test Library for Automotive Critical Applications: Constraints and Solutions.	DATE	2019	DBLP DOI BibTeX RDF
9	Wei-Hsuan Yang, Jin-Fu Li 0001, Chun-Lung Hsu, Chi-Tien Sun, Shih-Hsu Huang	A Built-in Self-Test Scheme for TSVs of Logic-DRAM Stacked 3D ICs.	3DIC	2019	DBLP DOI BibTeX RDF
9	Arjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Bon Woong Ku, Krishnendu Chakrabarty, Sung Kyu Lim	Built-in Self-Test for Inter-Layer Vias in Monolithic 3D ICs.	ETS	2019	DBLP DOI BibTeX RDF
9	Mehmet Ince, Ender Yilmaz, Wei Fu, Joonsung Park, Krishnaswamy Nagaraj, LeRoy Winemberg, Sule Ozev	Digital Built-in Self-Test for Phased Locked Loops to Enable Fault Detection.	ETS	2019	DBLP DOI BibTeX RDF
9	Ahmed E. Amer, Ahmed Ashry, Mohamed A. Y. Abdalla, Islam A. Eshrah	Gilbert Based Power Detector for 5G mm-Wave Transceivers Built-in-Self Test.	ISCAS	2019	DBLP DOI BibTeX RDF
9	Andrea Floridia, Davide Piumatti, Annachiara Ruospo, Ernesto Sánchez 0001, Sergio de Luca, Rosario Martorana	A Decentralized Scheduler for On-line Self-test Routines in Multi-core Automotive System-on-Chips.	ITC	2019	DBLP DOI BibTeX RDF
9	Vasudevan M. S, Santosh Biswas, Aryabartta Sahu	RSBST: A Rapid Software-Based Self-Test Methodology for Processor Testing.	VLSID	2019	DBLP DOI BibTeX RDF
9	Sara Carbonara, Paolo Bernardi, Marco Restifo	A Hybrid In-Field Self-Test Technique for SoCs.	DTIS	2019	DBLP DOI BibTeX RDF
9	Aydin Dirican, Cagatay Ozmen, Martin Margala	Leakage-Aware Droop Measurement Built-in Self-Test Circuit for Digital Low-Dropout Regulators.	J. Electron. Test.	2018	DBLP DOI BibTeX RDF
9	Maryam Shafiee, Navankur Beohar, Priyanka Bakliwal, Sidhanto Roy, Debashis Mandal, Bertan Bakkaloglu, Sule Ozev	A Disturbance-Free Built-In Self-Test and Diagnosis Technique for DC-DC Converters.	ACM Trans. Design Autom. Electr. Syst.	2018	DBLP DOI BibTeX RDF
9	Andreas Helwig, Angelika Hackner, J. Gerhard Müller, Dario Zappa, Giorgio Sberveglieri	Self-Test Procedures for Gas Sensors Embedded in Microreactor Systems.	Sensors	2018	DBLP DOI BibTeX RDF
9	Sanghoon Lee 0008, Congyin Shi, Jiafan Wang 0002, Adriana C. Sanabria-Borbon, Hatem Osman, Jiang Hu, Edgar Sánchez-Sinencio	A Built-In Self-Test and In Situ Analog Circuit Optimization Platform.	IEEE Trans. Circuits Syst. I Regul. Pap.	2018	DBLP DOI BibTeX RDF
9	Navankur Beohar, Venkata N. K. Malladi, Debashis Mandal, Sule Ozev, Bertan Bakkaloglu	Online Built-In Self-Test of High Switching Frequency DC-DC Converters Using Model Reference Based System Identification Techniques.	IEEE Trans. Circuits Syst. I Regul. Pap.	2018	DBLP DOI BibTeX RDF
9	Sebastian Nessler, Maximilian Marx 0002, Yiannos Manoli	A Self-Test on Wafer Level for a MEM Gyroscope Readout Based on ΔΣ Modulation.	IEEE Trans. Circuits Syst. I Regul. Pap.	2018	DBLP DOI BibTeX RDF
9	Tao Chen 0006, Xiankun Jin, Randall L. Geiger, Degang Chen 0001	USER-SMILE: Ultrafast Stimulus Error Removal and Segmented Model Identification of Linearity Errors for ADC Built-in Self-Test.	IEEE Trans. Circuits Syst. I Regul. Pap.	2018	DBLP DOI BibTeX RDF
9	Jan Schat	On-line RF built-in self-test using noise injection and transmitter signal modulation by phase shifter.	DATE	2018	DBLP DOI BibTeX RDF
9	Wenjian Ke, Yi Wang, Hong Zhou, Tie Li, Yuelin Wang	Research on Self-Test Method Based on Thermopile Infrared Sensor.	IEEE SENSORS	2018	DBLP DOI BibTeX RDF