|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 9063 occurrences of 3443 keywords
|
|
|
Results
Found 16149 publication records. Showing 16145 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
19 | Wenping Wang, Shengqi Yang, Yu Cao 0001 |
Node Criticality Computation for Circuit Timing Analysis and Optimization under NBTI Effect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 763-768, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Aaron P. Hurst, Alan Mishchenko, Robert K. Brayton |
Scalable min-register retiming under timing and initializability constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 534-539, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
min-area, retiming, initial state, sequential optimization |
19 | Sanjay V. Kumar, Chandramouli V. Kashyap, Sachin S. Sapatnekar |
A framework for block-based timing sensitivity analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 688-693, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
pruning, variations, reordering, slacks, arrival times |
19 | Vishal Khandelwal, Ankur Srivastava 0001 |
A Quadratic Modeling-Based Framework for Accurate Statistical Timing Analysis Considering Correlations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 15(2), pp. 206-215, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | B. Lasbouygues, Robin Wilson, Nadine Azémard, Philippe Maurine |
Temperature- and Voltage-Aware Timing Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(4), pp. 801-815, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Chao-Yang Yeh, Malgorzata Marek-Sadowska |
Timing-Aware Power-Noise Reduction in Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(3), pp. 527-541, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Murari Mani, Anirudh Devgan, Michael Orshansky, Yaping Zhan |
A Statistical Algorithm for Power- and Timing-Limited Parametric Yield Optimization of Large Integrated Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(10), pp. 1790-1802, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | José A. Lopez-Salcedo, Gregori Vázquez |
Waveform-Independent Frame-Timing Acquisition for UWB Signals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 55(1), pp. 279-289, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Sinan Gezici, Andreas F. Molisch, H. Vincent Poor, Hisashi Kobayashi |
The Tradeoff Between Processing Gains of an Impulse Radio UWB System in the Presence of Timing Jitter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Commun. ![In: IEEE Trans. Commun. 55(8), pp. 1504-1515, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Crineu Tres, Leandro Buss Becker, Edgar Nett |
Real-Time Tasks Scheduling with Value Control to Predict Timing Faults During Overload. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISORC ![In: Tenth IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC 2007), 7-9 May 2007, Santorini Island, Greece, pp. 354-358, 2007, IEEE Computer Society, 0-7695-2765-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Songmei Han |
The Effect of Animation Location and Timing on Visual Search Performance and Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HCI (13) ![In: Engineering Psychology and Cognitive Ergonomics, 7th International Conference, EPCE 2007, Held as Part of HCI International 2007, Beijing, China, July 22-27, 2007, Proceedings, pp. 69-78, 2007, Springer, 978-3-540-73330-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
signal detection theory, animation, visual search, visual attention, online advertisement |
19 | Tobias Bjerregaard, Mikkel Bystrup Stensgaard, Jens Sparsø |
A scalable, timing-safe, network-on-chip architecture with an integrated clock distribution method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 648-653, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Feng Wang 0004, Yuan Xie 0001, Hai Ju |
A novel criticality computation method in statistical timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 1611-1616, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Andrew Bortz, Dan Boneh |
Exposing private information by timing web applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WWW ![In: Proceedings of the 16th International Conference on World Wide Web, WWW 2007, Banff, Alberta, Canada, May 8-12, 2007, pp. 621-628, 2007, ACM, 978-1-59593-654-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
web browser design, privacy, phishing, web application security, web spoofing |
19 | Lei Cheng 0001, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig |
Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007, pp. 370-375, 2007, IEEE Computer Society, 1-4244-1382-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Jennifer L. Wong, Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava 0001, Miodrag Potkonjak |
Statistical timing analysis using Kernel smoothing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings, pp. 97-102, 2007, IEEE, 1-4244-1258-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Venkataraman Mahalingam, N. Ranganathan |
Variation Aware Timing Based Placement Using Fuzzy Programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 327-332, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada |
OPC-Friendly De-Compaction with Timing Constraints for Standard Cell Layouts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 776-781, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Smruti R. Sarangi, Brian Greskamp, Josep Torrellas |
A Model for Timing Errors in Processors with Parameter Variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 647-654, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Suchismita Roy, P. P. Chakrabarti 0001, Pallab Dasgupta |
Bounded Delay Timing Analysis Using Boolean Satisfiability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 295-302, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Jin-Tai Yan, Bo-Yi Chiang |
Timing-Constrained Yield-Driven Wiring Reconstruction for Critical Area Minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 899-906, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Anton Wijs |
Achieving Discrete Relative Timing with Untimed Process Algebra. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECCS ![In: 12th International Conference on Engineering of Complex Computer Systems (ICECCS 2007), 10-14 July 2007, Auckland, New Zealand, pp. 35-46, 2007, IEEE Computer Society, 978-0-7695-2895-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Anand Ramalingam, Ashish Kumar Singh, Sani R. Nassif, Michael Orshansky, David Z. Pan |
Accurate Waveform Modeling using Singular Value Decomposition with Applications to Timing Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 148-153, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Marco Di Natale |
Virtual Platforms and Timing Analysis: Status, Challenges and Future Directions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 551-555, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Zhuo Feng, Peng Li 0001, Yaping Zhan |
Fast Second-Order Statistical Static Timing Analysis Using Parameter Dimension Reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 244-249, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Lerong Cheng, Jinjun Xiong, Lei He 0001 |
Non-Linear Statistical Static Timing Analysis for Non-Gaussian Variation Sources. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 250-255, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Jeongho Park, Jihyung Kim 0001, Myonghee Park, Kyunbyoung Ko, Changeon Kang, Daesik Hong |
Performance analysis of channel estimation for OFDM systems with residual timing offset. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Wirel. Commun. ![In: IEEE Trans. Wirel. Commun. 5(7), pp. 1622-1625, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Soroush Abbaspour, Massoud Pedram, Amir H. Ajami, Chandramouli V. Kashyap |
Fast Interconnect and Gate Timing Analysis for Performance Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(12), pp. 1383-1388, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Jens Vygen |
Slack in static timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(9), pp. 1876-1885, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Debjit Sinha, Hai Zhou 0001 |
Statistical Timing Analysis With Coupling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12), pp. 2965-2975, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Dionysios Kouroussis, Rubil Ahmadi, Farid N. Najm |
Voltage-Aware Static Timing Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10), pp. 2156-2169, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Liuqing Yang 0001 |
Timing PPM-UWB signals in ad hoc multiaccess. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Sel. Areas Commun. ![In: IEEE J. Sel. Areas Commun. 24(4), pp. 794-800, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Hlaing Minn, Vijay K. Bhargava, Khaled Ben Letaief |
A combined timing and frequency synchronization and channel estimation for OFDM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Commun. ![In: IEEE Trans. Commun. 54(3), pp. 416-422, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Soroush Abbaspour, Hanif Fatemi, Massoud Pedram |
Non-gaussian statistical interconnect timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 533-538, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada |
Timing-driven cell layout de-compaction for yield optimization by critical area minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 884-889, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Kai Richter |
The AUTOSAR Timing Model - Status and Challenges -. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISoLA ![In: Leveraging Applications of Formal Methods, Second International Symposium, ISoLA 2006, Paphos, Cyprus, 15-19 November 2006, pp. 9-10, 2006, IEEE Computer Society, 978-0-7695-3071-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Shahin Nazarian, Massoud Pedram, Tao Lin, Emre Tuncer |
CGTA: current gain-based timing analysis for logic cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 67-72, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Fei Hu 0001, Carter May, Xiaojun Cao |
Data Aggregation in Distributed Sensor Networks: Towards An Adaptive Timing Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Third International Conference on Information Technology: New Generations (ITNG 2006), 10-12 April 2006, Las Vegas, Nevada, USA, pp. 256-261, 2006, IEEE Computer Society, 0-7695-2497-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Debjit Sinha, DiaaEldin Khalil, Yehea I. Ismail, Hai Zhou 0001 |
A timing dependent power estimation framework considering coupling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 401-407, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Xiaoji Ye, Peng Li 0001, Frank Liu 0001 |
Practical variation-aware interconnect delay and slew analysis for statistical timing verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 54-59, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Mi-Kyung Oh, Byunghoo Jung, Dong-Jo Park |
Low-complexity hop timing synchronization in frequency hopping systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Jin-Tai Yan, Yen-Hsiang Chen, Chia-Fang Lee, Ming-Ching Huang |
Multilevel timing-constrained full-chip routing in hierarchical quad-grid model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Lei Wang 0003, Shuo Wang |
Adaptive timing for analysis of skew tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | William R. Roberts, Dimitrios Velenis |
Effects of process and environmental variations on timing characteristics of clocked registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006, pp. 165-168, 2006, ACM, 1-59593-347-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Sanghoan Chang, Gwan Choi |
Timing Failure Analysis of Commercial CPUs Under Operating Stress. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 4-6 October 2006, Arlington, Virginia, USA, pp. 245-253, 2006, IEEE Computer Society, 0-7695-2706-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Boris Köpf, David A. Basin |
Timing-Sensitive Information Flow Analysis for Synchronous Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESORICS ![In: Computer Security - ESORICS 2006, 11th European Symposium on Research in Computer Security, Hamburg, Germany, September 18-20, 2006, Proceedings, pp. 243-262, 2006, Springer, 3-540-44601-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Richard Putman, Rahul Gawde |
Enhanced Timing-Based Transition Delay Testing for Small Delay Defects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 24th IEEE VLSI Test Symposium (VTS 2006), 30 April - 4 May 2006, Berkeley, California, USA, pp. 336-342, 2006, IEEE Computer Society, 0-7695-2514-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Jayashree Sridharan, Tom Chen 0001 |
Gate Delay Modeling with Multiple Input Switching for Static (Statistical) Timing Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 323-328, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Shiyan Hu, Qiuyang Li, Jiang Hu, Peng Li 0001 |
Steiner network construction for timing critical nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 379-384, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Steiner network, routing, redundancy, interconnect |
19 | Wei-Shen Wang, Vladik Kreinovich, Michael Orshansky |
Statistical timing based on incomplete probabilistic descriptions of parameter uncertainty. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 161-166, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Kosuke Sekiyama, Katsuhiro Suzuki, Shigeru Fukunaga, Masaaki Date |
Communication Timing Control based on Coupled-Phase Dynamics Coordination. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AICT/ICIW ![In: Advanced International Conference on Telecommunications and International Conference on Internet and Web Applications and Services (AICT/ICIW 2006), 19-25 February 2006, Guadeloupe, French Caribbean, pp. 33, 2006, IEEE Computer Society, 0-7695-2522-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Aaron B. Wagner, Venkat Anantharam |
Zero-rate reliability of the exponential-server timing channel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Inf. Theory ![In: IEEE Trans. Inf. Theory 51(2), pp. 447-465, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Muzhou Shao, Youxin Gao, Li-Pen Yuan, Martin D. F. Wong |
IR Drop and Ground Bounce Awareness Timing Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), New Frontiers in VLSI Design, 11-12 May 2005, Tampa, FL, USA, pp. 226-231, 2005, IEEE Computer Society, 0-7695-2365-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Yuantao Peng, Xun Liu |
RITC: Repeater Insertion with Timing Target Compensation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), New Frontiers in VLSI Design, 11-12 May 2005, Tampa, FL, USA, pp. 299-300, 2005, IEEE Computer Society, 0-7695-2365-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Kunhyuk Kang, Bipul Chandra Paul, Kaushik Roy 0001 |
Statistical Timing Analysis using Levelized Covariance Propagation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 764-769, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Masanori Hashimoto, Junji Yamaguchi, Takashi Sato, Hidetoshi Onodera |
Timing analysis considering temporal supply voltage fluctuation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 1098-1101, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Anand Ramalingam, Bin Zhang 0011, Anirudh Devgan, David Z. Pan |
Sleep transistor sizing using timing criticality and temporal currents. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 1094-1097, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | James Frye, James Gonzalo King, Christine J. Wilson, Frederick C. Harris Jr. |
QQ: Nanoscale Timing and Profiling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Chaojun Dong, Zhiyong Liu, Zulian Qiu |
Urban Traffic Signal Timing Optimization Based on Multi-layer Chaos Neural Networks Involving Feedback. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNC (1) ![In: Advances in Natural Computation, First International Conference, ICNC 2005, Changsha, China, August 27-29, 2005, Proceedings, Part I, pp. 340-344, 2005, Springer, 3-540-28323-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Cristiano Santos, Daniel Lima Ferrão, Ricardo Reis 0001, José Luís Güntzel |
Incremental timing optimization for automatic layout generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 3567-3570, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Jin-Tai Yan, Tzu-Ya Wang, Yu-Cheng Lee |
Timing-driven Steiner tree construction based on feasible assignment of hidden Steiner points. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 1370-1373, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Jun Hu, Xiaofeng Yu, Yan Zhang 0007, Tian Zhang 0001, Xuandong Li, Guoliang Zheng |
Checking Component-Based Embedded Software Designs for Scenario-Based Timing Specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing - EUC 2005, International Conference EUC 2005, Nagasaki, Japan, December 6-9, 2005, Proceedings, pp. 395-404, 2005, Springer, 3-540-30807-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
embedded software designs, real-time systems, model checking, UML sequence diagrams, interface automata |
19 | Zonghua Gu 0001 |
Timing Analysis of Distributed End-to-End Task Graphs with Model-Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing - EUC 2005, International Conference EUC 2005, Nagasaki, Japan, December 6-9, 2005, Proceedings, pp. 214-223, 2005, Springer, 3-540-30807-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Chung-Kuan Tsai, Malgorzata Marek-Sadowska |
An Interconnect Insensitive Linear Time-Varying Driver Model for Static Timing Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 654-661, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Pai Peng, Peng Ning, Douglas S. Reeves, Xinyuan Wang 0005 |
Active Timing-Based Correlation of Perturbed Traffic Flows with Chaff Packets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCS Workshops ![In: 25th International Conference on Distributed Computing Systems Workshops (ICDCS 2005 Workshops), 6-10 June 2005, Columbus, OH, USA, pp. 107-113, 2005, IEEE Computer Society, 0-7695-2328-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Rensheng Wang, Hongbin Li 0001, Tao Li 0016 |
Code-timing estimation for CDMA systems with bandlimited chip waveforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Wirel. Commun. ![In: IEEE Trans. Wirel. Commun. 3(4), pp. 1338-1349, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Qinghua Liu, Bo Hu 0006, Malgorzata Marek-Sadowska |
Individual wire-length prediction with application to timing-driven placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 12(10), pp. 1004-1014, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Masanori Hashimoto, Yuji Yamada, Hidetoshi Onodera |
Equivalent waveform propagation for static timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(4), pp. 498-508, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Yungseon Eo, Seongkyun Shin, William R. Eisenstadt, Jongin Shim |
A decoupling technique for efficient timing analysis of VLSI interconnects with dynamic circuit switching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(9), pp. 1321-1337, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Bogdan Tutuianu, Ross Baldick, Mark S. Johnstone |
Nonlinear driver models for timing and noise analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(11), pp. 1510-1521, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Taisuke Izumi, Akinori Saitoh, Toshimitsu Masuzawa |
Timed Uniform Consensus Resilient to Crash and Timing Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: 2004 International Conference on Dependable Systems and Networks (DSN 2004), 28 June - 1 July 2004, Florence, Italy, Proceedings, pp. 243-252, 2004, IEEE Computer Society, 0-7695-2052-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Ko Yoshikawa, Yasuhiko Hagihara, Keisuke Kanamaru, Yuichi Nakamura 0002, Shigeto Inui, Takeshi Yoshimura |
Timing optimization by replacing flip-flops to latches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 186-191, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Luca Formaggio, Franco Fummi, Graziano Pravadelli |
A timing-accurate HW/SW co-simulation of an ISS with SystemC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2004, Stockholm, Sweden, September 8-10, 2004, pp. 152-157, 2004, ACM, 1-58113-937-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
co-simulation, system level modeling |
19 | Jos C. M. Baeten, Michel A. Reniers |
Timed Process Algebra (With a Focus on Explicit Termination and Relative-Timing). ![Search on Bibsonomy](Pics/bibsonomy.png) |
SFM ![In: Formal Methods for the Design of Real-Time Systems, International School on Formal Methods for the Design of Computer, Communication and Software Systems, SFM-RT 2004, Bertinoro, Italy, September 13-18, 2004, Revised Lectures, pp. 59-97, 2004, Springer, 3-540-23068-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Chunyan Yu, Wu Haihong, Minghui Wu 0001 |
A complete model for collaborative virtual environment integrating extended fuzzy-timing Petri nets with role and agent technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SMC (6) ![In: Proceedings of the IEEE International Conference on Systems, Man & Cybernetics: The Hague, Netherlands, 10-13 October 2004, pp. 5503-5508, 2004, IEEE, 0-7803-8566-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Olivier Omedes, Michel Robert, Mohammed Ramdani |
A flexibility aware budgeting for hierarchical flow timing closure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 261-266, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Andrew B. Kahng, Qinke Wang |
An analytic placer for mixed-size placement and timing-driven placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 565-572, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Debjit Sinha, Hai Zhou 0001 |
Gate sizing for crosstalk reduction under timing constraints by Lagrangian relaxation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 14-19, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Chirayu S. Amin, Florentin Dartu, Yehea I. Ismail |
Modeling unbuffered latches for timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 254-260, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Kwang Ho Chun, Myoung Seob Lim |
Novel Symbol Timing Recovery Algorithm for Multi-level Signal. ![Search on Bibsonomy](Pics/bibsonomy.png) |
KES ![In: Knowledge-Based Intelligent Information and Engineering Systems, 8th International Conference, KES 2004, Wellington, New Zealand, September 20-25, 2004. Proceedings. Part III, pp. 52-59, 2004, Springer, 3-540-23205-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Jau-Yang Chang, Hsing-Lung Chen |
A Timing-Based Bandwidth Allocation Protocol for QoS Provisioning in Multimedia Wireless Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCS Workshops ![In: 24th International Conference on Distributed Computing Systems Workshops (ICDCS 2004 Workshops), 23-24 March 2004, Hachioji, Tokyo, Japan, pp. 144-149, 2004, IEEE Computer Society, 0-7695-2087-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Sascha Konrad, Laura A. Campbell, Betty H. C. Cheng |
Automated Analysis of Timing Information in UML Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASE ![In: 19th IEEE International Conference on Automated Software Engineering (ASE 2004), 20-25 September 2004, Linz, Austria, pp. 350-353, 2004, IEEE Computer Society, 0-7695-2131-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Shahdad Irajpour, Sandeep K. Gupta 0001, Melvin A. Breuer |
Timing-Independent Testing of Crosstalk in the Presence of Delay Producing Defects Using Surrogate Fault Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 1024-1033, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Mohamed M. Hafed, Antonio H. Chan, Geoffrey D. Duerden, Bardia Pishdad, Clarence Tam, Sébastien Laberge, Gordon W. Roberts |
A High-Throughput 5 GBps Timing and Jitter Test Module Featuring Localized Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 728-737, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Richard Goldman, Kurt Keutzer, Clive Bittlestone, Ahsan Bootehsaz, Shekhar Y. Borkar, E. Chen, Louis Scheffer, Chandramouli Visweswariah |
Is statistical timing statistically significant? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 498, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Seokjin Lee, Martin D. F. Wong |
Timing-driven routing for FPGAs based on Lagrangian relaxation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(4), pp. 506-510, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
19 | Ian J. Hayes |
Programs as Paths: An Approach to Timing Constraint Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFEM ![In: Formal Methods and Software Engineering, 5th International Conference on Formal Engineering Methods, ICFEM 2003, Singapore, November 5-7, 2003, Proceedings, pp. 1-15, 2003, Springer, 3-540-20461-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
19 | Damian Dalton, Vivian Bessler, Jeffrey Griffiths, Andrew McCarthy, Abhay Vadher, Rory O'Kane, Rob Quigley, Declan O'Connor |
APPLES: A Full Gate-Timing FPGA-Based Hardware Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings, pp. 1162-1165, 2003, Springer, 3-540-40822-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
19 | Peter P. Puschner, Raimund Kirner |
Avoiding Timing Problems in Real-Time Software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WSTFES ![In: 1st IEEE Workshop on Software Technologies for Future Embedded Systems, WSTFES 2003, Hakodate, Hokkaido, Japan, May 15-16, 2003, pp. 75-78, 2003, IEEE Computer Society, 0-7695-1937-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
19 | Jason Cong, Michail Romesis, Min Xie 0004 |
Optimality and Stability Study of Timing-Driven Placement Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2003 International Conference on Computer-Aided Design, ICCAD 2003, San Jose, CA, USA, November 9-13, 2003, pp. 472-479, 2003, IEEE Computer Society / ACM, 1-58113-762-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
19 | Dazhi Sun, Rahim F. Benekohal, S. Travis Waller |
Multi-objective Traffic Signal Timing Optimization Using Non-dominated Sorting Genetic Algorithm II. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO ![In: Genetic and Evolutionary Computation - GECCO 2003, Genetic and Evolutionary Computation Conference, Chicago, IL, USA, July 12-16, 2003. Proceedings, Part II, pp. 2420-2421, 2003, Springer, 3-540-40603-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
19 | Konstantinos Doris, Arthur H. M. van Roermund, Domine Leenaerts |
Mismatch-based timing errors in current steering DACs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 977-980, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
19 | Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins, José E. Franca |
Timing-mismatch analysis in high-speed analog front-end with nonuniformly holding output. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 129-132, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
19 | Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-Jia Liou |
Diagnosis of Delay Defects Using Statistical Timing Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 21st IEEE VLSI Test Symposium (VTS 2003), 27 April - 1 May 2003, Napa Valley, CA, USA, pp. 339-344, 2003, IEEE Computer Society, 0-7695-1924-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
19 | Jeremy A. Rowlette, Travis M. Eiles |
Critical Timing Analysis in Microprocessors Using Near-IR Laser Assisted Device Alteration (LADA). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 264-273, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
19 | Li-C. Wang, Angela Krstic, Leonard Lee, Kwang-Ting Cheng, M. Ray Mercer, Thomas W. Williams, Magdy S. Abadir |
Using Logic Models To Predict The Detection Behavior Of Statistical Timing Defects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 1041-1050, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
19 | Emrah Acar, Florentin Dartu, Lawrence T. Pileggi |
TETA: transistor-level waveform evaluation for timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(5), pp. 605-616, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
19 | Werner M. Kistler |
Spike-timing dependent synaptic plasticity: a phenomenological framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Biol. Cybern. ![In: Biol. Cybern. 87(5-6), pp. 416-427, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
19 | Bernard N. Sheehan |
Library Compatible Ceff for Gate-Level Timing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France, pp. 826-830, 2002, IEEE Computer Society, 0-7695-1471-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
19 | Metehan Özcan, Masashi Imai, Takashi Nanya |
Generation and Verification of Timing Constraints for Fine-Grain Pipelined Asynchronous Data-Path Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002), 9-11 April 2002, Manchester, UK, pp. 109-114, 2002, IEEE Computer Society, 0-7695-1540-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
|
|