Search results for "ASP"

Hits ?▲	Authors	Title	Venue	Year	Link
25	Meng-Fan Chang, Albert Lee, Chien-Chen Lin, Mon-Shu Ho, Ping-Cheng Chen, Chia-Chen Kuo, Ming-Pin Chen, Pei-Ling Tseng, Tzu-Kun Ku, Chien-Fu Chen, Kai-Shin Li, Jia-Min Shieh	Read circuits for resistive memory (ReRAM) and memristor-based nonvolatile Logics.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Haifeng Xu, Yong Li 0009, Rami G. Melhem, Alex K. Jones	Multilane Racetrack caches: Improving efficiency through compression and independent shifting.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Rickard Ewetz, Shankarshana Janarthanan, Cheng-Kok Koh	Fast clock skew scheduling based on sparse-graph algorithms.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Zelong Sun, Li Jiang 0002, Qiang Xu 0001, Zhaobo Zhang, Zhiyuan Wang, Xinli Gu	On test syndrome merging for reasoning-based board-level functional fault diagnosis.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Shupeng Sun, Xin Li 0001	Fast statistical analysis of rare failure events for memory circuits in high-dimensional variation space.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Li-Chun Chen, Hsin-I Wu, Ren-Song Tsay	Automatic timing-coherent transactor generation for mixed-level simulations.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Udo Wolz	The required technologies for Automotive towards 2020.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Julian J. H. Pontes, Pascal Vivet, Yvain Thonnart	Two-phase protocol converters for 3D asynchronous 1-of-n data links.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Yanbin Li, Xin Li 0002, Lei Ju 0001, Zhiping Jia	A three-stage-write scheme with flip-bit for PCM main memory.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Eric Jia-Wei Fang, Terry Chi-Jih Shih, Darton Shen-Yu Huang	IR to routing challenge and solution for interposer-based design.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Masanori Hashimoto, Dawood Alnajiar, Hiroaki Konoura, Yukio Mitsuyama, Hajime Shimada, Kazutoshi Kobayashi, Hiroyuki Kanbara, Hiroyuki Ochi, Takashi Imagawa, Kazutoshi Wakabayashi, Takao Onoye, Hidetoshi Onodera	Reliability-configurable mixed-grained reconfigurable array compatible with high-level synthesis.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Josef Schneider, Jorgen Peddersen, Sri Parameswaran	Speeding up single pass simulation of PLRUt caches.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Tiago Reimann, Cliff C. N. Sze, Ricardo Reis 0001	Gate sizing and threshold voltage assignment for high performance microprocessor designs.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Xiaowei Ren, Qihang Yu, Badong Chen, Nanning Zheng 0001, Pengju Ren	A real-time permutation entropy computation for EEG signals.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Lixue Xia, Rong Luo, Bin Zhao, Yu Wang 0002, Huazhong Yang	An accurate and low-cost PM2.5 estimation method based on Artificial Neural Network.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Juyeon Kim, Taewhan Kim	Useful clock skew scheduling using adjustable delay buffers in multi-power mode designs.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Adam Teman, Davide Rossi, Pascal Andreas Meinerzhagen, Luca Benini, Andreas Peter Burg	Controlled placement of standard cell memory arrays for high density and low power in 28nm FD-SOI.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Jinho Lee, Junwhan Ahn, Kiyoung Choi, Kyungsu Kang	THOR: Orchestrated thermal management of cores and networks in 3D many-core architectures.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Mengying Zhao, Yuan Xue, Chengmo Yang, Chun Jason Xue	Minimizing MLC PCM write energy for free through profiling-based state remapping.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Songwei Pei, Ye Geng, Huawei Li 0001, Jun Liu, Song Jin	Enhanced LCCG: A novel test clock generation scheme for faster-than-at-speed delay testing.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Xiaohang Wang 0001, Tengfei Wang, Terrence S. T. Mak, Mei Yang, Yingtao Jiang, Masoud Daneshtalab	Fine-grained runtime power budgeting for networks-on-chip.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Sergej Deutsch, Krishnendu Chakrabarty	Software-based test and diagnosis of SoCs using embedded and wide-I/O DRAM.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Masashi Tawada, Shinji Kimura, Masao Yanagisawa, Nozomu Togawa	A bit-write reduction method based on error-correcting codes for non-volatile memories.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Hyun-Sek Lukas Lee, Matthias Althoff, Stefan Hoelldampf, Markus Olbrich, Erich Barke	Automated generation of hybrid system models for reachability analysis of nonlinear analog circuits.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Ting-Shuo Hsu, Jun-Lin Chiu, Chao-Kai Yu, Jing-Jia Liou	A fast and accurate network-on-chip timing simulator with a flit propagation model.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Min Huang 0002, Yi Wang 0003, Zhaoqing Liu, Liyan Qiao, Zili Shao	A Garbage Collection Aware Stripping method for Solid-State Drives.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Jianlei Yang 0001, Liwei Ma, Kang Zhao, Yici Cai, Tin-Fook Ngai	Early stage real-time SoC power estimation using RTL instrumentation.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Yang Zheng, Cong Xu, Yuan Xie 0001	Modeling framework for cross-point resistive memory design emphasizing reliability and variability issues.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Zhehui Wang, Jiang Xu 0001, Peng Yang 0003, Xuan Wang 0001, Zhe Wang 0003, Luan H. K. Duong, Zhifei Wang, Haoran Li 0002, Rafael Kioji Vivas Maeda, Xiaowen Wu, Yaoyao Ye, Qinfen Hao	Alleviate chip I/O pin constraints for multicore processors through optical interconnects.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Mohammad Shihabul Haque, Ang Li 0006, Akash Kumar 0001, Qingsong Wei	Accelerating non-volatile/hybrid processor cache design space exploration for application specific embedded systems.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Mohammed Shemsu Nesro, Lizhong Sun, Ibrahim M. Elfadel	Compact modeling of microbatteries using behavioral linearization and model-order reduction.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Peng Gu, Boxun Li, Tianqi Tang 0001, Shimeng Yu, Yu Cao 0001, Yu Wang 0002, Huazhong Yang	Technological exploration of RRAM crossbar array for matrix-vector multiplication.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Sung Hyun Jo, Tanmay Kumar, Mehdi Asnaashari, Wei D. Lu, Hagop Nazarian	3D ReRAM with Field Assisted Super-Linear Threshold (FASTTM) Selector technology for super-dense, low power, low latency data storage systems.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Jiwoo Pak, Bei Yu 0001, David Z. Pan	Electromigration-aware redundant via insertion.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Jiang Yu, Geng Liu, Xin Zhang, Pengju Ren	A high efficient hardware architecture for multiview 3DTV.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Daisuke Fujimoto, Makoto Nagata, Shivam Bhasin, Jean-Luc Danger	A novel methodology for testing hardware security and trust exploiting On-Chip Power noise Measurement.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Yuankai Chen, Hai Zhou 0001	Synthesis of resilient circuits from guarded atomic actions.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Ran Zhang 0005, Tieyuan Pan, Li Zhu, Takahiro Watanabe	A length matching routing method for disordered pins in PCB design.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Luca Gaetano Amarù, Gage Hills, Pierre-Emmanuel Gaillardon, Subhasish Mitra, Giovanni De Micheli	Multiple Independent Gate FETs: How many gates do we need?	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Anastasiia Butko, Rafael Garibotti, Luciano Ost, Vianney Lapotre, Abdoulaye Gamatié, Gilles Sassatelli, Chris Adeniyi-Jones	A trace-driven approach for fast and accurate simulation of manycore architectures.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Anteneh Gebregiorgis, Mojtaba Ebrahimi, Saman Kiamehr, Fabian Oboril, Said Hamdioui, Mehdi Baradaran Tahoori	Aging mitigation in memory arrays using self-controlled bit-flipping technique.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Xi Zhang 0003, Haris Javaid, Muhammad Shafique 0001, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran	ADAPT: An adaptive manycore methodology for software pipelined applications.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Cheng Tan 0002, Thannirmalai Somu Muthukaruppan, Tulika Mitra, Lei Ju 0001	Approximation-aware scheduling on heterogeneous multi-core architectures.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Yasuhiro Takashima	Analytical placement for rectilinear blocks.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Chih-Tsun Huang, Kuan-Chun Tasi, Jun-Shen Lin, Hsiao-Wei Chien	Application-level embedded communication tracer for many-core systems.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Daisuke Kanemoto, Keigo Oshiro, Keiji Yoshida, Haruichi Kanaya	A tri-level 50MS/s 10-bit capacitive-DAC for Bluetooth applications.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Nicole Lesperance, Shrikant Kulkarni, Kwang-Ting Cheng	Hardware Trojan detection using exhaustive testing of k-bit subspaces.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Carson Dunbar, Gang Qu 0001	Satisfiability Don't Care condition based circuit fingerprinting techniques.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Shoichi Iizuka, Yuma Higuchi, Masanori Hashimoto, Takao Onoye	Area efficient device-parameter estimation using sensitivity-configurable ring oscillator.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Martin Becker 0001, Alejandro Masrur, Samarjit Chakraborty	Composing real-time applications from communicating black-box components.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Shuangchen Li, Ang Li, Yongpan Liu, Yuan Xie 0001, Huazhong Yang	Nonvolatile memory allocation and hierarchy optimization for high-level synthesis.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Jili Zhang, Chenluan Wang, Shengxi Diao, Fujiang Lin	A Low-Power VCO based ADC with asynchronous sigma-delta modulator in 65nm CMOS.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Takehiko Amaki, Masanori Hashimoto, Takao Onoye	An oscillator-based true random number generator with process and temperature tolerance.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Yohei Umeki, Koji Yanagida, Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi 0001, Koji Tsunoda, Toshihiro Sugii	A negative-resistance sense amplifier for low-voltage operating STT-MRAM.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Hongwei Wang, Ziyuan Zhu, Jinglin Shi, Yongtao Su	An accurate ACOSSO metamodeling technique for processor architecture design space exploration.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Li-C. Wang	Data mining in functional test content optimization.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Ching-Yi Huang, Chian-Wei Liu, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan	A defect-aware approach for mapping reconfigurable Single-Electron Transistor arrays.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Khalid Hussein, Akira Fujita, Katsumi Sato	Trend in power devices for electric and hybrid electric vehicles.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Linbo Long, Duo Liu, Xiao Zhu, Kan Zhong, Zili Shao, Edwin Hsing-Mean Sha	Balloonfish: Utilizing morphable resistive memory in mobile virtualization.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Daisuke Fujimoto, Noriyuki Miura, Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, Makoto Nagata	A DPA/DEMA/LEMA-resistant AES cryptographic processor with supply-current equalizer and micro EM probe sensor.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Renhai Chen, Yi Wang 0003, Jingtong Hu, Duo Liu, Zili Shao, Yong Guan	Unified non-volatile memory and NAND flash memory architecture in smartphones.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Sho Ikeda, Sang-yeop Lee, Shin Yonezawa, Yiming Fang, Motohiro Takayasu, Taisuke Hamada, Yosuke Ishikawa, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu	A 0.5-V 5.8-GHz low-power asymmetrical QPSK/OOK transceiver for wireless sensor network.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Chung-Hao Tsai, Wai-Kei Mak	A fast parallel approach for common path pessimism removal.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Hang Lu, Guihai Yan, Yinhe Han 0001, Ying Wang 0001, Xiaowei Li 0001	ShuttleNoC: Boosting on-chip communication efficiency by enabling localized power adaptation.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Shih-Ying Liu, Tung-Chieh Chen, Hung-Ming Chen	An approach to anchoring and placing high performance custom digital designs.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Yusuke Sakumoto, Ittetsu Taniguchi	An autonomous decentralized mechanism for energy interchanges with accelerated diffusion based on MCMC.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Shao-Yun Fang	Cut mask optimization with wire planning in self-aligned multiple patterning full-chip routing.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Hyung Gyu Lee, Naehyuck Chang	Powering the IoT: Storage-less and converter-less energy harvesting.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Keiya Motohashi	The prospects of next generation television - Japan's initiative to 2020.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Zaid Al-bayati, Qingling Zhao, Ahmed Youssef, Haibo Zeng 0001, Zonghua Gu 0001	Enhanced partitioned scheduling of Mixed-Criticality Systems on multicore platforms.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Che-Wei Chang, Rainer Dömer	Communication protocol analysis of transaction-level models using Satisfiability Modulo Theories.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Nobuaki Kobayashi, Ryusuke Ito, Tadayoshi Enomoto	A high stability, low supply voltage and low standby power six-transistor CMOS SRAM.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Zahi Moudallal, Farid N. Najm	Generating circuit current constraints to guarantee power grid safety.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Po-Ya Hsu, Yao-Wen Chang	Non-stitch triple patterning-aware routing based on conflict graph pre-coloring.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Xiwei Huang, Jing Guo, Mei Yan, Hao Yu 0001	A 64×64 1200fps dual-mode CMOS ion-image sensor for accurate DNA sequencing.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Takanori Machida, Dai Yamamoto, Mitsugu Iwamoto, Kazuo Sakiyama	Implementation of double arbiter PUF and its performance evaluation on FPGA.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera	Microarchitectural-level statistical timing models for near-threshold circuit design.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Toshihiro Ozaki, Tetsuya Hirose, Takahiro Nagai, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa	A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated 3-terminal voltage converter with MPPT for low-voltage energy harvesters.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Seyong Ahn, Minseok Kang, Marios C. Papaefthymiou, Taewhan Kim	Synthesis of resonant clock networks supporting dynamic voltage / frequency scaling.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Leibo Liu, Yu Ren, Chenchen Deng, Shouyi Yin, Shaojun Wei, Jie Han 0001	A novel approach using a minimum cost maximum flow algorithm for fault-tolerant topology reconfiguration in NoC architectures.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Dongsheng Yang 0002, Wei Deng 0001, Tomohiro Ueno, Teerachot Siriburanon, Satoshi Kondo, Kenichi Okada, Akira Matsuzawa	An HDL-synthesized gated-edge-injection PLL with a current output DAC.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Fangming Ye, Krishnendu Chakrabarty, Zhaobo Zhang, Xinli Gu	Self-learning and adaptive board-level functional fault diagnosis.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Hoda Aghaei Khouzani, Chengmo Yang, Jingtong Hu	Improving performance and lifetime of DRAM-PCM hybrid main memory through a proactive page allocation strategy.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Chang Liu, Xinghua Yang, Fei Qiao, Qi Wei 0001, Huazhong Yang	Design methodology for approximate accumulator based on statistical error model.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Ying-Chih Wang, Shihui Yin, Minhee Jun, Xin Li 0001, Lawrence T. Pileggi, Tamal Mukherjee, Rohit Negi	Accurate passivity-enforced macromodeling for RF circuits via iterative zero/pole update based on measurement data.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Hidekazu Nishimura	Systems modeling for additional development in automotive E/E architecture.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Zhi Hu, Yibo Fan, Xiaoyang Zeng	Iterative disparity voting based stereo matching algorithm and its hardware implementation.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Shao-Yun Fang, Yi-Shu Tai, Yao-Wen Chang	Layout decomposition for Spacer-is-Metal (SIM) self-aligned double patterning.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Aravind Tharayil Narayanan, Wei Deng 0001, Kenichi Okada, Akira Matsuzawa	A tail-current modulated VCO with adaptive-bias scheme.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Qiaosha Zou, Matthew Poremba, Rui He, Wei Yang, Junfeng Zhao 0003, Yuan Xie 0001	Heterogeneous architecture design with emerging 3D and non-volatile memory technologies.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Daisuke Murakami, Yuki Soga, Daisuke Imoto, Yoshiharu Watanabe, Takashi Yamada	The world's 1st Complete-4K SoC solution with hybrid memory system.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Xuan-Thuan Nguyen, Cong-Kha Pham	An efficient multi-port memory controller for multimedia applications.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Luis Gabriel Murillo, Robert Lajos Bücs, Daniel Hincapie, Rainer Leupers, Gerd Ascheid	SWAT: Assertion-based debugging of concurrency issues at system level.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Zhijian Pan, Chuan Qin 0008, Zuochang Ye, Yan Wang 0023	Automatic design for analog/RF front-end system in 802.11ac receiver.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Laura A. Rozo Duque, Chengmo Yang	Guiding fault-driven adaption in multicore systems through a reliability-aware static task schedule.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Hui Li 0034, Sébastien Le Beux, Gabriela Nicolescu, Ian O'Connor	Energy-efficient optical crossbars on chip with multi-layer deposited silicon.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Palkesh Jain, Sachin S. Sapatnekar, Jordi Cortadella	A retargetable and accurate methodology for logic-IP-internal electromigration assessment.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Chao Zhang 0007, Guangyu Sun 0003, Weiqi Zhang, Fan Mi, Hai Li 0001, Weisheng Zhao	Quantitative modeling of racetrack memory, a tradeoff among area, performance, and power.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Yu Peng, Shouyi Yin, Leibo Liu, Shaojun Wei	Battery-aware mapping optimization of loop nests for CGRAs.	ASP-DAC	2015	DBLP DOI BibTeX RDF
25	Yan Zhu, Sheldon X.-D. Tan	GPU-accelerated parallel Monte Carlo analysis of analog circuits by hierarchical graph-based solver.	ASP-DAC	2015	DBLP DOI BibTeX RDF